diff options
| author | Tom Rini <trini@konsulko.com> | 2026-01-05 15:12:02 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2026-01-05 15:12:02 -0600 |
| commit | c344087025a4c296468a1d5aeb61078a58baa59e (patch) | |
| tree | f5a7ba04c352b3e3cb79065096ea43480f7bda2f /doc | |
| parent | 127a42c7257a6ffbbd1575ed1cbaa8f5408a44b3 (diff) | |
| parent | 6cdd7597a2fbfc1572c1b0af23d3daf1cefa2de7 (diff) | |
Merge branch 'next'
Diffstat (limited to 'doc')
31 files changed, 1536 insertions, 1174 deletions
diff --git a/doc/README.LED b/doc/README.LED deleted file mode 100644 index c21c9d53ec3..00000000000 --- a/doc/README.LED +++ /dev/null @@ -1,77 +0,0 @@ -Status LED -======================================== - -This README describes the status LED API. - -The API is defined by the include file include/status_led.h - -The first step is to enable CONFIG_LED_STATUS in menuconfig: -> Device Drivers > LED Support. - -If the LED support is only for specific board, enable -CONFIG_LED_STATUS_BOARD_SPECIFIC in the menuconfig. - -Status LEDS 0 to 5 are enabled by the following configurations at menuconfig: -CONFIG_STATUS_LED0, CONFIG_STATUS_LED1, ... CONFIG_STATUS_LED5 - -The following should be configured for each of the enabled LEDs: -CONFIG_STATUS_LED_BIT<n> -CONFIG_STATUS_LED_STATE<n> -CONFIG_STATUS_LED_FREQ<n> -Where <n> is an integer 1 through 5 (empty for 0). - -CONFIG_STATUS_LED_BIT is passed into the __led_* functions to identify which LED -is being acted on. As such, the value choose must be unique with with respect to -the other CONFIG_STATUS_LED_BIT's. Mapping the value to a physical LED is the -reponsiblity of the __led_* function. - -CONFIG_STATUS_LED_STATE is the initial state of the LED. It should be set to one -of these values: CONFIG_LED_STATUS_OFF or CONFIG_LED_STATUS_ON. - -CONFIG_STATUS_LED_FREQ determines the LED blink frequency. -Values range from 2 to 10. - -Some other LED macros ---------------------- - -CONFIG_STATUS_LED_BOOT is the LED to light when the board is booting. -This must be a valid LED number (0-5). - -CONFIG_STATUS_LED_RED is the red LED. It is used to signal errors. This must be -a valid LED number (0-5). Other similar color LED's macros are -CONFIG_STATUS_LED_GREEN, CONFIG_STATUS_LED_YELLOW and CONFIG_STATUS_LED_BLUE. - -General LED functions ---------------------- -The following functions should be defined: - -__led_init is called once to initialize the LED to CONFIG_STATUS_LED_STATE. -One time start up code should be placed here. - -__led_set is called to change the state of the LED. - -__led_toggle is called to toggle the current state of the LED. - -Colour LED -======================================== - -Colour LED's are at present only used by ARM. - -The functions names explain their purpose. - -coloured_LED_init -red_LED_on -red_LED_off -green_LED_on -green_LED_off -yellow_LED_on -yellow_LED_off -blue_LED_on -blue_LED_off - -These are weakly defined in arch/arm/lib/board.c to noops. Where applicable, define -these functions in the board specific source. - -TBD : Describe older board dependent macros similar to what is done for - -TBD : Describe general support via asm/status_led.h diff --git a/doc/README.omap3 b/doc/README.omap3 index d1e6be94a11..527bcfc4acc 100644 --- a/doc/README.omap3 +++ b/doc/README.omap3 @@ -46,12 +46,6 @@ make make omap3_zoom2_config make -* CM-T35: - -make cm_t35_config -make - - Custom commands =============== diff --git a/doc/api/index.rst b/doc/api/index.rst index 44922a742c3..9a70597c35d 100644 --- a/doc/api/index.rst +++ b/doc/api/index.rst @@ -15,6 +15,7 @@ U-Boot API documentation fs getopt interrupt + interconnect i3c led linker_lists diff --git a/doc/api/interconnect.rst b/doc/api/interconnect.rst new file mode 100644 index 00000000000..c5182a3eb98 --- /dev/null +++ b/doc/api/interconnect.rst @@ -0,0 +1,117 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Generic System Interconnect Subsystem +===================================== + +Introduction +------------ + +This framework is designed to provide a standard kernel interface to control +the settings of the interconnects on an SoC. These settings can be throughput, +latency and priority between multiple interconnected devices or functional +blocks. This can be controlled dynamically in order to save power or provide +maximum performance. + +The interconnect bus is hardware with configurable parameters, which can be +set on a data path according to the requests received from various drivers. +An example of interconnect buses are the interconnects between various +components or functional blocks in chipsets. There can be multiple interconnects +on an SoC that can be multi-tiered. + +Below is a simplified diagram of a real-world SoC interconnect bus topology. + +:: + + +----------------+ +----------------+ + | HW Accelerator |--->| M NoC |<---------------+ + +----------------+ +----------------+ | + | | +------------+ + +-----+ +-------------+ V +------+ | | + | DDR | | +--------+ | PCIe | | | + +-----+ | | Slaves | +------+ | | + ^ ^ | +--------+ | | C NoC | + | | V V | | + +------------------+ +------------------------+ | | +-----+ + | |-->| |-->| |-->| CPU | + | |-->| |<--| | +-----+ + | Mem NoC | | S NoC | +------------+ + | |<--| |---------+ | + | |<--| |<------+ | | +--------+ + +------------------+ +------------------------+ | | +-->| Slaves | + ^ ^ ^ ^ ^ | | +--------+ + | | | | | | V + +------+ | +-----+ +-----+ +---------+ +----------------+ +--------+ + | CPUs | | | GPU | | DSP | | Masters |-->| P NoC |-->| Slaves | + +------+ | +-----+ +-----+ +---------+ +----------------+ +--------+ + | + +-------+ + | Modem | + +-------+ + +Terminology +----------- + +Interconnect provider is the software definition of the interconnect hardware. +The interconnect providers on the above diagram are M NoC, S NoC, C NoC, P NoC +and Mem NoC. + +Interconnect node is the software definition of the interconnect hardware +port. Each interconnect provider consists of multiple interconnect nodes, +which are connected to other SoC components including other interconnect +providers. The point on the diagram where the CPUs connect to the memory is +called an interconnect node, which belongs to the Mem NoC interconnect provider. + +Interconnect endpoints are the first or the last element of the path. Every +endpoint is a node, but not every node is an endpoint. + +Interconnect path is everything between two endpoints including all the nodes +that have to be traversed to reach from a source to destination node. It may +include multiple master-slave pairs across several interconnect providers. + +Interconnect consumers are the entities which make use of the data paths exposed +by the providers. The consumers send requests to providers requesting various +throughput, latency and priority. Usually the consumers are device drivers, that +send request based on their needs. An example for a consumer is a video decoder +that supports various formats and image sizes. + +U-Boot Implementation +--------------------- + +The implementation is derived from the Linux 6.17 Interconnect implementation, +adapted to use the U-Boot Driver Model. Under Linux the nodes are allocated +via `idr_alloc()`, while under U-Boot they are created as `icc_node` devices +which are children of the provider device. This provides the same lifetime +by using a robust and ready to use mechanism, simplifying the implementation. + +Under Linux, the nodes link is done by always allocating a new `icc_node` when +creating a link, and when the link with the associated ID is registered +it is associated to the new provider. Under U-Boot only the nodes from a provider +are created at bind time, and when the node graph is traversed to calculate +a path the link ID is looked dynamically amongst the node devices. This +may take longer at the gain of time when registering nodes a bind time. + +Since U-Boot Driver Model does on-demand device probe, the nodes and provider +devices are also probed when a path is determined and removed when the path +is deleted. + +A test suite is present in `test/dm/interconnect.c` using a test driver +`sandbox-interconnect` to exercise those U-Boot specific aspects while making +sure the graph traversal and calculation are accurate. + +Interconnect consumers API +-------------------------- + +Interconnect consumers are the clients which use the interconnect APIs to +get paths between endpoints and set their bandwidth/latency/QoS requirements +for these interconnect paths. + +.. kernel-doc:: include/interconnect.h + +Interconnect uclass providers API +--------------------------------- + +Interconnect provider is an entity that implements methods to initialize and +configure interconnect bus hardware. The interconnect provider drivers should +be registered a interconnect uclass drivers. + +.. kernel-doc:: include/interconnect-uclass.h diff --git a/doc/api/led.rst b/doc/api/led.rst index e52e350d1bb..9ae3f5fe252 100644 --- a/doc/api/led.rst +++ b/doc/api/led.rst @@ -7,4 +7,67 @@ LED :doc: Overview .. kernel-doc:: include/led.h - :internal:
\ No newline at end of file + :internal: + +Legacy LED +========== + +Please use the new LED API as defined above. This section is only for reference +for currently supported devices and to aid for migration to the new API. + +Status LED +---------- + +This README describes the status LED API. + +The API is defined by the include file include/status_led.h + +The first step is to enable CONFIG_LED_STATUS in menuconfig:: + + > Device Drivers > LED Support. + +If the LED support is only for specific board, enable +CONFIG_LED_STATUS_BOARD_SPECIFIC in the menuconfig. + +Status LEDS 0 to 5 are enabled by the following configurations at menuconfig: +CONFIG_STATUS_LED0, CONFIG_STATUS_LED1, ... CONFIG_STATUS_LED5 + +The following should be configured for each of the enabled LEDs: + +- CONFIG_STATUS_LED_BIT<n> +- CONFIG_STATUS_LED_STATE<n> +- CONFIG_STATUS_LED_FREQ<n> + +Where <n> is an integer 1 through 5 (empty for 0). + +CONFIG_STATUS_LED_BIT is passed into the __led_* functions to identify which LED +is being acted on. As such, the value choose must be unique with respect to +the other CONFIG_STATUS_LED_BIT's. Mapping the value to a physical LED is the +reponsiblity of the __led_* function. + +CONFIG_STATUS_LED_STATE is the initial state of the LED. It should be set to one +of these values: CONFIG_LED_STATUS_OFF or CONFIG_LED_STATUS_ON. + +CONFIG_STATUS_LED_FREQ determines the LED blink frequency. +Values range from 2 to 10. + +Some other LED macros +~~~~~~~~~~~~~~~~~~~~~ + +CONFIG_STATUS_LED_BOOT is the LED to light when the board is booting. +This must be a valid LED number (0-5). + +General LED functions +~~~~~~~~~~~~~~~~~~~~~ +The following functions should be defined: + +__led_init is called once to initialize the LED to CONFIG_STATUS_LED_STATE. +One time start up code should be placed here. + +__led_set is called to change the state of the LED. + +__led_toggle is called to toggle the current state of the LED. + +TBD : Describe older board dependent macros similar to what is done for + +TBD : Describe general support via asm/status_led.h diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst index dcd935224ac..23380ac33f2 100644 --- a/doc/board/amlogic/index.rst +++ b/doc/board/amlogic/index.rst @@ -78,6 +78,7 @@ Boot Documentation boot-flow pre-generated-fip + spl Board Documentation ------------------- diff --git a/doc/board/amlogic/pre-generated-fip.rst b/doc/board/amlogic/pre-generated-fip.rst index 6a43d776d43..d820bd09115 100644 --- a/doc/board/amlogic/pre-generated-fip.rst +++ b/doc/board/amlogic/pre-generated-fip.rst @@ -98,6 +98,13 @@ The repo also provides the following files used with GXBB boards: The repo also supports the open-source 'gxlimg' signing tool that can be used to sign U-Boot binaries for GXL/GXM/G12A/G12B/SM1 boards: https://github.com/repk/gxlimg +The following binaries can be replaced with open-source implementations: + +- bl2.bin (GXBB and GXL only) +- bl31.img (GXBB, GXL, AXG and G12A only) + +Refer to `Experimental U-Boot SPL Support`_ if you wish to replace them. + Licensing --------- @@ -129,3 +136,5 @@ clarified. The current Amlogic distribution licence is below: // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +.. _`Experimental U-Boot SPL Support`: spl.rst diff --git a/doc/board/amlogic/spl.rst b/doc/board/amlogic/spl.rst new file mode 100644 index 00000000000..0495cd1ee9f --- /dev/null +++ b/doc/board/amlogic/spl.rst @@ -0,0 +1,77 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Experimental U-Boot SPL Support +=============================== + +There's some experimental support for some Amlogic SoCs, in U-Boot SPL. It +replaces the proprietary bl2.bin blob used for DRAM init. Currently Meson GX +SoCs (GXBB, GXL) are supported. + +A subset of Amlogic boards have SPL enabled. These boards have been tested and +are known to work to an extent. + + +Building Arm Trusted Firmware (TF-A) +------------------------------------ + +This U-Boot SPL port requires the BL31 stage of mainline Arm Trusted +Firmware-A firmware. It provides an open source implementation of secure +software for Armv8-A. Build it with: + +.. code-block:: bash + + $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git + $ cd trusted-firmware-a + $ make CROSS_COMPILE=aarch64-linux-gnu- PLAT=your_soc AML_STDPARAMS=1 + +Replace ``your_soc`` with the SoC target you wish to build for. For GXBB it's +``gxbb`` and for GXL it's ``gxl``. + + +Building a bl30_new.bin binary +------------------------------ + +``bl30_new.bin`` has both ``bl30.bin`` and ``bl301.bin`` binary blobs +bundled. The former is the proper system control processor firmware and the +latter is a "plug-in" for board-specific DVFS/suspend-resume parameters. For +more info you may wish to read this page: `Pre-Generated FIP File Repo`_. + +To build using the FIP file repo, simply issue the following commands: + +.. code-block:: bash + + $ cd amlogic-boot-fip/your_board + $ make bl30_new.bin + + +.. _`Pre-Generated FIP File Repo`: pre-generated-fip.rst + + +U-Boot compilation +------------------ + +U-Boot SPL is not enabled by default, instead there are config fragments that +can be used to enable it, with per-board configuration: + +- ``spl-libretech-cc-1gb.config``: 1 GB LePotato board +- ``spl-libretech-cc-2gb.config``: 2 GB LePotato board +- ``spl-odroid-c2.config``: ODROID-C2 +- ``spl-videostrong-kii-pro.config``: Videostrong KII Pro + +Pick one of them then: + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-linux-gnu- + $ export BL31=path/to/tf-a/bl31.bin # Upstream TF-A BL31 binary + $ export SCP=path/to/bl30_new.bin # bl30_new.bin binary + $ make <yourboardname>_defconfig spl-<yourboardname>.config + $ make + +Write to SD: + +.. code-block:: bash + + $ DEV=/dev/boot_device + $ dd if=u-boot-meson-with-spl.bin of=$DEV conv=fsync,notrunc bs=512 seek=1 + diff --git a/doc/board/bsh/imx6ulz_bsh_smm_m2.rst b/doc/board/bsh/imx6ulz_bsh_smm_m2.rst index 0f391a17ade..0af41c09d20 100644 --- a/doc/board/bsh/imx6ulz_bsh_smm_m2.rst +++ b/doc/board/bsh/imx6ulz_bsh_smm_m2.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: GPL-2.0+ -How to Update U-Boot on imx6ulz_smm_m2 and imx6ulz_smm_m2b boards -================================================================= +How to Update U-Boot on imx6ulz_smm_m2, imx6ulz_smm_m2b and imx6ulz_smm_m2d boards +================================================================================== Required software on the host PC: @@ -23,6 +23,14 @@ Build U-Boot for m2b: $ make imx6ulz_smm_m2b_defconfig $ make +Build U-Boot for m2d: + +.. code-block:: bash + + $ make mrproper + $ make imx6ulz_smm_m2d_defconfig + $ make + This generates the SPL and u-boot-dtb.img binaries. Loading U-Boot via USB Serial Download Protocol diff --git a/doc/board/kontron/index.rst b/doc/board/kontron/index.rst index cb1906e626b..bd205ec628e 100644 --- a/doc/board/kontron/index.rst +++ b/doc/board/kontron/index.rst @@ -6,6 +6,8 @@ Kontron .. toctree:: :maxdepth: 2 + osm-s-mx8mp + osm-s-mx93 pitx-imx8m sl28 sl-mx6ul diff --git a/doc/board/kontron/osm-s-mx8mp.rst b/doc/board/kontron/osm-s-mx8mp.rst new file mode 100644 index 00000000000..37fb0f7b917 --- /dev/null +++ b/doc/board/kontron/osm-s-mx8mp.rst @@ -0,0 +1,104 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Kontron Electronics i.MX8MP SoMs and Boards +=========================================== + +The OSM-S i.MX8MP by Kontron Electronics GmbH is a SoM module with an +i.MX8M-Plus SoC, up to 8 GB LPDDR4 RAM, eMMC, PMIC, RTC. + +The matching evaluation boards (Board-Line, BL) have two Ethernet ports, +USB 2.0, HDMI/LVDS, SD card, CAN, RS485, RS232 and much more. + +The OSM-S i.MX8MP is compliant to the Open Standard Module (OSM) 1.1 +specification, size S (https://sget.org/standards/osm). + +Quick Start +----------- + +- Get and Build the Trusted Firmware-A (TF-A) +- Get the DDR firmware +- Build U-Boot +- Boot + +.. note:: + + To build on a x86-64 host machine, you need a GNU cross toolchain for the + target architecture (aarch64). Check your distros package manager or + download and install the necessary tools (``aarch64-linux-gnu-*``) manually. + +Get and Build the Trusted Firmware-A (TF-A) +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +There are two sources for the TF-A. Mainline and NXP. Get the one you prefer +(support and features might differ). + +.. note:: + + If you are using GCC 12 and you get compiler/linker errors, try to add the + following arguments to your make command as workaround: + ``CFLAGS="-Wno-array-bounds" LDFLAGS="--no-warn-rwx-segments"`` + +**NXP's imx-atf** + +1. Get TF-A from: https://github.com/nxp-imx/imx-atf, branch: lf_v2.6 +2. Build + + .. code-block:: bash + + $ make PLAT=imx8mp CROSS_COMPILE=aarch64-linux-gnu- IMX_BOOT_UART_BASE="0x30880000" bl31 + $ cp build/imx8mp/release/bl31.bin $(builddir) + +.. note:: + + *builddir* is U-Boot's build directory (source directory for in-tree builds) + +**Mainline TF-A** + +1. Get TF-A from: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/, tag: v2.4 +2. Build + + .. code-block:: bash + + $ make PLAT=imx8mp CROSS_COMPILE=aarch64-linux-gnu- IMX_BOOT_UART_BASE="0x30880000" bl31 + $ cp build/imx8mp/release/bl31.bin $(builddir) + +Get the DDR firmware +^^^^^^^^^^^^^^^^^^^^ + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.18.bin + $ chmod +x firmware-imx-8.18.bin + $ ./firmware-imx-8.18.bin + $ cp firmware-imx-8.18/firmware/ddr/synopsys/lpddr4_pmu_train_1d_imem_202006.bin $(builddir) + $ cp firmware-imx-8.18/firmware/ddr/synopsys/lpddr4_pmu_train_1d_dmem_202006.bin $(builddir) + $ cp firmware-imx-8.18/firmware/ddr/synopsys/lpddr4_pmu_train_2d_imem_202006.bin $(builddir) + $ cp firmware-imx-8.18/firmware/ddr/synopsys/lpddr4_pmu_train_2d_dmem_202006.bin $(builddir) + +Build U-Boot +^^^^^^^^^^^^ + +.. code-block:: bash + + $ make kontron-osm-s-mx8mp_defconfig + $ make CROSS_COMPILE=aarch64-linux-gnu- + +Copy the flash.bin to SD card at an offset of 32 KiB: + +.. code-block:: bash + + $ dd if=flash.bin of=/dev/sd[x] bs=1K seek=32 conv=notrunc + +Boot +^^^^ + +Put the SD card in the slot on the board and apply power. Check the serial +console for output. + +Further Information +------------------- + +The bootloader configuration is setup to be used with kernel FIT images. Legacy +images might not be working out of the box. + +Please see https://docs.kontron-electronics.de for further vendor documentation. diff --git a/doc/board/kontron/osm-s-mx93.rst b/doc/board/kontron/osm-s-mx93.rst new file mode 100644 index 00000000000..5563573449f --- /dev/null +++ b/doc/board/kontron/osm-s-mx93.rst @@ -0,0 +1,95 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Kontron Electronics i.MX93 SoMs and Boards +=========================================== + +The OSM-S i.MX93 by Kontron Electronics GmbH is a SoM module with an +i.MX93 SoC, 2 GB LPDDR4 RAM, eMMC, PMIC, RTC. + +The matching evaluation boards (Board-Line, BL) have two Ethernet ports, +USB 2.0, LVDS, SD card, CAN, RS485, RS232 and much more. + +The OSM-S i.MX93 is compliant to the Open Standard Module (OSM) 1.1 +specification, size S (https://sget.org/standards/osm). + +Quick Start +----------- + +- Get and Build the Trusted Firmware-A (TF-A) +- Get the DDR firmware +- Build U-Boot +- Boot + +.. note:: + + To build on a x86-64 host machine, you need a GNU cross toolchain for the + target architecture (aarch64). Check your distros package manager or + download and install the necessary tools (``aarch64-linux-gnu-*``) manually. + +Get and Build the Trusted Firmware-A (TF-A) +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +.. note:: + + If you are using GCC 12 and you get compiler/linker errors, try to add the + following arguments to your make command as workaround: + ``CFLAGS="-Wno-array-bounds" LDFLAGS="--no-warn-rwx-segments"`` + +1. Get TF-A from: https://github.com/nxp-imx/imx-atf, branch: lf_v2.12 +2. Build + + .. code-block:: bash + + $ make PLAT=imx93 CROSS_COMPILE=aarch64-linux-gnu- IMX_BOOT_UART_BASE="0x30880000" bl31 + $ cp build/imx93/release/bl31.bin $(builddir) + +.. note:: + + *builddir* is U-Boot's build directory (source directory for in-tree builds) + +Get the DDR firmware +^^^^^^^^^^^^^^^^^^^^ + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.28-994fa14.bin + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-ele-imx-2.0.2-89161a8.bin + $ chmod +x firmware-imx-8.28-994fa14.bin firmware-ele-imx-2.0.2-89161a8.bin + $ ./firmware-imx-8.28-994fa14.bin + $ ./firmware-ele-imx-2.0.2-89161a8.bin + $ cp firmware-imx-8.28-994fa14/firmware/ddr/synopsys/lpddr4_dmem_1d_v202201.bin $(builddir) + $ cp firmware-imx-8.28-994fa14/firmware/ddr/synopsys/lpddr4_dmem_2d_v202201.bin $(builddir) + $ cp firmware-imx-8.28-994fa14/firmware/ddr/synopsys/lpddr4_imem_1d_v202201.bin $(builddir) + $ cp firmware-imx-8.28-994fa14/firmware/ddr/synopsys/lpddr4_imem_2d_v202201.bin $(builddir) + $ cp firmware-ele-imx-2.0.2-89161a8/mx93a1-ahab-container.img $(builddir) + +Build U-Boot +^^^^^^^^^^^^ + +.. code-block:: bash + + $ make kontron-osm-s-mx93_defconfig + $ make CROSS_COMPILE=aarch64-linux-gnu- + +Copy the flash.bin to SD card at an offset of 32 KiB: + +.. code-block:: bash + + $ dd if=flash.bin of=/dev/sd[x] bs=1K seek=32 conv=fsync + +Boot +^^^^ + +Put the SD card in the slot on the board and apply power. Alternatively connect +the USB Type-C Connector to your host machine, power up the board and load the +bootloader via uuu-Tool (`uuu flash.bin`). + +Check the serial console for output. + +Further Information +------------------- + +The bootloader configuration is setup to be used with kernel FIT images. Legacy +images might not be working out of the box. + +Please see https://docs.kontron-electronics.de for further vendor documentation. diff --git a/doc/board/nxp/imx91_11x11_frdm.rst b/doc/board/nxp/imx91_11x11_frdm.rst new file mode 100644 index 00000000000..e3a2fe9b662 --- /dev/null +++ b/doc/board/nxp/imx91_11x11_frdm.rst @@ -0,0 +1,100 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx91_frdm +======================= + +U-Boot for the NXP i.MX91 11x11 FRDM Board + +Quick Start +----------- + +- Get and Build the ARM Trusted firmware +- Get the DDR firmware +- Get ahab-container.img +- Build U-Boot +- Boot from the SD card +- Boot using USB serial download (uuu) + +Get and Build the ARM Trusted firmware +-------------------------------------- + +Note: srctree is U-Boot source directory +Get ATF from: https://github.com/nxp-imx/imx-atf/ +branch: lf_v2.10 + +.. code-block:: bash + + $ unset LDFLAGS + $ make PLAT=imx91 bl31 + $ cp build/imx91/release/bl31.bin $(srctree) + +Get the DDR firmware +-------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.21.bin + $ chmod +x firmware-imx-8.21.bin + $ ./firmware-imx-8.21.bin + $ cp firmware-imx-8.21/firmware/ddr/synopsys/lpddr4*.bin $(srctree) + +Get ahab-container.img +--------------------------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-ele-imx-1.3.0-17945fc.bin + $ chmod +x firmware-ele-imx-1.3.0-17945fc.bin + $ ./firmware-ele-imx-1.3.0-17945fc.bin + $ cp firmware-ele-imx-1.3.0-17945fc/mx91a0-ahab-container.img $(srctree) + +Build U-Boot +------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-poky-linux- + $ make imx91_11x11_frdm_defconfig or imx91_11x11_frdm_inline_ecc_defconfig + $ make + +- Inline ECC is to enable DDR ECC feature with imx91_11x11_frdm_inline_ecc_defconfig + Enable ECC will reduce DDR size by 1/8. For 1GB DRAM, available size will be 896MB. + +Burn the flash.bin to MicroSD card offset 32KB: + +.. code-block:: bash + + $ dd if=flash.bin of=/dev/sd[x] bs=1k seek=32; sync + +Boot from the SD card +--------------------- + +- Configure SW1 boot switches to SD boot mode: + 0011 SW1[3:0] - ("USDHC2 4-bit SD3.0" Boot Mode) +- Insert the SD card in the SD slot (P13) of the board. +- Connect a USB Type-C cable into the P16 Debug USB Port and connect + using a terminal emulator at 115200 bps, 8n1. The console will show up + at /dev/ttyACM0. +- Power on the board by connecting a USB Type-C cable into the P1 + Power USB Port. + +Boot using USB serial download (uuu) +------------------------------------ + +- Configure SW1 boot switches to serial download boot mode: + 0001 SW1[3:0] - ("Serial downloader (USB)" Boot Mode) +- Plug USB Type-C cable into the P2 device port. +- Connect a USB Type-C cable into the P16 Debug USB Port and connect + using a terminal emulator at 115200 bps, 8n1. The console will show up + at /dev/ttyACM0. +- Power on the board by connecting a USB Type-C cable into the P1 + Power USB Port. +- Use NXP Universal Update Utility `NXP Universal Update Utility`_ to boot or + flash the device. E.g. following command can be used to flash an image onto + the eMMC storage: + +.. code-block:: bash + + $ uuu -V -b emmc_all <image file> + +.. _`NXP Universal Update Utility`: https://github.com/nxp-imx/mfgtools
\ No newline at end of file diff --git a/doc/board/nxp/index.rst b/doc/board/nxp/index.rst index 7b881961b65..01d3468a47d 100644 --- a/doc/board/nxp/index.rst +++ b/doc/board/nxp/index.rst @@ -13,6 +13,7 @@ NXP Semiconductors imx8qxp_mek imx8ulp_evk imx91_11x11_evk + imx91_11x11_frdm imx93_9x9_qsb imx93_11x11_evk imx93_frdm diff --git a/doc/board/starfive/deepcomputing_fml13v01.rst b/doc/board/starfive/deepcomputing_fml13v01.rst index 5d9612483b4..9777f4c6303 100644 --- a/doc/board/starfive/deepcomputing_fml13v01.rst +++ b/doc/board/starfive/deepcomputing_fml13v01.rst @@ -9,38 +9,6 @@ The DeepComputing Framework motherboard (FLM13V01) can be combined with a U-Boot for the board uses the same binaries as the VisionFive 2 board. Currently only serial console output is supported by mainline U-Boot. -Building --------- - -Setup the cross compilation environment variable: - -.. code-block:: bash - - export CROSS_COMPILE=riscv64-linux-gnu- - -The M-mode software OpenSBI provides the supervisor binary interface (SBI) and -is responsible for the switch to S-Mode. It is a prerequisite for building -U-Boot. Support for the JH7110 was introduced in OpenSBI 1.2. It is recommended -to use a current release. - -.. code-block:: bash - - git clone https://github.com/riscv/opensbi.git - cd opensbi - make PLATFORM=generic FW_TEXT_START=0x40000000 FW_OPTIONS=0 - export OPENSBI="$(pwd)/build/platform/generic/firmware/fw_dynamic.bin" - -Now build U-Boot SPL and main U-Boot. - -.. code-block:: bash - - cd <U-Boot-dir> - make starfive_visionfive2_defconfig - make - -This will generate the U-Boot SPL image (spl/u-boot-spl.bin.normal.out) as well -as the FIT image (u-boot.itb) with OpenSBI, U-Boot, and device-trees. - Device-tree selection --------------------- diff --git a/doc/board/starfive/jh7110_common.rst b/doc/board/starfive/jh7110_common.rst index 4a8058ee5da..9beab941cc1 100644 --- a/doc/board/starfive/jh7110_common.rst +++ b/doc/board/starfive/jh7110_common.rst @@ -1,103 +1,567 @@ .. SPDX-License-Identifier: GPL-2.0-or-later +.. |arrowin| unicode:: U+2190 +.. |arrowout| unicode:: U+2192 +.. |degreecelsius| unicode:: U+2103 +.. _U74-MC Core Complex: https://www.starfivetech.com/uploads/u74mc_core_complex_manual_21G1.pdf +.. _JH-7110 Technical Reference Manual: https://doc-en.rvspace.org/JH7110/TRM/ +.. _JH-7110 Boot User Guide BootROM: https://doc-en.rvspace.org/VisionFive2/Boot_UG/JH7110_SDK/bootrom.html +.. _JH-7110 Datasheet: https://doc-en.rvspace.org/JH7110/PDF/JH7110_DS.pdf +.. _JH-7110I Datasheet: https://doc-en.rvspace.org/JH7110/PDF/JH7110I_DS.pdf +.. _Description of StarFive loader: https://lore.kernel.org/u-boot/ZQ2PR01MB1307E9F46803F18B2B9D5394E6C22@ZQ2PR01MB1307.CHNPR01.prod.partner.outlook.cn/ +.. _SYS SYSCON: https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/sys_syscon.html -Boot source selection ---------------------- +StarFive JH-7110 RISC-V SoC +--------------------------- -The board provides DIP switches to select the device for loading the boot -firmware. +* JH-7110 working frequency 1.5GHz + ambient operating temperature range -20 |degreecelsius| to +85 |degreecelsius| + (`JH-7110 Datasheet`_) -=========== === === -Boot source SW1 SW2 -=========== === === -UART OFF OFF -SD-card ON OFF -eMMC OFF ON -SPI flash ON ON -=========== === === +* JH-7110I working frequency 1.5GHz + ambient operating temperature range -40 |degreecelsius| to +85 |degreecelsius| + (`JH-7110I Datasheet`_) -Flashing a new U-Boot version ------------------------------ +* JH-7110S working frequency 1.25GHz -U-Boot SPL is provided as file spl/u-boot-spl.bin.normal.out. Main U-Boot is -in file u-boot.itb. +JH-7110 is a 4+1 core RISC-V System on Chip: -Assuming your new U-Boot version is on partition 1 of an SD-card you could -install it to the SPI flash with: +* `U74-MC Core Complex`_ -.. code-block:: console + * S7 monitor core RV64IMAC + + * Physical Memory Protection + * 16KB L1 Instruction cache + * 8KB Data Tightly-Integrated Memory + + * U74 application core RV64GC (x4) + + * Sv39 Memory Management Unit + * Floating Point Unit + * 32KB L1 Instruction cache + * 32KB L1 Data cache + * Physical Memory Protection + + * Core-Local INTerruptor + * Platform-Level Interrupt Controller + * Debug + * Bus Matrix + + * 2MB L2 cache + + * Memory Port |arrowout| 128-bit AXI4 + + * System Port |arrowout| 64-bit AXI4 + * Peripheral Port |arrowout| 64-bit AXI4 + * Front Port |arrowin| 64-bit AXI4 + +* Block + + * RV32IMAFCB E24 co-processor + + * 16KB Instruction cache + * 32KB Tightly-Integrated Memory "A" + * 32KB Tightly-Integrated Memory "B" + + * Mailbox + * SGDMA + +* Network-on-Chip/AXI bus +* Memory + + * SRAM 256KB/BootROM 32KB + * LPDDR4/DDR4/LPDDR3/DDR3 32-bit 2800 Mbps (2133 Mbps supported working speed) + * QSPI Flash Controller + +* Interfaces + + * PCIe2.0 1-lane x2 + * Ethernet MAC 10/100/1000 Mbps x2 + * USB 2.0 Host/Device + * SDIO3.0 x2 + * CAN2.0B x2 + +* Audio + + * Cadence Tensilica HiFi-4 Audio DSP defined by U74MC or E24 + + * 4x 32x32-bit MACs + * some 72-bit accumulators + * limited support for 8x 32x16-bit MACs + * fourth VLIW slot + * two 64-bit loads per cycle + * optional floating point unit for four single-precision MACs per cycle + + * I2S/PCM-TDM + * I2S/PCM + * PDM x4 + * SPDIF + +* Graphics + + * Epicsemi ISP + * IMG BXE-4-32 Integrated GPU with 3D Acceleration + * 12-bit DVP + * MIPI-CSI + +* Cryptographic function + + * TRNG + * OTP + * Security HW Engine AES/DES/3DES/HASH/PKA + +* Block + + * PAD_SHARE used for reset + * Power Management Unit Clock Reset Generator + * PLL x3 + * JTAG + * RTC + * Temperature Sensor + +Supported SoC drivers: + +* ns16550 UART +* StarFive JH-7110 clock +* StarFive JH-7110 reset +* Cadence QSPI controller +* DesignWare MMC for eMMC/SD support +* PLDA PCIe controller +* Cadence USB2.0/3.0 controller + +Supported common peripherals: + +* AXP15060 Power Management Unit +* LPDDR4 2GB / 4GB / 8GB DRAM memory +* AT24C04F 4K bits (512 x 8) EEPROM +* QSPI NOR Flash 16M or SoC ROM UART loader for boot (selectable by GPIO) + +Extra supported peripherals present on some boards: + +* Motorcomm YT8531C Gigabit Ethernet PHY +* On-board VL805 PCIE-USB controller driver +* Status LED RGPIO3 + +Build U-Boot +------------ + +1. Add a RISC-V toolchain to your PATH. +2. Set cross compilation environment variable if needed: + + .. code-block:: none + + export CROSS_COMPILE=<riscv64 toolchain prefix> + +3. U-Boot for JH-7110 requires OpenSBI v1.5+ generic platform object + fw_dynamic.bin to be included in the Flattened Image Tree blob. OpenSBI may + first be built as below: + + .. code-block:: console + + # clone and/or update OpenSBI sources + git clone https://github.com/riscv/opensbi.git opensbi.git + git -C opensbi.git checkout v1.7 + # always clean build directory when building OpenSBI due to incomplete + # dependency tracking + make -C opensbi.git -O opensbi clean + make -C opensbi.git -O opensbi PLATFORM=generic + +4. Now build the First Stage BootLoader (U-Boot Secondary Program Loader) and + Second Boot Loader (OpenSBI + U-Boot Main): + + .. code-block:: console + + git clone https://source.denx.de/u-boot/u-boot.git u-boot.git + make -C u-boot.git -O u-boot starfive_visionfive2_defconfig + export OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin + make -C u-boot.git -O u-boot + + This will generate the U-Boot SPL image object post-processed with StarFive + SPL headers (u-boot/spl/u-boot-spl.bin.normal.out) as well as the FIT image + (u-boot/u-boot.itb) of OpenSBI and U-Boot Main. + + Note: Debug UART is not available from U-Boot SPL when U-Boot Main uses the + SBI interface for this. Add the following configuration changes above to + enable early debug UART in U-Boot SPL:: + + u-boot.git/scripts/config --file u-boot/.config \ + --set-val DEBUG_UART_BASE 0x10000000 \ + --set-val DEBUG_UART_CLOCK 24000000 \ + --enable DEBUG_UART_NS16550 \ + --disable DEBUG_SBI_CONSOLE \ + --set-val SPL_DEBUG_UART_BASE 0x10000000 \ + --set-val DEBUG_UART_SHIFT 2 + + make -C u-boot.git -O u-boot olddefconfig + +Boot description +---------------- + +JH-7110 reset vectors (one 36-bit address per each of four U7 cores) are located +split into four pairs of `SYS SYSCON`_ registers. The default value for all four +reset vectors is 2a000000. + +Execute-in-place BootROM code located at 2a000000 is not published by StarFive +however may be generally described as deciding based on [RGPIO2:RGPIO0] state +where to transfer SPL data from, verify headers and CRC, and then jump to code +execution in L2 LIM. + +Zero Stage Program Loader +^^^^^^^^^^^^^^^^^^^^^^^^^ + +====== =========== ============= +RGPIO2 Boot Vector ZSPL function +====== =========== ============= +0 0x2A00_0000 On-chip 32KB BootROM +1 0x2100_0000 QSPI XIP Flash (256mb) +====== =========== ============= + +JH-7110 ZSPL functionally consists of the selection of reset vector register +defaults at chip-design time in concert with BootROM code at 2a000000. `JH-7110 +Technical Reference Manual`_ says "if XIP flash is disabled in OTP +configuration, system cannot boot from XIP flash". Presumably there is some OTP +configuration involved but there is no documentation available with which to +expand on that topic. + +Zero Stage BootLoader +^^^^^^^^^^^^^^^^^^^^^ + +JH-7110 ZSBL is typically StarFive loader code in BootROM selected by RGPIO2 +pull-down. + +====== ====== ====================================== +RGPIO1 RGPIO0 StarFive loader function @ 0x2A00_0000 +====== ====== ====================================== +0 0 1-bit QSPI Flash offset 0x0 +0 1 SDIO3.0 +1 0 eMMC5.0 or eMMC5.1 +1 1 UART Serial XMODEM loader +====== ====== ====================================== + +Booting from SD-card or eMMC is only available on boards that have separate +switches for RGPIO0 and RGPIO1 (Milk-V Mars, StarFive VisionFive 2, Pine64 +Star64). Due to reported compatibility issues with some SD-cards it is +considered deprecated by StarFive. + +According to `JH-7110 Boot User Guide BootROM`_ the StarFive loader code reads +content to SRAM @ 0x0800_0000 from different media selected by [RGPIO1,RGPIO0]. + +`Description of StarFive loader`_ by the StarFive VisionFive2 board maintainer: + + The SD card boot mode is supported but the mmc driver of BootROM is not + compatible with a few SD cards. If you can't boot from a SD card, you can + change another card for a try. + + The eMMC boot mode loads SPL from sector 0, while the SD card boot mode + loads GPT header from sector 1 and then finds the partition whose GUID is + 2E54B353-1271-4842-806F-E436D6AF6985 to load SPL. So if we try to use GPT + partition in eMMC, it will fail to boot and report CRC (stored at 0x290) + failure. The workaround is using the backup load address. After the CRC + failure happens, it will try to load the SPL from the backup address + (stored at 0x4~0x7). That is why we write 0x00100000 to 0x4~0x7. But this + workaround is not a standard process and may destroy the partition + information stored in sector 0. + +There are additional unexplained GUID references in the JH-7110 MaskROM so the +description given is not complete. Attribution and modifications to the GPL2.0+ +source code used in StarFive loader have not been published as of this writing. +Due to the lack of verifiable documentation the upstream Linux devicetree does +not contain hints for mmc0 and mmc1 interfaces to be included in U-Boot SPL. As +of U-Boot release v2025.10 and newer the U-Boot specific devicetree override of +hints for mmc0 and mmc1 interfaces that are required for the deprecated modes +have been dropped marking the deprecation of these boot modes in U-Boot. + +Supported modes in U-Boot SPL are QSPI Flash and UART Serial XMODEM loader as +accepted by upstream Linux Kernel for StarFive JH-7110 common devicetree. + +First Stage BootLoader +^^^^^^^^^^^^^^^^^^^^^^ + +JH-7110 FSBL is typically U-Boot SPL or any vendor flash programming tool. + +U-Boot SPL initializes DRAM and configures PLLs needed by CPU and peripherals. + +====== ====== =================== +RGPIO1 RGPIO0 U-Boot SPL function +====== ====== =================== +0 0 BOOT_DEVICE_SPI @ offset 0x100000 (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) +0 1 BOOT_DEVICE_MMC2 @ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION +1 0 BOOT_DEVICE_MMC1 @ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION +1 1 BOOT_DEVICE_UART @ YMODEM +====== ====== =================== + +U-Boot SPL function is selected by configuration of [RGPIO1:RGPIO0] then copies +data to the start of DRAM and executes. + +=========== =========== +Address Description +=========== =========== +0x040000000 start of DRAM +0x240000000 uncached alias of DRAM +=========== =========== + +Note: The largest DRAM size with JH7110 is 8GB because the uncached alias of +DRAM begins at +8GB following the start of DRAM. + +Second Stage BootLoader (OpenSBI fw_dynamic.bin + U-Boot Main) +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +U-Boot Main is supported in S-mode and depends on prior stage M-mode SBI runtime +services provided by OpenSBI FW_DYNAMIC firmware. + +Loading U-Boot +-------------- + +Vendored versions of U-Boot (as pre-installed on supported boards) are generally +capable in U-Boot console of UART data transfer and updating QSPI Flash. +Additionally there may be a vendor Board Support Package using the deprecated +SDIO3.0 / eMMC5.0 boot modes. It is not documented here how to update U-Boot in +vendor BSP data images, nor use of the deprecated boot modes. The recommended +upgrade path is to update QSPI Flash in U-Boot console or from GNU/Linux OS. + +============ ============================ =========== +Flash offset Length Data source +============ ============================ =========== +0x000000 0x0f0000 (CONFIG_ENV_OFFSET) u-boot/spl/u-boot-spl.bin.normal.out +0x0f0000 0x010000 (CONFIG_ENV_SIZE) runtime generated defaults if bad CRC +0x100000 0xf00000 u-boot/u-boot.itb +============ ============================ =========== + +Recovery U-Boot console +^^^^^^^^^^^^^^^^^^^^^^^ + +With UART serial USB adapter and tio serial terminal:: + + tio /dev/ttyUSB0 -o 1 + tio 3.9 + Press ctrl-t q to quit + Connected to /dev/ttyUSB0 + + # Power on the board with [RGPIO1:RGPI0]=3 + (C)StarFive + CC + (C)StarFive + CCC + + (Control-t-x) + Please enter which X modem protocol to use: + (0) XMODEM-1K send + (1) XMODEM-CRC send + (2) XMODEM-CRC receive + + 0 + Send file with XMODEM-1K + Enter file name: + + u-boot/spl/u-boot-spl.bin.normal.out + Sending file 'u-boot/spl/u-boot-spl.bin.normal.out' + Press any key to abort transfer + ...| + Done + + # U-Boot SPL on the board with [RGPIO1:RGPI0]=3 + U-Boot SPL 2025.10 (Oct 23 2025 - 17:01:49 -0700) + DDR version: dc2e84f0. + Trying to boot from UART + CCC + + (Control-t-y) + Send file with YMODEM + Enter file name: + + u-boot/u-boot.itb + Sending file 'u-boot/u-boot.itb' + Press any key to abort transfer + ...| + Done + Loaded 3122637 bytes + + OpenSBI v1.7 + ____ _____ ____ _____ + / __ \ / ____| _ \_ _| + | | | |_ __ ___ _ __ | (___ | |_) || | + | | | | '_ \ / _ \ '_ \ \___ \| _ < | | + | |__| | |_) | __/ | | |____) | |_) || |_ + \____/| .__/ \___|_| |_|_____/|____/_____| + | | + |_| + + Platform Name : Pine64 Star64 + Platform Features : medeleg + Platform HART Count : 4 + Platform IPI Device : aclint-mswi + Platform Timer Device : aclint-mtimer @ 4000000Hz + Platform Console Device : uart8250 + Platform HSM Device : --- + Platform PMU Device : --- + Platform Reboot Device : pm-reset + Platform Shutdown Device : pm-reset + Platform Suspend Device : --- + Platform CPPC Device : --- + Firmware Base : 0x40000000 + Firmware Size : 353 KB + Firmware RW Offset : 0x40000 + Firmware RW Size : 97 KB + Firmware Heap Offset : 0x4c000 + Firmware Heap Size : 49 KB (total), 3 KB (reserved), 12 KB (used), 33 KB (free) + Firmware Scratch Size : 4096 B (total), 400 B (used), 3696 B (free) + Runtime SBI Version : 3.0 + Standard SBI Extensions : time,rfnc,ipi,base,hsm,srst,pmu,dbcn,fwft,legacy,dbtr,sse + Experimental SBI Extensions : none + + Domain0 Name : root + Domain0 Boot HART : 4 + Domain0 HARTs : 1*,2*,3*,4* + Domain0 Region00 : 0x0000000010000000-0x0000000010000fff M: (I,R,W) S/U: (R,W) + Domain0 Region01 : 0x0000000002000000-0x000000000200ffff M: (I,R,W) S/U: () + Domain0 Region02 : 0x0000000040040000-0x000000004005ffff M: (R,W) S/U: () + Domain0 Region03 : 0x0000000040000000-0x000000004003ffff M: (R,X) S/U: () + Domain0 Region04 : 0x000000000c000000-0x000000000fffffff M: (I,R,W) S/U: (R,W) + Domain0 Region05 : 0x0000000000000000-0xffffffffffffffff M: () S/U: (R,W,X) + Domain0 Next Address : 0x0000000040200000 + Domain0 Next Arg1 : 0x0000000042200000 + Domain0 Next Mode : S-mode + Domain0 SysReset : yes + Domain0 SysSuspend : yes + + Boot HART ID : 4 + Boot HART Domain : root + Boot HART Priv Version : v1.11 + Boot HART Base ISA : rv64imafdcbx + Boot HART ISA Extensions : zihpm,sdtrig + Boot HART PMP Count : 8 + Boot HART PMP Granularity : 12 bits + Boot HART PMP Address Bits : 34 + Boot HART MHPM Info : 2 (0x00000018) + Boot HART Debug Triggers : 8 triggers + Boot HART MIDELEG : 0x0000000000000222 + Boot HART MEDELEG : 0x000000000000b109 + + + U-Boot 2025.10 (Oct 23 2025 - 17:01:49 -0700) + + CPU: sifive,u74-mc + Model: Pine64 Star64 + DRAM: 4 GiB + Core: 160 devices, 29 uclasses, devicetree: board + WDT: Not starting watchdog@13070000 + MMC: mmc@16010000: 0, mmc@16020000: 1 + Loading Environment from SPIFlash... + SF: Detected gd25lq128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB + *** Warning - bad CRC, using default environment + + StarFive EEPROM format v2 + + --------EEPROM INFO-------- + Vendor : PINE64 + Product full SN: STAR64V1-2310-D004E000-0000xxxx + data version: 0x2 + PCB revision: 0xc1 + BOM revision: A + Ethernet MAC0 address: 6c:cf:39:00:xx:xx + Ethernet MAC1 address: 6c:cf:39:00:xx:xx + --------EEPROM INFO-------- + + starfive_7110_pcie pcie@9c0000000: Starfive PCIe bus probed. + In: serial@10000000 + Out: serial@10000000 + Err: serial@10000000 + Net: eth0: ethernet@16030000, eth1: ethernet@16040000 + starting USB... + Register 2000820 NbrPorts 2 + Starting the controller + USB XHCI 1.00 + Bus usb@0: 4 USB Device(s) found + scanning usb for storage devices... 0 Storage Device(s) found + Working FDT set to ff717fe0 + Hit any key to stop autoboot: 2 1 0 + + (enter) + StarFive # + +Update QSPI Flash using U-Boot console +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +With UART serial USB adapter and tio serial terminal:: + + tio /dev/ttyUSB0 -o 1 + tio 3.9 + Press ctrl-t q to quit + Connected to /dev/ttyUSB0 + + (enter) + StarFive # sf probe - load mmc 1:1 $kernel_addr_r u-boot-spl.bin.normal.out - sf update $kernel_addr_r 0 $filesize - load mmc 1:1 $kernel_addr_r u-boot.itb - sf update $kernel_addr_r 0x100000 $filesize + StarFive # sf probe + SF: Detected gd25lq128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB -For loading the files from a TFTP server refer to the dhcp and tftpboot -commands. + loady && sf update $loadaddr 0 $filesize + StarFive # loady && sf update $loadaddr 0 $filesize + ## Ready for binary (ymodem) download to 0x82000000 at 115200 bps... + CCC -After updating U-Boot you may want to erase a saved environment and reboot. + (Control-t-y) + Send file with YMODEM + Enter file name: -.. code-block:: console + u-boot/spl/u-boot-spl.bin.normal.out + Sending file 'u-boot/spl/u-boot-spl.bin.normal.out' + Press any key to abort transfer + ...| + Done + ## Total Size = 0x00024eb7 = 151223 Bytes + ## Start Addr = 0x82000000 + device 0 offset 0x0, size 0x24eb7 + 151223 bytes written, 0 bytes skipped in 0.634s, speed 243096 B/s + StarFive # env erase - reset - -Booting from SD-Card --------------------- - -The device boot ROM loads U-Boot SPL (u-boot-spl.bin.normal.out) from the -partition with type GUID 2E54B353-1271-4842-806F-E436D6AF6985. You are free -to choose any partition number. - -With the default configuration U-Boot SPL loads the U-Boot FIT image -(u-boot.itb) from partition 2 (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2). -When formatting it is recommended to use GUID -BC13C2FF-59E6-4262-A352-B275FD6F7172 for this partition. - -Booting from eMMC ------------------ - -The device boot ROM tries to load U-Boot SPL (u-boot-spl.bin.normal.out) from -sector 0 of the eMMC's main hardware partition. But this conflicts with GPT -partitioning. Fortunately eMMC can alternatively load U-Boot SPL from a backup -position. - -For U-Boot SPL (u-boot-spl.bin.normal.out) starting at sector 2048 (position -0x100000) write the following bytes to the eMMC device after GPT partitioning: - -======= ======================== -Address Bytes -======= ======================== -0x0000 40 02 00 00 00 00 10 00 -0x0290 40 02 00 00 00 00 10 00 -======= ======================== - -With the default configuration U-Boot SPL loads the U-Boot FIT image -(u-boot.itb) from partition 2 (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2). -When formatting it is recommended to use GUID -BC13C2FF-59E6-4262-A352-B275FD6F7172 for this partition. - -Booting from UART ------------------ - -The boot ROM supports the X-modem protocol to upload -spl/u-boot-spl.bin.normal.out. U-Boot SPL support loading the FIT image -u-boot.itb via the Y-modem protocol. - -Due to restrictions of the boot ROM not all X-modem implementations are -compatible. The package tio (https://github.com/tio/tio) has been found to be -usable. - -Debug UART ----------- - -By default the SBI interface is used for the debug UART. But this only works -in main U-Boot. To enable the debug UART in SPL, too, use the following -settings:: - - CONFIG_DEBUG_UART=y - CONFIG_DEBUG_UART_NS16550=y - CONFIG_DEBUG_UART_BASE=0x10000000 - CONFIG_SPL_DEBUG_UART_BASE=0x10000000 - CONFIG_DEBUG_UART_CLOCK=24000000 - CONFIG_DEBUG_UART_SHIFT=2 + StarFive # env erase + Erasing Environment on SPIFlash... OK + StarFive # + + loady && sf update $loadaddr 100000 $filesize + StarFive # loady $loadaddr && sf update $loadaddr 100000 $filesize + ## Ready for binary (ymodem) download to 0x82000000 at 115200 bps... + CCC + + (Control-t-y) + Send file with YMODEM + Enter file name: + + u-boot/u-boot.itb + Sending file 'u-boot/u-boot.itb' + Press any key to abort transfer + ...| + Done + ## Total Size = 0x002fa5cd = 3122637 Bytes + ## Start Addr = 0x82000000 + device 0 offset 0x100000, size 0x2fa5cd + 3122637 bytes written, 0 bytes skipped in 18.137s, speed 176272 B/s + StarFive # + +Update QSPI Flash from GNU/Linux OS +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +With mtd-utils:: + + cat /proc/mtd + dev: size erasesize name + mtd0: 000f0000 00001000 "spl" + mtd1: 00010000 00001000 "uboot-env" + mtd2: 00f00000 00001000 "uboot" + + flashcp --verbose u-boot/spl/u-boot-spl.bin.normal.out /dev/mtd0 + Erasing blocks: 37/37 (100%) + Writing data: 147k/147k (100%) + Verifying data: 147k/147k (100%) + + flashcp --verbose --erase-all /dev/zero /dev/mtd1 + Erasing blocks: 16/16 (100%) + Writing data: 0k/0k (100%) + Verifying data: 0k/0k (100%) + + flashcp --verbose u-boot/u-boot.itb /dev/mtd2 + Erasing blocks: 763/763 (100%) + Writing data: 3049k/3049k (100%) + Verifying data: 3049k/3049k (100%) diff --git a/doc/board/starfive/milk-v_mars.rst b/doc/board/starfive/milk-v_mars.rst index ce4539a46f1..0dbc500b734 100644 --- a/doc/board/starfive/milk-v_mars.rst +++ b/doc/board/starfive/milk-v_mars.rst @@ -7,38 +7,6 @@ U-Boot for the Milk-V Mars uses the same U-Boot binaries as the VisionFive 2 board. In U-Boot SPL the actual board is detected and the device-tree patched accordingly. -Building --------- - -1. Add the RISC-V toolchain to your PATH. -2. Setup ARCH & cross compilation environment variable: - -.. code-block:: none - - export CROSS_COMPILE=<riscv64 toolchain prefix> - -The M-mode software OpenSBI provides the supervisor binary interface (SBI) and -is responsible for the switch to S-Mode. It is a prerequisite to build U-Boot. -Support for the JH7110 was introduced in OpenSBI 1.2. It is recommended to use -a current release. - -.. code-block:: console - - git clone https://github.com/riscv/opensbi.git - cd opensbi - make PLATFORM=generic FW_TEXT_START=0x40000000 FW_OPTIONS=0 - -Now build the U-Boot SPL and U-Boot proper. - -.. code-block:: console - - cd <U-Boot-dir> - make starfive_visionfive2_defconfig - make OPENSBI=$(opensbi_dir)/build/platform/generic/firmware/fw_dynamic.bin - -This will generate the U-Boot SPL image (spl/u-boot-spl.bin.normal.out) as well -as the FIT image (u-boot.itb) with OpenSBI and U-Boot. - Device-tree selection --------------------- @@ -57,45 +25,4 @@ environment or the configuration variable CONFIG_DEFAULT_FDT_FILE can be used to set to provide a default value. -Preparing the SD-Card ---------------------- - -The device firmware loads U-Boot SPL (u-boot-spl.bin.normal.out) from the -partition with type GUID 2E54B353-1271-4842-806F-E436D6AF6985. You are free -to choose any partition number. - -With the default configuration U-Boot SPL loads the U-Boot FIT image -(u-boot.itb) from partition 2 (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2). -When formatting it is recommended to use GUID -BC13C2FF-59E6-4262-A352-B275FD6F7172 for this partition. - -The FIT image (u-boot.itb) is a combination of OpenSBI's fw_dynamic.bin, -u-boot-nodtb.bin and the device tree blob. - -Format the SD card (make sure the disk has GPT, otherwise use gdisk to switch) - -.. code-block:: bash - - sudo sgdisk --clear \ - --set-alignment=2 \ - --new=1:4096:8191 --change-name=1:spl --typecode=1:2E54B353-1271-4842-806F-E436D6AF6985\ - --new=2:8192:16383 --change-name=2:uboot --typecode=2:BC13C2FF-59E6-4262-A352-B275FD6F7172 \ - --new=3:16384:1654784 --change-name=3:system --typecode=3:EBD0A0A2-B9E5-4433-87C0-68B6B72699C7 \ - /dev/sdb - -Copy U-Boot to the SD card - -.. code-block:: bash - - sudo dd if=u-boot-spl.bin.normal.out of=/dev/sdb1 - sudo dd if=u-boot.itb of=/dev/sdb2 - - sudo mount /dev/sdb3 /mnt/ - sudo cp u-boot-spl.bin.normal.out /mnt/ - sudo cp u-boot.itb /mnt/ - sudo cp Image.gz /mnt/ - sudo cp initramfs.cpio.gz /mnt/ - sudo cp jh7110-starfive-visionfive-2.dtb /mnt/ - sudo umount /mnt - .. include:: jh7110_common.rst diff --git a/doc/board/starfive/pine64_star64.rst b/doc/board/starfive/pine64_star64.rst index d1752c452da..78a330be455 100644 --- a/doc/board/starfive/pine64_star64.rst +++ b/doc/board/starfive/pine64_star64.rst @@ -7,38 +7,6 @@ U-Boot for the Star64 uses the same U-Boot binaries as the VisionFive 2 board. In U-Boot SPL the actual board is detected and the device-tree patched accordingly. -Building --------- - -1. Add the RISC-V toolchain to your PATH. -2. Setup ARCH & cross compilation environment variable: - -.. code-block:: none - - export CROSS_COMPILE=<riscv64 toolchain prefix> - -The M-mode software OpenSBI provides the supervisor binary interface (SBI) and -is responsible for the switch to S-Mode. It is a prerequisite to build U-Boot. -Support for the JH7110 was introduced in OpenSBI 1.2. It is recommended to use -a current release. - -.. code-block:: console - - git clone https://github.com/riscv/opensbi.git - cd opensbi - make PLATFORM=generic FW_TEXT_START=0x40000000 - -Now build the U-Boot SPL and U-Boot proper. - -.. code-block:: console - - cd <U-Boot-dir> - make starfive_visionfive2_defconfig - make OPENSBI=$(opensbi_dir)/build/platform/generic/firmware/fw_dynamic.bin - -This will generate the U-Boot SPL image (spl/u-boot-spl.bin.normal.out) as well -as the FIT image (u-boot.itb) with OpenSBI and U-Boot. - Device-tree selection --------------------- @@ -55,49 +23,6 @@ environment or the configuration variable CONFIG_DEFAULT_FDT_FILE can be used to set to provide a default value. -Preparing the SD-Card ---------------------- - -The device firmware loads U-Boot SPL (u-boot-spl.bin.normal.out) from the -partition with type GUID 2E54B353-1271-4842-806F-E436D6AF6985. You are free -to choose any partition number. - -With the default configuration U-Boot SPL loads the U-Boot FIT image -(u-boot.itb) from partition 2 (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2). -When formatting it is recommended to use GUID -BC13C2FF-59E6-4262-A352-B275FD6F7172 for this partition. - -The FIT image (u-boot.itb) is a combination of OpenSBI's fw_dynamic.bin, -u-boot-nodtb.bin and the device tree blob. - -Format the SD card (make sure the disk has GPT, otherwise use gdisk to switch) - -.. code-block:: bash - - sudo sgdisk --clear \ - --set-alignment=2 \ - --new=1:4096:8191 --change-name=1:spl --typecode=1:2E54B353-1271-4842-806F-E436D6AF6985\ - --new=2:8192:16383 --change-name=2:uboot --typecode=2:BC13C2FF-59E6-4262-A352-B275FD6F7172 \ - --new=3:16384:1654784 --change-name=3:system --typecode=3:EBD0A0A2-B9E5-4433-87C0-68B6B72699C7 \ - /dev/sdb - -Copy U-Boot to the SD card - -.. code-block:: bash - - sudo dd if=u-boot-spl.bin.normal.out of=/dev/sdb1 - sudo dd if=u-boot.itb of=/dev/sdb2 - - sudo mount /dev/sdb3 /mnt/ - sudo cp u-boot-spl.bin.normal.out /mnt/ - sudo cp u-boot.itb /mnt/ - sudo cp Image.gz /mnt/ - sudo cp initramfs.cpio.gz /mnt/ - sudo cp jh7110-starfive-visionfive-2.dtb /mnt/ - sudo umount /mnt - -.. include:: jh7110_common.rst - Serial Number and MAC address issues ------------------------------------ @@ -183,3 +108,5 @@ The MAC addresses may be "set" as follows by writing as a custom config to SPI env set eth1addr 6c:cf:39:ce:64:5a env save reset + +.. include:: jh7110_common.rst diff --git a/doc/board/starfive/visionfive2.rst b/doc/board/starfive/visionfive2.rst index 11121a1751a..c92ea16f91b 100644 --- a/doc/board/starfive/visionfive2.rst +++ b/doc/board/starfive/visionfive2.rst @@ -3,74 +3,9 @@ StarFive VisionFive2 ==================== -JH7110 RISC-V SoC ------------------ - -The JH7110 is 4+1 64-bit RISC-V SoC from StarFive. - The StarFive VisionFive2 development platform is based on JH7110 and capable of running Linux. -Mainline support ----------------- - -The support for following drivers are already enabled: - -1. ns16550 UART Driver. -2. StarFive JH7110 clock Driver. -3. StarFive JH7110 reset Driver. -4. Cadence QSPI controller Driver. -5. MMC SPI Driver for MMC/SD support. -6. PLDA PCIE controller driver. -7. On-board VL805 PCIE-USB controller driver. - -Booting from MMC using U-Boot SPL ---------------------------------- - -The current U-Boot port is supported in S-mode only and loaded from DRAM. - -A prior stage M-mode firmware/bootloader (e.g OpenSBI) is required to -boot the u-boot.itb in S-mode and provide M-mode runtime services. - -Currently, the u-boot.itb is used as a dynamic of the OpenSBI FW_DYNAMIC -firmware with the latest. - -Building --------- - -1. Add the RISC-V toolchain to your PATH. -2. Setup ARCH & cross compilation environment variable: - -.. code-block:: none - - export CROSS_COMPILE=<riscv64 toolchain prefix> - -Before building U-Boot SPL, OpenSBI must be built first. OpenSBI can be -cloned and built for JH7110 as below: - -.. code-block:: console - - git clone https://github.com/riscv/opensbi.git - cd opensbi - make PLATFORM=generic FW_TEXT_START=0x40000000 FW_OPTIONS=0 - -The VisionFive 2 support for OpenSBI was introduced after the v1.2 release. - -More detailed description of steps required to build FW_DYNAMIC firmware -is beyond the scope of this document. Please refer OpenSBI documenation. -(Note: OpenSBI git repo is at https://github.com/riscv/opensbi.git) - -Now build the U-Boot SPL and U-Boot proper - -.. code-block:: console - - cd <U-Boot-dir> - make starfive_visionfive2_defconfig - make OPENSBI=$(opensbi_dir)/opensbi/build/platform/generic/firmware/fw_dynamic.bin - -This will generate the U-Boot SPL image (spl/u-boot-spl.bin.normal.out) as well -as the FIT image (u-boot.itb) with OpenSBI and U-Boot. - Device-tree selection --------------------- @@ -89,388 +24,4 @@ environment or the configuration variable CONFIG_DEFAULT_FDT_FILE can be used to provide a default value. -Flashing --------- - -The device firmware loads U-Boot SPL (u-boot-spl.bin.normal.out) from the -partition with type GUID 2E54B353-1271-4842-806F-E436D6AF6985. You are free -to choose any partition number. - -With the default configuration U-Boot SPL loads the U-Boot FIT image -(u-boot.itb) from partition 2 (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2). -When formatting it is recommended to use GUID -BC13C2FF-59E6-4262-A352-B275FD6F7172 for this partition. - -The FIT image (u-boot.itb) is a combination of OpenSBI's fw_dynamic.bin, -u-boot-nodtb.bin and the device tree blob -(jh7110-starfive-visionfive-2-v1.3b.dtb or -jh7110-starfive-visionfive-2-v1.2a.dtb). - -Format the SD card (make sure the disk has GPT, otherwise use gdisk to switch) - -.. code-block:: bash - - sudo sgdisk --clear \ - --set-alignment=2 \ - --new=1:4096:8191 --change-name=1:spl --typecode=1:2E54B353-1271-4842-806F-E436D6AF6985\ - --new=2:8192:16383 --change-name=2:uboot --typecode=2:BC13C2FF-59E6-4262-A352-B275FD6F7172 \ - --new=3:16384:1654784 --change-name=3:system --typecode=3:EBD0A0A2-B9E5-4433-87C0-68B6B72699C7 \ - /dev/sdb - sudo mkfs.vfat -F32 /dev/sdb3 - -Program the SD card - -.. code-block:: bash - - sudo dd if=u-boot-spl.bin.normal.out of=/dev/sdb1 - sudo dd if=u-boot.itb of=/dev/sdb2 - - sudo mount /dev/sdb3 /mnt/ - sudo cp u-boot-spl.bin.normal.out /mnt/ - sudo cp u-boot.itb /mnt/ - sudo cp Image.gz /mnt/ - sudo cp initramfs.cpio.gz /mnt/ - sudo cp jh7110-starfive-visionfive-2.dtb /mnt/ - sudo umount /mnt - .. include:: jh7110_common.rst - -Sample boot log from StarFive VisionFive2 board ------------------------------------------------ - -.. code-block:: none - - - U-Boot SPL 2023.04-rc2-00055-gfc43b9c51a-dirty (Mar 02 2023 - 10:51:39 +0800) - DDR version: dc2e84f0. - Trying to boot from MMC2 - - OpenSBI v1.2-80-g4b28afc - ____ _____ ____ _____ - / __ \ / ____| _ \_ _| - | | | |_ __ ___ _ __ | (___ | |_) || | - | | | | '_ \ / _ \ '_ \ \___ \| _ < | | - | |__| | |_) | __/ | | |____) | |_) || |_ - \____/| .__/ \___|_| |_|_____/|____/_____| - | | - |_| - - Platform Name : StarFive VisionFive 2 v1.3B - Platform Features : medeleg - Platform HART Count : 5 - Platform IPI Device : aclint-mswi - Platform Timer Device : aclint-mtimer @ 4000000Hz - Platform Console Device : uart8250 - Platform HSM Device : --- - Platform PMU Device : --- - Platform Reboot Device : --- - Platform Shutdown Device : --- - Platform Suspend Device : --- - Firmware Base : 0x40000000 - Firmware Size : 264 KB - Firmware RW Offset : 0x20000 - Runtime SBI Version : 1.0 - - Domain0 Name : root - Domain0 Boot HART : 2 - Domain0 HARTs : 0*,1*,2*,3*,4* - Domain0 Region00 : 0x0000000002000000-0x000000000200ffff M: (I,R,W) S/U: () - Domain0 Region01 : 0x0000000040000000-0x000000004001ffff M: (R,X) S/U: () - Domain0 Region02 : 0x0000000040000000-0x000000004007ffff M: (R,W) S/U: () - Domain0 Region03 : 0x0000000000000000-0xffffffffffffffff M: (R,W,X) S/U: (R,W,X) - Domain0 Next Address : 0x0000000040200000 - Domain0 Next Arg1 : 0x0000000040287970 - Domain0 Next Mode : S-mode - Domain0 SysReset : yes - Domain0 SysSuspend : yes - - Boot HART ID : 2 - Boot HART Domain : root - Boot HART Priv Version : v1.11 - Boot HART Base ISA : rv64imafdcbx - Boot HART ISA Extensions : none - Boot HART PMP Count : 8 - Boot HART PMP Granularity : 4096 - Boot HART PMP Address Bits: 34 - Boot HART MHPM Count : 2 - Boot HART MIDELEG : 0x0000000000000222 - Boot HART MEDELEG : 0x000000000000b109 - - - U-Boot 2023.04-rc2-00055-gfc43b9c51a-dirty (Mar 02 2023 - 10:51:39 +0800) - - CPU: rv64imac_zba_zbb - Model: StarFive VisionFive 2 v1.3B - DRAM: 8 GiB - Core: 107 devices, 18 uclasses, devicetree: separate - MMC: mmc@16010000: 0, mmc@16020000: 1 - Loading Environment from nowhere... OK - In: serial@10000000 - Out: serial@10000000 - Err: serial@10000000 - Net: No ethernet found. - Working FDT set to ff74a340 - Hit any key to stop autoboot: 0 - StarFive # - StarFive # version - U-Boot 2023.04-rc2-00055-gfc43b9c51a-dirty (Mar 02 2023 - 10:51:39 +0800) - - riscv64-buildroot-linux-gnu-gcc.br_real (Buildroot VF2_515_v1.0.0_rc4) 10.3.0 - GNU ld (GNU Binutils) 2.36.1 - StarFive # - StarFive # mmc dev 1 - switch to partitions #0, OK - mmc1 is current device - StarFive # mmc info - Device: mmc@16020000 - Manufacturer ID: 9f - OEM: 5449 - Name: SD64G - Bus Speed: 50000000 - Mode: SD High Speed (50MHz) - Rd Block Len: 512 - SD version 3.0 - High Capacity: Yes - Capacity: 58.3 GiB - Bus Width: 4-bit - Erase Group Size: 512 Bytes - StarFive # - StarFive # mmc part - - Partition Map for MMC device 1 -- Partition Type: EFI - - Part Start LBA End LBA Name - Attributes - Type GUID - Partition GUID - 1 0x00001000 0x00001fff "spl" - attrs: 0x0000000000000000 - type: 2e54b353-1271-4842-806f-e436d6af6985 - (2e54b353-1271-4842-806f-e436d6af6985) - guid: d5ee2056-3020-475b-9a33-25b4257c9f12 - 2 0x00002000 0x00003fff "uboot" - attrs: 0x0000000000000000 - type: bc13c2ff-59e6-4262-a352-b275fd6f7172 - (bc13c2ff-59e6-4262-a352-b275fd6f7172) - guid: 379ab7fe-fd0c-4149-b758-960c1cbfc0cc - 3 0x00004000 0x00194000 "system" - attrs: 0x0000000000000000 - type: ebd0a0a2-b9e5-4433-87c0-68b6b72699c7 - (data) - guid: 539a6df9-4655-4953-8541-733ca36eb1db - StarFive # - StarFive # fatls mmc 1:3 - 6429424 Image.gz - 717705 u-boot.itb - 125437 u-boot-spl.bin.normal.out - 152848495 initramfs.cpio.gz - 11285 jh7110-starfive-visionfive-2-v1.3b.dtb - - 5 file(s), 0 dir(s) - - StarFive # fatload mmc 1:3 ${kernel_addr_r} Image.gz - 6429424 bytes read in 394 ms (15.6 MiB/s) - StarFive # fatload mmc 1:3 ${fdt_addr_r} jh7110-starfive-visionfive-2.dtb - 11285 bytes read in 5 ms (2.2 MiB/s) - StarFive # fatload mmc 1:3 ${ramdisk_addr_r} initramfs.cpio.gz - 152848495 bytes read in 9271 ms (15.7 MiB/s) - StarFive # booti ${kernel_addr_r} ${ramdisk_addr_r}:${filesize} ${fdt_addr_r} - Uncompressing Kernel Image - ## Flattened Device Tree blob at 46000000 - Booting using the fdt blob at 0x46000000 - Working FDT set to 46000000 - Loading Ramdisk to f5579000, end fe73d86f ... OK - Loading Device Tree to 00000000f5573000, end 00000000f5578c14 ... OK - Working FDT set to f5573000 - - Starting kernel ... - - - ] Linux version 6.2.0-starfive-00026-g11934a315b67 (wyh@wyh-VirtualBox) (riscv64-linux-gnu-gcc (Ubuntu 7.5.0-3ubuntu1~18.04) 7.5.0, GNU ld (GNU Binutils for Ubuntu) 2.30) #1 SMP Thu Mar 2 14:51:36 CST 2023 - [ 0.000000] OF: fdt: Ignoring memory range 0x40000000 - 0x40200000 - [ 0.000000] Machine model: StarFive VisionFive 2 v1.3B - [ 0.000000] efi: UEFI not found. - [ 0.000000] Zone ranges: - [ 0.000000] DMA32 [mem 0x0000000040200000-0x00000000ffffffff] - [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff] - [ 0.000000] Movable zone start for each node - [ 0.000000] Early memory node ranges - [ 0.000000] node 0: [mem 0x0000000040200000-0x000000013fffffff] - [ 0.000000] Initmem setup node 0 [mem 0x0000000040200000-0x000000013fffffff] - [ 0.000000] On node 0, zone DMA32: 512 pages in unavailable ranges - [ 0.000000] SBI specification v1.0 detected - [ 0.000000] SBI implementation ID=0x1 Version=0x10002 - [ 0.000000] SBI TIME extension detected - [ 0.000000] SBI IPI extension detected - [ 0.000000] SBI RFENCE extension detected - [ 0.000000] SBI HSM extension detected - [ 0.000000] CPU with hartid=0 is not available - [ 0.000000] CPU with hartid=0 is not available - [ 0.000000] CPU with hartid=0 is not available - [ 0.000000] riscv: base ISA extensions acdfim - [ 0.000000] riscv: ELF capabilities acdfim - [ 0.000000] percpu: Embedded 18 pages/cpu s35960 r8192 d29576 u73728 - [ 0.000000] pcpu-alloc: s35960 r8192 d29576 u73728 alloc=18*4096 - [ 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 - [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031688 - [ 0.000000] Kernel command line: console=ttyS0,115200 debug rootwait earlycon=sbi - [ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear) - [ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear) - [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off - [ 0.000000] software IO TLB: area num 4. - [ 0.000000] software IO TLB: mapped [mem 0x00000000f1573000-0x00000000f5573000] (64MB) - [ 0.000000] Virtual kernel memory layout: - [ 0.000000] fixmap : 0xffffffc6fee00000 - 0xffffffc6ff000000 (2048 kB) - [ 0.000000] pci io : 0xffffffc6ff000000 - 0xffffffc700000000 ( 16 MB) - [ 0.000000] vmemmap : 0xffffffc700000000 - 0xffffffc800000000 (4096 MB) - [ 0.000000] vmalloc : 0xffffffc800000000 - 0xffffffd800000000 ( 64 GB) - [ 0.000000] modules : 0xffffffff0136a000 - 0xffffffff80000000 (2028 MB) - [ 0.000000] lowmem : 0xffffffd800000000 - 0xffffffd8ffe00000 (4094 MB) - [ 0.000000] kernel : 0xffffffff80000000 - 0xffffffffffffffff (2047 MB) - [ 0.000000] Memory: 3867604K/4192256K available (8012K kernel code, 4919K rwdata, 4096K rodata, 2190K init, 476K bss, 324652K reserved, 0K cma-reserved) - [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 - [ 0.000000] rcu: Hierarchical RCU implementation. - [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=64 to nr_cpu_ids=4. - [ 0.000000] rcu: RCU debug extended QS entry/exit. - [ 0.000000] Tracing variant of Tasks RCU enabled. - [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies. - [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4 - [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 - [ 0.000000] CPU with hartid=0 is not available - [ 0.000000] riscv-intc: unable to find hart id for /cpus/cpu@0/interrupt-controller - [ 0.000000] riscv-intc: 64 local interrupts mapped - [ 0.000000] plic: interrupt-controller@c000000: mapped 136 interrupts with 4 handlers for 9 contexts. - [ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention. - [ 0.000000] riscv-timer: riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [4] - [ 0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1d854df40, max_idle_ns: 881590404240 ns - [ 0.000003] sched_clock: 64 bits at 4MHz, resolution 250ns, wraps every 2199023255500ns - [ 0.000437] Console: colour dummy device 80x25 - [ 0.000568] Calibrating delay loop (skipped), value calculated using timer frequency.. 8.00 BogoMIPS (lpj=16000) - [ 0.000602] pid_max: default: 32768 minimum: 301 - [ 0.000752] LSM: initializing lsm=capability,integrity - [ 0.001071] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear) - [ 0.001189] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear) - [ 0.004201] CPU node for /cpus/cpu@0 exist but the possible cpu range is :0-3 - [ 0.007426] cblist_init_generic: Setting adjustable number of callback queues. - [ 0.007457] cblist_init_generic: Setting shift to 2 and lim to 1. - [ 0.007875] riscv: ELF compat mode unsupported - [ 0.007902] ASID allocator disabled (0 bits) - [ 0.008405] rcu: Hierarchical SRCU implementation. - [ 0.008426] rcu: Max phase no-delay instances is 1000. - [ 0.009247] EFI services will not be available. - [ 0.010738] smp: Bringing up secondary CPUs ... - [ 0.018358] smp: Brought up 1 node, 4 CPUs - [ 0.021776] devtmpfs: initialized - [ 0.027337] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns - [ 0.027389] futex hash table entries: 1024 (order: 4, 65536 bytes, linear) - [ 0.027888] pinctrl core: initialized pinctrl subsystem - [ 0.029881] NET: Registered PF_NETLINK/PF_ROUTE protocol family - [ 0.030401] audit: initializing netlink subsys (disabled) - [ 0.031041] audit: type=2000 audit(0.028:1): state=initialized audit_enabled=0 res=1 - [ 0.031943] cpuidle: using governor menu - [ 0.043011] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages - [ 0.043033] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page - [ 0.044943] iommu: Default domain type: Translated - [ 0.044965] iommu: DMA domain TLB invalidation policy: strict mode - [ 0.046089] SCSI subsystem initialized - [ 0.046733] libata version 3.00 loaded. - [ 0.047231] usbcore: registered new interface driver usbfs - [ 0.047315] usbcore: registered new interface driver hub - [ 0.047420] usbcore: registered new device driver usb - [ 0.049770] vgaarb: loaded - [ 0.050277] clocksource: Switched to clocksource riscv_clocksource - [ 0.084690] NET: Registered PF_INET protocol family - [ 0.085561] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear) - [ 0.093010] tcp_listen_portaddr_hash hash table entries: 2048 (order: 4, 65536 bytes, linear) - [ 0.093152] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear) - [ 0.093224] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear) - [ 0.093821] TCP bind hash table entries: 32768 (order: 9, 2097152 bytes, linear) - [ 0.117880] TCP: Hash tables configured (established 32768 bind 32768) - [ 0.118500] UDP hash table entries: 2048 (order: 5, 196608 bytes, linear) - [ 0.118881] UDP-Lite hash table entries: 2048 (order: 5, 196608 bytes, linear) - [ 0.119675] NET: Registered PF_UNIX/PF_LOCAL protocol family - [ 0.121749] RPC: Registered named UNIX socket transport module. - [ 0.121776] RPC: Registered udp transport module. - [ 0.121784] RPC: Registered tcp transport module. - [ 0.121791] RPC: Registered tcp NFSv4.1 backchannel transport module. - [ 0.121816] PCI: CLS 0 bytes, default 64 - [ 0.124101] Unpacking initramfs... - [ 0.125468] workingset: timestamp_bits=46 max_order=20 bucket_order=0 - [ 0.128372] NFS: Registering the id_resolver key type - [ 0.128498] Key type id_resolver registered - [ 0.128525] Key type id_legacy registered - [ 0.128625] nfs4filelayout_init: NFSv4 File Layout Driver Registering... - [ 0.128649] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering... - [ 0.129358] 9p: Installing v9fs 9p2000 file system support - [ 0.130179] NET: Registered PF_ALG protocol family - [ 0.130499] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247) - [ 0.130544] io scheduler mq-deadline registered - [ 0.130556] io scheduler kyber registered - [ 0.416754] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled - [ 0.420857] SuperH (H)SCI(F) driver initialized - [ 0.443735] loop: module loaded - [ 0.448605] e1000e: Intel(R) PRO/1000 Network Driver - [ 0.448627] e1000e: Copyright(c) 1999 - 2015 Intel Corporation. - [ 0.450716] usbcore: registered new interface driver uas - [ 0.450832] usbcore: registered new interface driver usb-storage - [ 0.451638] mousedev: PS/2 mouse device common for all mice - [ 0.453465] sdhci: Secure Digital Host Controller Interface driver - [ 0.453487] sdhci: Copyright(c) Pierre Ossman - [ 0.453584] sdhci-pltfm: SDHCI platform and OF driver helper - [ 0.454140] usbcore: registered new interface driver usbhid - [ 0.454174] usbhid: USB HID core driver - [ 0.454833] riscv-pmu-sbi: SBI PMU extension is available - [ 0.454920] riscv-pmu-sbi: 16 firmware and 4 hardware counters - [ 0.454942] riscv-pmu-sbi: Perf sampling/filtering is not supported as sscof extension is not available - [ 0.457071] NET: Registered PF_INET6 protocol family - [ 0.460627] Segment Routing with IPv6 - [ 0.460821] In-situ OAM (IOAM) with IPv6 - [ 0.461005] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver - [ 0.462712] NET: Registered PF_PACKET protocol family - [ 0.462933] 9pnet: Installing 9P2000 support - [ 0.463141] Key type dns_resolver registered - [ 0.463168] start plist test - [ 0.469261] end plist test - [ 0.506774] debug_vm_pgtable: [debug_vm_pgtable ]: Validating architecture page table helpers - [ 0.553683] gpio gpiochip0: Static allocation of GPIO base is deprecated, use dynamic allocation. - [ 0.554741] starfive-jh7110-sys-pinctrl 13040000.pinctrl: StarFive GPIO chip registered 64 GPIOs - [ 0.555900] gpio gpiochip1: Static allocation of GPIO base is deprecated, use dynamic allocation. - [ 0.556772] starfive-jh7110-aon-pinctrl 17020000.pinctrl: StarFive GPIO chip registered 4 GPIOs - [ 0.559454] printk: console [ttyS0] disabled - [ 0.579948] 10000000.serial: ttyS0 at MMIO 0x10000000 (irq = 3, base_baud = 1500000) is a 16550A - [ 0.580082] printk: console [ttyS0] enabled - [ 13.642680] Freeing initrd memory: 149264K - [ 13.651051] Freeing unused kernel image (initmem) memory: 2188K - [ 13.666431] Run /init as init process - [ 13.670116] with arguments: - [ 13.673168] /init - [ 13.675488] with environment: - [ 13.678668] HOME=/ - [ 13.681038] TERM=linux - Starting syslogd: OK - Starting klogd: OK - Running sysctl: OK - Populating /dev using udev: [ 14.145944] udevd[93]: starting version 3.2.10 - [ 15.214287] random: crng init done - [ 15.240816] udevd[94]: starting eudev-3.2.10 - done - Saving random seed: OK - Starting system message bus: dbus[122]: Unknown username "pulse" in message bus configuration file - done - Starting rpcbind: OK - Starting iptables: OK - Starting bluetoothd: OK - Starting network: Waiting for interface eth0 to appear............... timeout! - run-parts: /etc/network/if-pre-up.d/wait_iface: exit status 1 - FAIL - Starting dropbear sshd: OK - Starting NFS statd: OK - Starting NFS services: OK - Starting NFS daemon: rpc.nfsd: Unable to access /proc/fs/nfsd errno 2 (No such file or directory). - Please try, as root, 'mount -t nfsd nfsd /proc/fs/nfsd' and then restart rpc.nfsd to correct the problem - FAIL - Starting NFS mountd: OK - Starting DHCP server: FAIL - - Welcome to Buildroot - buildroot login: diff --git a/doc/board/toradex/aquila-am69.rst b/doc/board/toradex/aquila-am69.rst new file mode 100644 index 00000000000..43d0f6b873b --- /dev/null +++ b/doc/board/toradex/aquila-am69.rst @@ -0,0 +1,219 @@ +.. SPDX-License-Identifier: GPL-2.0-only +.. sectionauthor:: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> + +Aquila AM69 Module +================== + +Quick Start +----------- + +- Setup environment variables +- Get binary-only TI Linux firmware +- Build the ARM trusted firmware binary +- Build the OPTEE binary +- Build U-Boot for the R5 +- Build U-Boot for the A72 +- Flash to eMMC +- Boot + +Setup environment +----------------- + +Suggested current toolchains are ARM 11.3 (https://developer.arm.com/downloads/-/arm-gnu-toolchain-downloads): + +- https://developer.arm.com/-/media/Files/downloads/gnu/11.3.rel1/binrel/arm-gnu-toolchain-11.3.rel1-x86_64-arm-none-linux-gnueabihf.tar.xz +- https://developer.arm.com/-/media/Files/downloads/gnu/11.3.rel1/binrel/arm-gnu-toolchain-11.3.rel1-x86_64-aarch64-none-linux-gnu.tar.xz + +.. code-block:: console + + $ export CROSS_COMPILE_32=<path/to/arm/toolchain/bin/>arm-none-linux-gnueabihf- + $ export CROSS_COMPILE_64=<path/to/arm64/toolchain/bin/>aarch64-none-linux-gnu- + +Get the TI Linux Firmware +------------------------- + +.. code-block:: console + + $ echo "Downloading TI Linux Firmware..." + $ git clone -b ti-linux-firmware https://git.ti.com/git/processor-firmware/ti-linux-firmware.git + +Get and Build the ARM Trusted Firmware (Trusted Firmware A) +----------------------------------------------------------- + +.. code-block:: console + + $ echo "Downloading and building TF-A..." + $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git + $ cd trusted-firmware-a + +Then build ATF (TF-A): + +.. code-block:: console + + $ export CROSS_COMPILE="$CROSS_COMPILE_64" + $ make PLAT=k3 TARGET_BOARD=j784s4 SPD=opteed K3_USART=0x8 + +Get and Build OPTEE +------------------- + +.. code-block:: console + + $ echo "Downloading and building OPTEE..." + $ git clone https://github.com/OP-TEE/optee_os.git + $ cd optee_os + +Then build OPTEE: + +.. code-block:: console + + $ export CROSS_COMPILE="$CROSS_COMPILE_32" + $ export CROSS_COMPILE64="$CROSS_COMPILE_64" + $ export CFG_CONSOLE_UART=0x8 + $ make PLATFORM=k3-j784s4 CFG_ARM64_core=y + +Build U-Boot for R5 +------------------- + +.. code-block:: console + + $ export CROSS_COMPILE="$CROSS_COMPILE_32" + $ export BINMAN_INDIRS=<path/to/ti-linux-firmware> + $ make O=/tmp/aquila-r5 aquila-am69_r5_config + $ make O=/tmp/aquila-r5 + +Build U-Boot for A72 +-------------------- + +.. code-block:: console + + $ export CROSS_COMPILE=$CROSS_COMPILE_64 + $ export BL31=<path/to/atf>/build/k3/j784s4/release/bl31.bin + $ export TEE=<path/to/optee>/out/arm-plat-k3/core/tee-pager_v2.bin + $ export BINMAN_INDIRS="<path/to/ti-linux-firmware> /tmp/aquila-r5" + $ make O=/tmp/aquila-a72 aquila-am69_a72_config + $ make O=/tmp/aquila-a72 + +Flash to eMMC +------------- + +.. code-block:: console + + => mmc dev 0 1 + => fatload mmc 1 ${loadaddr} tiboot3.bin + => mmc write ${loadaddr} 0x0 0x400 + => fatload mmc 1 ${loadaddr} tispl.bin + => mmc write ${loadaddr} 0x400 0x1000 + => fatload mmc 1 ${loadaddr} u-boot.img + => mmc write ${loadaddr} 0x1400 0xc00 + +As a convenience, instead of having to remember all those addresses and sizes, +one may also use the update U-Boot wrappers: + +.. code-block:: console + + => tftpboot ${loadaddr} tiboot3.bin + => run update_tiboot3 + + => tftpboot ${loadaddr} tispl.bin + => run update_tispl + + => tftpboot ${loadaddr} u-boot.img + => run update_uboot + +Boot +---- + +Output:: + + U-Boot SPL 2026.01-rc1-00200-g39abfe677ff5-dirty (Nov 03 2025 - 18:09:30 +0100) + SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.8--v11.01.08 (Fancy Rat)') + HW CFG: 0x00 + Initialized 4 DRAM controllers + SPL initial stack usage: 13552 bytes + Trying to boot from MMC1 + Authentication passed + Authentication passed + Authentication passed + Loading Environment from nowhere... OK + init_env from device 17 not supported! + Authentication passed + Authentication passed + Starting ATF on ARM64 core... + + NOTICE: BL31: v2.13.0(release):v2.13.0-1063-g7a0a320df + NOTICE: BL31: Built : 13:30:07, Oct 28 2025 + I/TC: + I/TC: OP-TEE version: 4.8.0 (gcc version 11.3.1 20220712 (Arm GNU Toolchain 11.3.Rel1)) #1 Tue Oct 28 12:32:30 UTC 2025 aarch64 + I/TC: WARNING: This OP-TEE configuration might be insecure! + I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html + I/TC: Primary CPU initializing + I/TC: GIC redistributor base address not provided + I/TC: Assuming default GIC group status and modifier + I/TC: SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.8--v11.01.08 (Fancy Rat)') + I/TC: Activated SA2UL device + I/TC: Enabled firewalls for SA2UL TRNG device + I/TC: EIP76D TRNG initialized + I/TC: SA2UL Drivers initialized + I/TC: HUK Initialized + I/TC: Disabling output console + + U-Boot SPL 2026.01-rc1-00200-g39abfe677ff5-dirty (Nov 03 2025 - 18:11:30 +0100) + Unable to shutdown MCU R5 core 1, -22 + SYSFW ABI: 4.0 (firmware rev 0x000b '11.1.8--v11.01.08 (Fancy Rat)') + DM ABI: 3.0 (firmware ver 0x000b 'PSDK.11.01.00.04--v11.01.08a' patch_ver: 8) + HW CFG: 0x00 + Trying to boot from MMC1 + Authentication passed + Authentication passed + + + U-Boot 2026.01-rc1-00200-g39abfe677ff5-dirty (Nov 03 2025 - 18:11:30 +0100) + + SoC: J784S4 SR1.0 HS-FS + DRAM: 2 GiB (total 32 GiB) + optee optee: OP-TEE: revision 4.8 (86660925433a8d4d) + Core: 191 devices, 35 uclasses, devicetree: separate + MMC: mmc@4f80000: 0, mmc@4fb0000: 1 + Loading Environment from MMC... Reading from MMC(0)... OK + MISSING TORADEX CARRIER CONFIG BLOCKS + In: serial@2880000 + Out: serial@2880000 + Err: serial@2880000 + Model: Toradex 0088 Aquila AM69 Octa 32GB WB IT V1.1A + Serial#: 12593784 + Net: am65_cpsw_nuss ethernet@46000000: K3 CPSW: nuss_ver: 0x6BA02102 cpsw_ver: 0x6BA82102 ale_ver: 0x00293904 Ports:1 + + Warning: ethernet@46000000port@1 MAC addresses don't match: + Address in ROM is c0:d6:0a:de:0e:e6 + Address in environment is 00:14:2d:c0:2a:78 + eth0: ethernet@46000000port@1 [PRIME] + Hit any key to stop autoboot: 0 + MMC: no card present + Cannot persist EFI variables without system partition + ** Booting bootflow '<NULL>' with efi_mgr + Loading Boot0000 'mmc 0' failed + EFI boot manager: Cannot load any image + Boot failed (err=-14) + MMC: no card present + MMC: no card present + MMC: no card present + MMC: no card present + ** Booting bootflow 'mmc@4f80000.bootdev.part_1' with script + Loading DeviceTree: k3-am69-aquila-dev.dtb + 142461 bytes read in 2 ms (67.9 MiB/s) + 87 bytes read in 1 ms (85 KiB/s) + Working FDT set to 90200000 + Applying Overlay: aquila-am69_spi1_spidev_overlay.dtbo + 560 bytes read in 1 ms (546.9 KiB/s) + Applying Overlay: aquila-am69_spi2_spidev_overlay.dtbo + 560 bytes read in 1 ms (546.9 KiB/s) + 7937825 bytes read in 28 ms (270.4 MiB/s) + Bootargs: root=PARTUUID=1d80c51f-02 ro rootwait console=tty1 console=ttyS2,115200 + Uncompressing Kernel Image to 0 + ## Flattened Device Tree blob at 90200000 + Booting using the fdt blob at 0x90200000 + Working FDT set to 90200000 + Loading Device Tree to 00000000fce5c000, end 00000000fcea1fff ... OK + Working FDT set to fce5c000 + + Starting kernel ... diff --git a/doc/board/toradex/index.rst b/doc/board/toradex/index.rst index b6d49cc187e..27f059542e6 100644 --- a/doc/board/toradex/index.rst +++ b/doc/board/toradex/index.rst @@ -7,6 +7,7 @@ Toradex :maxdepth: 2 apalis-imx8 + aquila-am69 colibri_imx7 colibri-imx8x smarc-imx8mp diff --git a/doc/develop/makefiles.rst b/doc/develop/makefiles.rst index 593556f4dd5..f124abbf536 100644 --- a/doc/develop/makefiles.rst +++ b/doc/develop/makefiles.rst @@ -395,9 +395,6 @@ more details, with real examples. These three flags apply only to the kbuild makefile in which they are assigned. They are used for all the normal cc, as and ld invocations happening during a recursive build. - Note: Flags with the same behaviour were previously named: - EXTRA_CFLAGS, EXTRA_AFLAGS and EXTRA_LDFLAGS. - They are still supported but their usage is deprecated. ccflags-y specifies options for compiling with $(CC). diff --git a/doc/device-tree-bindings/config.txt b/doc/device-tree-bindings/config.txt index fffb69e75de..3756f57bf44 100644 --- a/doc/device-tree-bindings/config.txt +++ b/doc/device-tree-bindings/config.txt @@ -26,11 +26,6 @@ bootdelay (int) images is being packed for testing or a user holds down a button, it may allow a delay, but disable it for production. -u-boot,boot-led (string) -u-boot,error-led (string) - This is used to specify the label for an LED to indicate an error and - a successful boot, on supported hardware. - bootsecure (int) Indicates that U-Boot should use secure_boot_cmd() to run commands, rather than the normal CLI. This can be used in production images, to diff --git a/doc/device-tree-bindings/leds/leds-bcm6328.txt b/doc/device-tree-bindings/leds/leds-bcm6328.txt deleted file mode 100644 index 7f5597b7373..00000000000 --- a/doc/device-tree-bindings/leds/leds-bcm6328.txt +++ /dev/null @@ -1,106 +0,0 @@ -LEDs connected to Broadcom BCM6328 controller - -This controller is present on BCM6318, BCM6328, BCM6362 and BCM63268. -In these SoCs it's possible to control LEDs both as GPIOs or by hardware. -However, on some devices there are Serial LEDs (LEDs connected to a 74x164 -controller), which can either be controlled by software (exporting the 74x164 -as spi-gpio. See Documentation/devicetree/bindings/gpio/gpio-74x164.txt), or -by hardware using this driver. -Some of these Serial LEDs are hardware controlled (e.g. ethernet LEDs) and -exporting the 74x164 as spi-gpio prevents those LEDs to be hardware -controlled, so the only chance to keep them working is by using this driver. - -Required properties: - - compatible : should be "brcm,bcm6328-leds". - - #address-cells : must be 1. - - #size-cells : must be 0. - - reg : BCM6328 LED controller address and size. - -Optional properties: - - brcm,serial-leds : Boolean, enables Serial LEDs. - Default : false - - brcm,serial-mux : Boolean, enables Serial LEDs multiplexing. - Default : false - - brcm,serial-clk-low : Boolean, makes clock signal active low. - Default : false - - brcm,serial-dat-low : Boolean, makes data signal active low. - Default : false - - brcm,serial-shift-inv : Boolean, inverts Serial LEDs shift direction. - Default : false - -Each LED is represented as a sub-node of the brcm,bcm6328-leds device. - -LED sub-node required properties: - - reg : LED pin number (only LEDs 0 to 23 are valid). - -LED sub-node optional properties: - - label : see Documentation/devicetree/bindings/leds/common.txt - - active-low : Boolean, makes LED active low. - Default : false - -Examples: -Scenario 1 : BCM6328 with 4 GPIO LEDs - leds0: led-controller@10000800 { - compatible = "brcm,bcm6328-leds"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x10000800 0x24>; - - alarm_red@2 { - reg = <2>; - active-low; - label = "red:alarm"; - }; - inet_green@3 { - reg = <3>; - active-low; - label = "green:inet"; - }; - power_green@4 { - reg = <4>; - active-low; - label = "green:power"; - }; - }; - -Scenario 2 : BCM63268 with Serial LEDs - leds0: led-controller@10001900 { - compatible = "brcm,bcm6328-leds"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x10001900 0x24>; - brcm,serial-leds; - brcm,serial-dat-low; - brcm,serial-shift-inv; - - inet_red@2 { - reg = <2>; - active-low; - label = "red:inet"; - }; - dsl_green@3 { - reg = <3>; - active-low; - label = "green:dsl"; - }; - usb_green@4 { - reg = <4>; - active-low; - label = "green:usb"; - }; - wps_green@7 { - reg = <7>; - active-low; - label = "green:wps"; - }; - inet_green@8 { - reg = <8>; - active-low; - label = "green:inet"; - }; - power_green@20 { - reg = <20>; - active-low; - label = "green:power"; - }; - }; diff --git a/doc/device-tree-bindings/leds/leds-bcm6358.txt b/doc/device-tree-bindings/leds/leds-bcm6358.txt deleted file mode 100644 index e394d9ebb40..00000000000 --- a/doc/device-tree-bindings/leds/leds-bcm6358.txt +++ /dev/null @@ -1,141 +0,0 @@ -LEDs connected to Broadcom BCM6358 controller - -This controller is present on BCM6358 and BCM6368. -In these SoCs there are Serial LEDs (LEDs connected to a 74x164 controller), -which can either be controlled by software (exporting the 74x164 as spi-gpio. -See Documentation/devicetree/bindings/gpio/gpio-74x164.txt), or -by hardware using this driver. - -Required properties: - - compatible : should be "brcm,bcm6358-leds". - - #address-cells : must be 1. - - #size-cells : must be 0. - - reg : BCM6358 LED controller address and size. - -Optional properties: - - brcm,clk-div : SCK signal divider. Possible values are 1, 2, 4 and 8. - Default : 1 - - brcm,clk-dat-low : Boolean, makes clock and data signals active low. - Default : false - -Each LED is represented as a sub-node of the brcm,bcm6358-leds device. - -LED sub-node required properties: - - reg : LED pin number (only LEDs 0 to 31 are valid). - -LED sub-node optional properties: - - label : see Documentation/devicetree/bindings/leds/common.txt - - active-low : Boolean, makes LED active low. - Default : false - -Examples: -Scenario 1 : BCM6358 - leds0: led-controller@fffe00d0 { - compatible = "brcm,bcm6358-leds"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xfffe00d0 0x8>; - - alarm_white { - reg = <0>; - active-low; - label = "white:alarm"; - }; - tv_white { - reg = <2>; - active-low; - label = "white:tv"; - }; - tel_white { - reg = <3>; - active-low; - label = "white:tel"; - }; - adsl_white { - reg = <4>; - active-low; - label = "white:adsl"; - }; - }; - -Scenario 2 : BCM6368 - leds0: led-controller@100000d0 { - compatible = "brcm,bcm6358-leds"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x100000d0 0x8>; - brcm,pol-low; - brcm,clk-div = <4>; - - power_red { - reg = <0>; - active-low; - label = "red:power"; - }; - power_green { - reg = <1>; - active-low; - label = "green:power"; - default-state = "on"; - }; - power_blue { - reg = <2>; - label = "blue:power"; - }; - broadband_red { - reg = <3>; - active-low; - label = "red:broadband"; - }; - broadband_green { - reg = <4>; - label = "green:broadband"; - }; - broadband_blue { - reg = <5>; - active-low; - label = "blue:broadband"; - }; - wireless_red { - reg = <6>; - active-low; - label = "red:wireless"; - }; - wireless_green { - reg = <7>; - active-low; - label = "green:wireless"; - }; - wireless_blue { - reg = <8>; - label = "blue:wireless"; - }; - phone_red { - reg = <9>; - active-low; - label = "red:phone"; - }; - phone_green { - reg = <10>; - active-low; - label = "green:phone"; - }; - phone_blue { - reg = <11>; - label = "blue:phone"; - }; - upgrading_red { - reg = <12>; - active-low; - label = "red:upgrading"; - }; - upgrading_green { - reg = <13>; - active-low; - label = "green:upgrading"; - }; - upgrading_blue { - reg = <14>; - label = "blue:upgrading"; - }; - }; diff --git a/doc/device-tree-bindings/leds/leds-gpio.txt b/doc/device-tree-bindings/leds/leds-gpio.txt deleted file mode 100644 index df1b3080f6b..00000000000 --- a/doc/device-tree-bindings/leds/leds-gpio.txt +++ /dev/null @@ -1,52 +0,0 @@ -LEDs connected to GPIO lines - -Required properties: -- compatible : should be "gpio-leds". - -Each LED is represented as a sub-node of the gpio-leds device. Each -node's name represents the name of the corresponding LED. - -LED sub-node properties: -- gpios : Should specify the LED's GPIO, see "gpios property" in - Documentation/devicetree/bindings/gpio/gpio.txt. Active low LEDs should be - indicated using flags in the GPIO specifier. -- label : (optional) - see Documentation/devicetree/bindings/leds/common.txt -- linux,default-trigger : (optional) - see Documentation/devicetree/bindings/leds/common.txt -- default-state: (optional) The initial state of the LED. Valid - values are "on", "off", and "keep". If the LED is already on or off - and the default-state property is set the to same value, then no - glitch should be produced where the LED momentarily turns off (or - on). The "keep" setting will keep the LED at whatever its current - state is, without producing a glitch. The default is off if this - property is not present. - -Examples: - -leds { - compatible = "gpio-leds"; - hdd { - label = "IDE Activity"; - gpios = <&mcu_pio 0 1>; /* Active low */ - linux,default-trigger = "ide-disk"; - }; - - fault { - gpios = <&mcu_pio 1 0>; - /* Keep LED on if BIOS detected hardware fault */ - default-state = "keep"; - }; -}; - -run-control { - compatible = "gpio-leds"; - red { - gpios = <&mpc8572 6 0>; - default-state = "off"; - }; - green { - gpios = <&mpc8572 7 0>; - default-state = "on"; - }; -}; diff --git a/doc/device-tree-bindings/leds/leds-lp5562.txt b/doc/device-tree-bindings/leds/leds-lp5562.txt deleted file mode 100644 index 4e0c742959a..00000000000 --- a/doc/device-tree-bindings/leds/leds-lp5562.txt +++ /dev/null @@ -1,63 +0,0 @@ -LEDs connected to TI LP5562 controller - -This driver works with a TI LP5562 4-channel LED controller. -CONFIG_LED_BLINK is supported using the controller engines. However -there are only 3 engines available for the 4 channels. This means -that the blue and white channels share the same engine. When both -blue and white LEDs are set to blink, they will share the same blink -rate. Changing the blink rate of the blue LED will affect the white -LED and vice-versa. Manual on/off is handled independently for all 4 -channels. - -Required properties: - - compatible : should be "ti,lp5562". - - #address-cells : must be 1. - - #size-cells : must be 0. - - reg : LP5562 LED controller I2C address. - -Optional properties: - - enable-gpios : Enable GPIO - - clock-mode : u8, configures the clock mode: - - 0 # automode - - 1 # internal - - 2 # external - -Each LED is represented as a sub-node of the ti,lp5562 device. - -LED sub-node required properties: - - reg : Zero-based channel identifier: - - 0 red - - 1 green - - 2 blue - - 3 white - -LED sub-node optional properties: - - chan-name : name of LED - - max-cur : LED current at max brightness in 100uA steps (0x00 - 0xFF) - Default : 100 (10 mA) - -Example: - leds0: lp5562@30 { - compatible = "ti,lp5562"; - #address-cells = <1>; - #size-cells = <0>; - enable-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>; - reg = <0x30>; - clock-mode = /bits/8 <1>; - - led@0 { - reg = <0>; - chan-name = "red"; - max-cur = /bits/ 8 <200>; /* 20mA */ - }; - led@1 { - reg = <1>; - chan-name = "green"; - max-cur = /bits/ 8 <200>; /* 20mA */ - }; - led@2 { - reg = <2>; - chan-name = "blue"; - max-cur = /bits/ 8 <200>; /* 20mA */ - }; - }; diff --git a/doc/mkimage.1 b/doc/mkimage.1 index c705218d345..9a2d07cee75 100644 --- a/doc/mkimage.1 +++ b/doc/mkimage.1 @@ -251,6 +251,18 @@ Append TFA BL31 file to the image. .B \-\-tfa-bl31-addr Set TFA BL31 file load and entry point address. . +.TP +.B \-z +.TQ +.B \-\-tee-file +Append raw TEE file to the image. +. +.TP +.B \-Z +.TQ +.B \-\-tee-addr +Set raw TEE file load and entry point address, in hexadecimal. +. .SS Options for creating FIT images . .TP diff --git a/doc/usage/cmd/bdinfo.rst b/doc/usage/cmd/bdinfo.rst index a139c9d855c..46046e55e06 100644 --- a/doc/usage/cmd/bdinfo.rst +++ b/doc/usage/cmd/bdinfo.rst @@ -13,12 +13,22 @@ Synopsis :: bdinfo + bdinfo -a + bdinfo -e + bdinfo -m Description ----------- The *bdinfo* command prints information about the board. +``bdinfo -a`` command is an alias of the ``bdinfo`` command and prints all +information about the board. + +``bdinfo -e`` command prints network-related information about the board. + +``bdinfo -m`` command prints the DRAM-related information about the board. + Example ------- @@ -54,7 +64,44 @@ Example irq_sp = 0x000000013edbada0 sp start = 0x000000013edbada0 Early malloc usage: 3a8 / 2000 - => + => bdinfo -a + boot_params = 0x0000000000000000 + DRAM bank = 0x0000000000000000 + -> start = 0x0000000040000000 + -> size = 0x0000000100000000 + flashstart = 0x0000000000000000 + flashsize = 0x0000000004000000 + flashoffset = 0x00000000000e87f8 + baudrate = 115200 bps + relocaddr = 0x000000013fefb000 + reloc off = 0x000000013fefb000 + Build = 64-bit + current eth = virtio-net#32 + ethaddr = 52:52:52:52:52:52 + IP addr = 10.0.2.15 + fdt_blob = 0x000000013edbadb0 + new_fdt = 0x000000013edbadb0 + fdt_size = 0x0000000000100000 + lmb_dump_all: + memory.cnt = 0x1 + memory[0] [0x40000000-0x13fffffff], 0x100000000 bytes flags: 0 + reserved.cnt = 0x2 + reserved[0] [0x13ddb3000-0x13fffffff], 0x0224d000 bytes flags: 0 + reserved[1] [0x13edb6930-0x13fffffff], 0x012496d0 bytes flags: 0 + devicetree = board + arch_number = 0x0000000000000000 + TLB addr = 0x000000013fff0000 + irq_sp = 0x000000013edbada0 + sp start = 0x000000013edbada0 + Early malloc usage: 3a8 / 2000 + => bdinfo -e + current eth = virtio-net#32 + ethaddr = 52:52:52:52:52:52 + IP addr = 10.0.2.15 + => bdinfo -m + DRAM bank = 0x0000000000000000 + -> start = 0x0000000040000000 + -> size = 0x0000000100000000 boot_params address of the memory area for boot parameters @@ -77,9 +124,13 @@ Build current eth name of the active network device + Only shown if CONFIG_NET=y or CONFIG_NET_LWIP=y. + IP addr network address, value of the environment variable *ipaddr* + Only shown if CONFIG_NET=y or CONFIG_NET_LWIP=y. + fdt_blob address of U-Boot's own device tree, NULL if none @@ -92,9 +143,13 @@ fdt_size lmb_dump_all available memory and memory reservations + Only shown if CONFIG_LMB=y. + devicetree source of the device-tree + Only shown if CONFIG_OF_REAL=y. + arch_number unique id for the board @@ -115,3 +170,8 @@ Configuration ------------- The bdinfo command is available if CONFIG_CMD_BDI=y. + +The options to bdinfo are only available if CONFIG_GETOPT=y. + +The ``-e`` option is additionally only available if CONFIG_NET=y or +CONFIG_NET_LWIP=y. diff --git a/doc/usage/cmd/led.rst b/doc/usage/cmd/led.rst new file mode 100644 index 00000000000..b5623895c7e --- /dev/null +++ b/doc/usage/cmd/led.rst @@ -0,0 +1,95 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +.. index:: + single: led (command) + +led command +=========== + +Synopsis +-------- + +:: + + led <led_label> <on|off|toggle> + led <led_label> blink <blink-freq in ms> + led <led_label> + led list + +led <led_label> +--------------- + +Get state of the LED whose label is the one passed as ``<led_label>`` argument. + +Provided ``<led_label>`` is *module_led*, the possible outputs for this command +are:: + + LED 'module_led': off + LED 'module_led': on + LED 'module_led': blink + +led <led_label> on|off|toggle +----------------------------- + +Turn on, off or toggle state of the LED whose label is the one passed as +``<led_label>`` argument. + +led <led_label> blink <blink-freq in ms> +---------------------------------------- + +Make the LED whose label is the one passed as ``<led_label>`` argument blink at +a frequency specified by the argument ``<blink-freq in ms>``. + +The frequency is parsed as a decimal number and its unit is milliseconds. The +duty cycle is 50%. Example:: + + led blue blink 1000 + +will make the *blue*-labeled LED blink with a state (on or off) kept for 500ms +before switching to the other state (respectively off or on) for 500ms, +looping endlessly. + +led list +-------- + +List all available LEDs by their label and provide their known state, which can +be either *off*, *on* or *blink*. + +If a LED has not been probed yet, its state will be shown as *<inactive>* in the +list. + +Examples +-------- + +:: + + => led list + module_led on + sd_card_led <inactive> + => led module_led + LED 'module_led': on + => led module_led off + => led module_led + LED 'module_led': off + => led module_led toggle + => led module_led + LED 'module_led': on + => led module_led toggle + => led module_led + LED 'module_led': off + => led module_led blink 1000 + => led module_led + LED 'module_led': blink + => led sd_card_led + LED 'sd_card_led': off + => led list + module_led blink + sd_card_led off + +Configuration +------------- + +The *led* commands are only available if ``CONFIG_CMD_LED=y``. + +The *led <led_label> blink* command is only available if ``CONFIG_CMD_LED=y`` +and either ``CONFIG_LED_BLINK=y`` or ``CONFIG_LED_SW_BLINK=y``. diff --git a/doc/usage/cmd/part.rst b/doc/usage/cmd/part.rst index bd3df15203a..b91f6541f7f 100644 --- a/doc/usage/cmd/part.rst +++ b/doc/usage/cmd/part.rst @@ -16,6 +16,7 @@ Synopsis part start <interface> <dev> <part> <varname> part size <interface> <dev> <part> <varname> part number <interface> <dev> <part> <varname> + part name <interface> <dev> <part> <varname> part set <interface> <dev> <part> <type> part type <interface> <dev>:<part> [varname] part types @@ -86,6 +87,18 @@ part must be specified as partition name. varname a variable to store the current partition number value into +The 'part name' command sets an environment variable to the partition name using the partition number, +part must be specified as partition number. + + interface + interface for accessing the block device (mmc, sata, scsi, usb, ....) + dev + device number + part + partition number + varname + a variable to store the current partition name into + The 'part set' command sets the type of a partition. This is useful when autodetection fails or does not do the correct thing: |