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path: root/drivers/gpu/drm/i915/display/intel_cx0_phy.h
AgeCommit message (Expand)Author
2026-01-07drm/i915/intel_cx0_phy: Fix the SPDX identifier commentAnkit Nautiyal
2025-11-19drm/i915/cx0: Add MTL+ Thunderbolt PLL hooksImre Deak
2025-11-19drm/i915/cx0: Add MTL+ .enable_clock/.disable clock hooks on DDIMika Kahola
2025-11-19drm/i915/cx0: Add MTL+ .get_hw_state hookMika Kahola
2025-11-19drm/i915/cx0: Add MTL+ .dump_hw_state hookMika Kahola
2025-11-19drm/i915/cx0: Update C10/C20 state calculationMika Kahola
2025-11-19drm/i915/cx0: Remove state verificationMika Kahola
2025-11-01drm/i915/ltphy: Hook up LT Phy Enable & Disable sequencesSuraj Kandpal
2025-11-01drm/i915/ltphy: Program the rest of the LT Phy Enable sequenceSuraj Kandpal
2025-11-01drm/i915/ltphy: Program the P2P Transaction flow for LT PhySuraj Kandpal
2025-11-01drm/i915/ltphy: Program the VDR PLL registers for LT PHYSuraj Kandpal
2025-11-01drm/i915/ltphy: Read PHY_VDR_0_CONFIG registerSuraj Kandpal
2025-11-01drm/i915/ltphy: Add a wrapper for LT Phy powerdown change sequenceSuraj Kandpal
2025-11-01drm/i915/ltphy: Program sequence for PORT_CLOCK_CTL for LT PhySuraj Kandpal
2025-11-01drm/i915/ltphy: Phy lane reset for LT PhySuraj Kandpal
2025-05-29drm/i915/display: Add function to configure LFPS sendingJouni Högander
2025-02-19drm/i915/display: Allow display PHYs to reset power stateMika Kahola
2025-01-23drm/i915/cx0_phy: Use HDMI PLL algorithm for C10 PHYAnkit Nautiyal
2024-10-30drm/i915/cx0: convert to struct intel_displayJani Nikula
2024-10-30drm/i915/cx0: remove unnecessary includesJani Nikula
2024-05-30drm/i915/display: Add compare config for MTL+ platformsMika Kahola
2024-03-21drm/i915/cx0: remove the unused intel_is_c10phy()Jani Nikula
2024-03-21drm/i915/display: add intel_encoder_is_*() and _to_*() functionsJani Nikula
2023-11-13drm/i915/mtl: C20 state verificationMika Kahola
2023-10-29drm/i915/display: Abstract C10/C20 pll calculationLucas De Marchi
2023-10-29drm/i915/display: Abstract C10/C20 pll hw readoutLucas De Marchi
2023-10-07drm/i915: Simplify snps/c10x DPLL state checker calling convetionVille Syrjälä
2023-10-07drm/i915: Constify the snps/c10x PLL state checkersVille Syrjälä
2023-09-26drm/i915/cx0: prefer forward declarations over includesJani Nikula
2023-06-28drm/i915: Remove prototype for intel_cx0_phy_ddi_vswing_sequence()Gustavo Sousa
2023-04-28drm/i915/mtl: Power up TCSSMika Kahola
2023-04-28drm/i915/mtl: Readout Thunderbolt HW stateMika Kahola
2023-04-28drm/i915/mtl: Enabling/disabling sequence Thunderbolt pllMika Kahola
2023-04-28drm/i915/mtl: C20 port clock calculationMika Kahola
2023-04-28drm/i915/mtl: Dump C20 pll hw stateMika Kahola
2023-04-28drm/i915/mtl: C20 HW readoutMika Kahola
2023-04-14drm/i915/mtl: Add C10 phy programming for HDMIRadhakrishna Sripada
2023-04-14drm/i915/mtl: Add vswing programming for C10 physMika Kahola
2023-04-14drm/i915/mtl: Add Support for C10 PHY message bus and pll programmingRadhakrishna Sripada
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