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path: root/drivers/clk
AgeCommit message (Expand)Author
2021-06-14clk: imx: scu: add gpr clocks supportDong Aisheng
2021-06-14clk: imx: scu: remove legacy scu clock binding supportDong Aisheng
2021-06-14clk: imx: Remove the audio ipg clock from imx8mpJacky Bai
2021-06-10clk: renesas: Add support for R9A07G044 SoCLad Prabhakar
2021-06-10clk: renesas: Add CPG core wrapper for RZ/G2L SoCLad Prabhakar
2021-06-09clk: meson: g12a: Add missing NNA source clocks for g12bNick Xie
2021-06-08clk: vc5: fix output disabling when enabling a FODLuca Ceresoli
2021-06-08clk: ti: add am33xx/am43xx spread spectrum clock supportDario Binacchi
2021-06-08clk: ti: fix typo in routine descriptionDario Binacchi
2021-06-08clk: qcom: smd-rpm: Fix wrongly assigned RPM_SMD_PNOC_CLKKonrad Dybcio
2021-06-08clkdev: remove unused clkdev_alloc() interfacesArnd Bergmann
2021-06-08clkdev: remove CONFIG_CLKDEV_LOOKUPArnd Bergmann
2021-06-04clk: versatile: Depend on HAS_IOMEMStephen Boyd
2021-06-02clk: tegra: tegra124-emc: Fix clock imbalance in emc_set_timing()Yang Yingliang
2021-06-02clk: qcom: dispcc-sm8250: Add EDP clocksBjorn Andersson
2021-06-02clk: qcom: dispcc-sm8250: Add sc8180x supportBjorn Andersson
2021-06-02clk: qcom: smd-rpm: De-duplicate identical entriesKonrad Dybcio
2021-06-02clk: qcom: smd-rpm: Switch to parent_dataKonrad Dybcio
2021-06-02clk: qcom: Add MDM9607 GCC driverKonrad Dybcio
2021-06-01clk: analogbits: fix doc warning in wrpll-cln28hpc.cYang Yingliang
2021-06-01clk: sifive: Fix kernel-docYang Li
2021-06-01clk: versatile: remove dependency on ARCH_*Peter Collingbourne
2021-06-01clk: qcom: cleanup some dev_err_probe() callsDan Carpenter
2021-06-01clk: qcom: Simplify usage of dev_err_probe()Uwe Kleine-König
2021-05-31clk: tegra: Don't deassert reset on enabling clocksDmitry Osipenko
2021-05-31clk: tegra: Mark external clocks as not having reset controlDmitry Osipenko
2021-05-31clk: tegra: cclk: Handle thermal DIV2 CPU frequency throttlingDmitry Osipenko
2021-05-31clk: tegra: Don't allow zero clock rate for PLLsDmitry Osipenko
2021-05-31clk: tegra: Halve SCLK rate on Tegra20Dmitry Osipenko
2021-05-31clk: tegra: Ensure that PLLU configuration is applied properlyDmitry Osipenko
2021-05-31clk: tegra: Fix refcounting of gate clocksDmitry Osipenko
2021-05-31clk: tegra30: Use 300MHz for video decoder by defaultDmitry Osipenko
2021-05-28clk: rockchip: export ACLK_VCODEC for RK3036Alex Bee
2021-05-27clk: renesas: r8a77995: Add ZA2 clockKuninori Morimoto
2021-05-27clk: renesas: cpg-mssr: Make srstclr[] comment block consistentGeert Uytterhoeven
2021-05-27clk: renesas: cpg-mssr: Remove unused [RM]MSTPCR() definitionsGeert Uytterhoeven
2021-05-25clk: qcom: clk-rcg2: Add support for duty-cycle for RCGTaniya Das
2021-05-24clk: sunxi-ng: v3s: fix incorrect postdivider on pll-audioTobias Schramm
2021-05-24clk: meson: axg-audio: improve deferral handlingJerome Brunet
2021-05-24clk: rockchip: fix rk3568 cpll clk gate bitsPeter Geis
2021-05-20clk: meson: g12a: fix gp0 and hifi rangesJerome Brunet
2021-05-19clk: meson: pll: switch to determine_rate for the PLL opsMartin Blumenstingl
2021-05-11clk: rockchip: Optimize PLL table memory usageElaine Zhang
2021-05-11clk: renesas: r9a06g032: Switch to .determine_rate()Geert Uytterhoeven
2021-05-11clk: renesas: div6: Implement range checkingGeert Uytterhoeven
2021-05-11clk: renesas: div6: Consider all parents for requested rateGeert Uytterhoeven
2021-05-11clk: renesas: div6: Switch to .determine_rate()Geert Uytterhoeven
2021-05-11clk: renesas: div6: Simplify src mask handlingGeert Uytterhoeven
2021-05-11clk: renesas: div6: Use clamp() instead of clamp_t()Geert Uytterhoeven
2021-05-11clk: renesas: rcar-usb2-clock-sel: Fix error handling in .probe()Dinghao Liu
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