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path: root/drivers/clk
AgeCommit message (Expand)Author
2021-12-06clk: qcom: rpmh: add support for SM8450 rpmh clocksVinod Koul
2021-12-06clk: qcom: smd-rpm: Drop binary value handling for buffered clockShawn Guo
2021-12-06clk: qcom: smd-rpm: Drop the use of struct rpm_ccShawn Guo
2021-12-06clk: qcom: smd-rpm: Drop MFD qcom-rpm referenceShawn Guo
2021-12-03clk: qcom: Add support for SDX65 RPMh clocksVamsi krishna Lanka
2021-12-02clk: imx: use module_platform_driverMiles Chen
2021-12-02clk: Gemini: fix struct name in kernel-docRandy Dunlap
2021-12-02clk: zynq: pll: Fix kernel-doc warningsShubhrajyoti Datta
2021-12-02clk: imx: pllv1: fix kernel-doc notation for struct clk_pllv1Randy Dunlap
2021-12-02clk: qcom: clk-alpha-pll: Don't reconfigure running TrionBjorn Andersson
2021-12-02clk: qcom: regmap-mux: fix parent clock lookupDmitry Baryshkov
2021-11-30clk: meson: gxbb: Fix the SDM_EN bit for MPLL0 on GXBBMartin Blumenstingl
2021-11-26clk: renesas: r9a07g044: Add TSU clock and reset entryBiju Das
2021-11-23dt-bindings: clock: sunxi: Export CLK_DRAM for devfreqSamuel Holland
2021-11-23clk: sunxi-ng: Add support for the D1 SoC clocksSamuel Holland
2021-11-23clk: sunxi-ng: gate: Add macros for gates with fixed dividersSamuel Holland
2021-11-23clk: sunxi-ng: mux: Add macros using clk_parent_data and clk_hwSamuel Holland
2021-11-23clk: sunxi-ng: mp: Add macros using clk_parent_data and clk_hwSamuel Holland
2021-11-23clk: sunxi-ng: div: Add macros using clk_parent_data and clk_hwSamuel Holland
2021-11-23clk: sunxi-ng: Allow the CCU core to be built as a moduleSamuel Holland
2021-11-23clk: sunxi-ng: Convert early providers to platform driversSamuel Holland
2021-11-22clk: samsung: exynos850: Register clocks earlySam Protsenko
2021-11-22clk: imx8mp: Fix the parent clk of the audio_root_clkHui Wang
2021-11-22clk: imx8mn: Fix imx8mn_clko1_selsAdam Ford
2021-11-22clk: imx: Use div64_ul instead of do_divChangcheng Deng
2021-11-22clk: imx: imx8ulp: set suppress_bind_attrs to truePeng Fan
2021-11-22clk: samsung: exynos850: Keep some crucial clocks runningSam Protsenko
2021-11-22clk: samsung: exynos850: Implement CMU_CMGP domainSam Protsenko
2021-11-22clk: samsung: exynos850: Implement CMU_APM domainSam Protsenko
2021-11-22clk: sunxi-ng: Allow drivers to be built as modulesSamuel Holland
2021-11-22clk: sunxi-ng: Export symbols used by CCU driversSamuel Holland
2021-11-20clk: samsung: Update CPU clk registrationWill McVicker
2021-11-19clk: samsung: Remove meaningless __init and extern from header filesSylwester Nawrocki
2021-11-19clk: samsung: remove __clk_lookup() usageMarek Szyprowski
2021-11-19clk: renesas: cpg-mssr: propagate return value of_genpd_add_provider_simple()Lad Prabhakar
2021-11-19clk: renesas: cpg-mssr: Check return value of pm_genpd_init()Lad Prabhakar
2021-11-19clk: renesas: rzg2l: propagate return value of_genpd_add_provider_simple()Lad Prabhakar
2021-11-19clk: renesas: rzg2l: Check return value of pm_genpd_init()Lad Prabhakar
2021-11-19clk: renesas: r9a07g044: Add RSPI clock and reset entriesLad Prabhakar
2021-11-19clk: renesas: r9a07g044: Change core clock "I" from DEF_FIXED->DEF_DIVBiju Das
2021-11-19clk: renesas: rzg2l: Add CPG_PL1_DDIV macroBiju Das
2021-11-19clk: renesas: rcar-gen3: Remove outdated SD_SKIP_FIRSTWolfram Sang
2021-11-19clk: renesas: rcar-gen3: Switch to new SD clock handlingWolfram Sang
2021-11-19clk: renesas: r8a779a0: Add SDnH clock to V3UWolfram Sang
2021-11-19clk: renesas: rcar-gen3: Add SDnH clockWolfram Sang
2021-11-19clk: renesas: rcar-gen3: Add dummy SDnH clockWolfram Sang
2021-11-18Merge drm/drm-next into drm-misc-nextThomas Zimmermann
2021-11-15clk: renesas: r9a07g044: Add OSTM clock and reset entriesBiju Das
2021-11-15clk: renesas: r9a07g044: Rename CLK_PLL2_DIV16 and CLK_PLL2_DIV20 macrosBiju Das
2021-11-15clk: renesas: r9a07g044: Add WDT clock and reset entriesBiju Das