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path: root/drivers/clk
AgeCommit message (Expand)Author
2022-05-20clk: stm32mp13: add stm32_gate managementGabriel Fernandez
2022-05-20clk: stm32mp13: add stm32_mux clock managementGabriel Fernandez
2022-05-20clk: stm32: Introduce STM32MP13 RCC drivers (Reset Clock Controller)Gabriel Fernandez
2022-05-20clk: ti: clkctrl: replace usage of found with dedicated list iterator variableJakob Koschel
2022-05-20clk: ti: composite: Prefer kcalloc over open coded arithmeticLen Baker
2022-05-19clk: mediatek: mt8173: Switch to clk_hw provider APIsChen-Yu Tsai
2022-05-19clk: mediatek: Switch to clk_hw provider APIsChen-Yu Tsai
2022-05-19clk: mediatek: Replace 'struct clk' with 'struct clk_hw'Chen-Yu Tsai
2022-05-19clk: mediatek: apmixed: Drop error message from clk_register() failureChen-Yu Tsai
2022-05-19clk: mediatek: Make mtk_clk_register_composite() staticChen-Yu Tsai
2022-05-19clk: qcom: rcg2: Cache CFG register updates for parked RCGsBjorn Andersson
2022-05-19clk: qcom: add sc8280xp GCC driverBjorn Andersson
2022-05-19clk: renesas: r9a06g032: Probe possible childrenMiquel Raynal
2022-05-19clk: renesas: r9a06g032: Export function to set dmamuxMiquel Raynal
2022-05-18clk: mediatek: use en_mask as a pure div_en_maskChun-Jie Chen
2022-05-18clk: ingenic-tcu: Fix missing TCU clock for X1000 SoCsAidan MacDonald
2022-05-18clk: mediatek: update compatible string for MT7986 ethsysSam Shih
2022-05-18clk: ingenic: Mark critical clocks in Ingenic SoCsAidan MacDonald
2022-05-18clk: ingenic: Allow specifying common clock flagsAidan MacDonald
2022-05-18clk: ux500: fix a possible off-by-one in u8500_prcc_reset_base()Hangyu Hua
2022-05-17clk: at91: generated: consider range when calculating best rateCodrin Ciubotariu
2022-05-17clk: imx8mp: fix usb_root_clk parentPeng Fan
2022-05-17Revert "clk: sunxi-ng: sun6i-rtc: Add support for H6"Jernej Skrabec
2022-05-17clk: bcm2835: fix bcm2835_clock_choose_divStefan Wahren
2022-05-16clk: fixed-rate: Remove redundant if statementLi Zhengyu
2022-05-10clk: samsung: exynosautov9: add cmu_peric1 clock supportChanho Park
2022-05-10clk: samsung: exynosautov9: add cmu_peric0 clock supportChanho Park
2022-05-10clk: samsung: exynosautov9: add cmu_fsys2 clock supportChanho Park
2022-05-10clk: samsung: exynosautov9: add cmu_busmc clock supportChanho Park
2022-05-10clk: samsung: exynosautov9: add cmu_peris clock supportChanho Park
2022-05-10clk: samsung: exynosautov9: add cmu_core clock supportChanho Park
2022-05-10clk: samsung: add top clock support for Exynos Auto v9 SoCChanho Park
2022-05-07ARM: pxa: move clk register definitions to driverArnd Bergmann
2022-05-07ARM: pxa: move smemc register access from clk to platformArnd Bergmann
2022-05-07cpufreq: pxa3: move clk register access to clk driverArnd Bergmann
2022-05-06clk: sunxi-ng: h616: Add PLL derived 32KHz clockAndre Przywara
2022-05-06clk: sunxi-ng: h6-r: Add RTC gate clockAndre Przywara
2022-05-06clk: tegra: Update kerneldoc to match prototypesThierry Reding
2022-05-06clk: renesas: r9a09g011: Add eth clock and reset entriesPhil Edworthy
2022-05-06clk: renesas: Add RZ/V2M support using the rzg2l driverPhil Edworthy
2022-05-05clk: qcom: gcc-msm8976: Add modem resetAdam Skladowski
2022-05-05clk: qcom: gcc-msm8976: Set floor ops for SDCCAdam Skladowski
2022-05-05clk: renesas: rzg2l: Add support for RZ/V2M reset monitor regPhil Edworthy
2022-05-05clk: renesas: rzg2l: Make use of CLK_MON registers optionalPhil Edworthy
2022-05-05clk: renesas: rzg2l: Set HIWORD mask for all mux and dividersPhil Edworthy
2022-05-05clk: renesas: rzg2l: Add read only versions of the clk macrosPhil Edworthy
2022-05-05clk: renesas: rzg2l: Move the DEF_MUX array size calc into the macroPhil Edworthy
2022-05-05clk: renesas: r9a07g044: Fix OSTM1 module clock nameGeert Uytterhoeven
2022-05-05clk: renesas: r9a07g043: Add clock and reset entries for ADCBiju Das
2022-05-05clk: renesas: r9a07g043: Add TSU clock and reset entryBiju Das
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