| Age | Commit message (Expand) | Author |
|---|---|---|
| 2026-01-22 | clk: x86: cgu: convert from divider_round_rate() to divider_determine_rate() | Brian Masney |
| 2025-09-08 | clk: x86: cgu: convert from round_rate() to determine_rate() | Brian Masney |
| 2022-10-17 | clk: mxl: Fix a clk entry by adding relevant flags | Rahul Tanwar |
| 2022-10-17 | clk: mxl: Add option to override gate clks | Rahul Tanwar |
| 2022-10-17 | clk: mxl: Remove redundant spinlocks | Rahul Tanwar |
| 2022-10-17 | clk: mxl: Switch from direct readl/writel based IO to regmap based IO | Rahul Tanwar |
| 2020-07-24 | clk: intel: Avoid unnecessary memset by improving code | Rahul Tanwar |
| 2020-07-24 | clk: intel: Improve locking in the driver | Rahul Tanwar |
| 2020-07-24 | clk: intel: Use devm_clk_hw_register() instead of clk_hw_register() | Rahul Tanwar |
| 2020-05-28 | clk: intel: remove redundant initialization of variable rate64 | Colin Ian King |
| 2020-05-26 | clk: intel: Add CGU clock driver for a new SoC | Rahul Tanwar |
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index : linux.git | |
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