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path: root/drivers/clk/mediatek/clk-mt8186-apmixedsys.c
AgeCommit message (Expand)Author
2026-01-22clk: mediatek: Refactor pllfh registration to pass deviceNicolas Frattaroli
2024-09-21clk: Switch back to struct platform_driver::remove()Uwe Kleine-König
2024-06-03clk: mediatek: Add a module description where missingAngeloGioacchino Del Regno
2023-05-10clk: mediatek: Convert all remaining drivers to platform_driver's .remove_new()Uwe Kleine-König
2023-03-13clk: mediatek: Add MODULE_DEVICE_TABLE() where appropriateAngeloGioacchino Del Regno
2023-03-13clk: mediatek: Add MODULE_LICENSE() where missingAngeloGioacchino Del Regno
2023-03-13clk: mediatek: Switch to module_platform_driver() where possibleAngeloGioacchino Del Regno
2023-03-13clk: mediatek: fhctl: Add support for older fhctl register layoutAngeloGioacchino Del Regno
2022-11-29clk: mediatek: Change PLL register API for MT8186Johnson Wang
2022-05-19clk: mediatek: Replace 'struct clk' with 'struct clk_hw'Chen-Yu Tsai
2022-04-25clk: mediatek: Add MT8186 apmixedsys clock supportChun-Jie Chen
generated by cgit v1.2.3 (git 2.25.1) at 2026-08-05 15:34:09 +0000