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| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2022-02-27 20:37:41 +0000 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-04-04 11:05:46 +0200 |
| commit | cd0339ec25895c0be45656908442bc121bbadacb (patch) | |
| tree | c4aefc60e425b9389ee4bed2c36c0ba707e76138 /tools/perf/scripts/python | |
| parent | f35a868bcf95c066a00dcae9e7ee42d85eaf05b2 (diff) | |
arm64: dts: renesas: r9a07g054: Add SSI{1,2,3} nodes and fillup the SSI0 stub node
Add SSI{1,2,3} nodes and fillup the SSI0 stub node in RZ/V2L
(R9A07G054) SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220227203744.18355-10-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions