bastion: add Kernel, Processor, AcpiTables, DeviceTree classesHEADmaster

Kernel: main singleton object, that provide access to core kernel
entities
Processor: empty class, that will be used later for per-CPU entities
AcpiTables: class for acpi access (can be obtained through the kernel
object)
DeviceTree: class for dt access (can be obtained through the kernel
object)

4 files changed, 94 insertions, 0 deletions

diff --git a/kernel/arch/aarch64/Processor.cpp b/kernel/arch/aarch64/Processor.cpp
new file mode 100644
index 0000000..725fa38
--- /dev/null
+++ b/kernel/arch/aarch64/Processor.cpp
@@ -0,0 +1,17 @@
+// ============================================================================
+// arch/aarch64/Processor.cpp - AArch64 per-CPU state implementation
+// ============================================================================
+
+#include "Processor.h"
+#include <boot/boot_info.h>
+
+static Processor g_processor;
+
+Processor& processor() {
+    return g_processor;
+}
+
+void Processor::InitEarly(const BootInfo& boot_info) {
+    // Phase 2: VBAR_EL1, GIC base, etc.
+    (void)boot_info;
+}
diff --git a/kernel/arch/aarch64/Processor.h b/kernel/arch/aarch64/Processor.h
new file mode 100644
index 0000000..81be414
--- /dev/null
+++ b/kernel/arch/aarch64/Processor.h
@@ -0,0 +1,29 @@
+#pragma once
+// ============================================================================
+// arch/aarch64/Processor.h - AArch64 per-CPU state
+// ============================================================================
+
+#include <stdint.h>
+#include <kernel/types.h>
+
+struct BootInfo;
+
+class Processor {
+public:
+    void InitEarly(const BootInfo& boot_info);
+
+    // Phase 2 will add:
+    //   PhysAddr GetGicBase() const;
+    //   uint64_t GetVbarEl1() const;
+    //   PhysAddr GetTtbr0() const;
+    //   PhysAddr GetTtbr1() const;
+
+    Processor() = default;
+    Processor(const Processor&) = delete;
+    Processor& operator=(const Processor&) = delete;
+
+private:
+    // Phase 2: gic_base, vbar_el1, ttbr0, ttbr1...
+};
+
+Processor& processor();
diff --git a/kernel/arch/x86_64/Processor.cpp b/kernel/arch/x86_64/Processor.cpp
new file mode 100644
index 0000000..56f72ff
--- /dev/null
+++ b/kernel/arch/x86_64/Processor.cpp
@@ -0,0 +1,17 @@
+// ============================================================================
+// arch/x86_64/Processor.cpp - x86_64 per-CPU state implementation
+// ============================================================================
+
+#include "Processor.h"
+#include <boot/boot_info.h>
+
+static Processor g_processor;
+
+Processor& processor() {
+    return g_processor;
+}
+
+void Processor::InitEarly(const BootInfo& boot_info) {
+    // Phase 2: GDT, IDT, LAPIC base, etc.
+    (void)boot_info;
+}
diff --git a/kernel/arch/x86_64/Processor.h b/kernel/arch/x86_64/Processor.h
new file mode 100644
index 0000000..bc5a61a
--- /dev/null
+++ b/kernel/arch/x86_64/Processor.h
@@ -0,0 +1,31 @@
+#pragma once
+// ============================================================================
+// arch/x86_64/Processor.h - x86_64 per-CPU state
+//
+// ============================================================================
+
+#include <stdint.h>
+#include <kernel/types.h>
+
+struct BootInfo;
+
+class Processor {
+public:
+    void InitEarly(const BootInfo& boot_info);
+
+    // Phase 2 will add:
+    //   void*    GetGdtPointer() const;
+    //   void*    GetIdtPointer() const;
+    //   PhysAddr GetLapicBase() const;
+    //   PhysAddr GetIoapicBase() const;
+    //   PhysAddr GetCr3() const;
+
+    Processor() = default;
+    Processor(const Processor&) = delete;
+    Processor& operator=(const Processor&) = delete;
+
+private:
+    // Phase 2: gdt, idt, lapic_base, ioapic_base, cr3...
+};
+
+Processor& processor();