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authorTom Rini <trini@konsulko.com>2026-02-27 11:13:55 -0600
committerTom Rini <trini@konsulko.com>2026-02-27 11:14:21 -0600
commitf4bb74e25324a011c008bc1261b84ab90922745f (patch)
treee5d6e6733ec20aaaf1918854eebf26c0e2485b03
parentf6963fc232603007c661411fb31c57f1a9678a87 (diff)
Kconfig: Update various legacy syntax
TODO: Split among types Signed-off-by: Tom Rini <trini@konsulko.com>
-rw-r--r--arch/arm/cpu/armv7/Kconfig26
-rw-r--r--arch/arm/mach-renesas/Kconfig.rzg2l4
-rw-r--r--arch/arm/mach-rockchip/Kconfig2
-rw-r--r--arch/arm/mach-rockchip/rk3576/Kconfig2
-rw-r--r--arch/arm/mach-sunxi/Kconfig448
-rw-r--r--arch/mips/Kconfig2
-rw-r--r--drivers/gpio/Kconfig6
-rw-r--r--drivers/i2c/Kconfig20
-rw-r--r--drivers/net/phy/Kconfig8
-rw-r--r--drivers/power/Kconfig362
-rw-r--r--drivers/power/pmic/Kconfig345
-rw-r--r--drivers/power/regulator/Kconfig314
-rw-r--r--drivers/spmi/Kconfig6
-rw-r--r--drivers/usb/Kconfig10
-rw-r--r--drivers/usb/eth/Kconfig16
-rw-r--r--drivers/usb/host/Kconfig44
-rw-r--r--drivers/usb/musb-new/Kconfig6
-rw-r--r--drivers/video/Kconfig104
-rw-r--r--env/Kconfig2
19 files changed, 869 insertions, 858 deletions
diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig
index 3a3c1784e18..8820d1d8ec0 100644
--- a/arch/arm/cpu/armv7/Kconfig
+++ b/arch/arm/cpu/armv7/Kconfig
@@ -13,19 +13,19 @@ config ARMV7_NONSEC
bool "Enable support for booting in non-secure mode" if EXPERT
depends on CPU_V7_HAS_NONSEC
default y
- ---help---
- Say Y here to enable support for booting in non-secure / SVC mode.
+ help
+ Say Y here to enable support for booting in non-secure / SVC mode.
config ARMV7_BOOT_SEC_DEFAULT
bool "Boot in secure mode by default" if EXPERT
depends on ARMV7_NONSEC
default y if ARCH_TEGRA
- ---help---
- Say Y here to boot in secure mode by default even if non-secure mode
- is supported. This option is useful to boot kernels which do not
- suppport booting in non-secure mode. Only set this if you need it.
- This can be overridden at run-time by setting the bootm_boot_mode env.
- variable to "sec" or "nonsec".
+ help
+ Say Y here to boot in secure mode by default even if non-secure mode
+ is supported. This option is useful to boot kernels which do not
+ suppport booting in non-secure mode. Only set this if you need it.
+ This can be overridden at run-time by setting the bootm_boot_mode env.
+ variable to "sec" or "nonsec".
config HAS_ARMV7_SECURE_BASE
bool "Enable support for a hardware secure memory area"
@@ -74,8 +74,8 @@ config ARMV7_VIRT
bool "Enable support for hardware virtualization" if EXPERT
depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
default y
- ---help---
- Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
+ help
+ Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
config ARMV7_PSCI
bool "Enable PSCI support" if EXPERT
@@ -115,9 +115,9 @@ config ARMV7_LPAE
bool "Use LPAE page table format" if EXPERT
depends on CPU_V7A
default y if ARMV7_VIRT
- ---help---
- Say Y here to use the long descriptor page table format. This is
- required if U-Boot runs in HYP mode.
+ help
+ Say Y here to use the long descriptor page table format. This is
+ required if U-Boot runs in HYP mode.
config ARMV7_SET_CORTEX_SMPEN
bool
diff --git a/arch/arm/mach-renesas/Kconfig.rzg2l b/arch/arm/mach-renesas/Kconfig.rzg2l
index dc30bdf3e5c..bb902fab02b 100644
--- a/arch/arm/mach-renesas/Kconfig.rzg2l
+++ b/arch/arm/mach-renesas/Kconfig.rzg2l
@@ -19,10 +19,10 @@ config TARGET_RZG2L_SMARC_EVK
help
Enable support for the RZ/G2L SMARC evaluation board.
-source "board/renesas/rzg2l/Kconfig"
-
endchoice
+source "board/renesas/rzg2l/Kconfig"
+
config MULTI_DTB_FIT_UNCOMPRESS_SZ
default 0x80000 if TARGET_RZG2L_SMARC_EVK
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 92bb4aa62f1..e796bacf4d7 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -616,7 +616,7 @@ config ROCKCHIP_BOOT_MODE_REG
config ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON
bool "Disable device boot on power plug-in"
depends on PMIC_RK8XX
- ---help---
+ help
Say Y here to prevent the device from booting up because of a plug-in
event. When set, the device will boot briefly to determine why it was
powered on, and if it was determined because of a plug-in event
diff --git a/arch/arm/mach-rockchip/rk3576/Kconfig b/arch/arm/mach-rockchip/rk3576/Kconfig
index f347caf8904..f439a002084 100644
--- a/arch/arm/mach-rockchip/rk3576/Kconfig
+++ b/arch/arm/mach-rockchip/rk3576/Kconfig
@@ -15,7 +15,7 @@ config ROCKCHIP_STIMER_BASE
config SYS_SOC
default "rk3576"
-source board/firefly/roc-pc-rk3576/Kconfig
+source "board/firefly/roc-pc-rk3576/Kconfig"
config SYS_CONFIG_NAME
default "rk3576_common"
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index e979ee4a2cc..9dacaf9dcec 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -217,11 +217,11 @@ config SUNXI_SRAM_ADDRESS
default 0x44000 if MACH_SUN55I_A523
default 0x20000 if SUN50I_GEN_H6 || SUNXI_GEN_NCAT2
default 0x0
- ---help---
- Older Allwinner SoCs have their mask boot ROM mapped just below 4GB,
- with the first SRAM region being located at address 0.
- Some newer SoCs map the boot ROM at address 0 instead and move the
- SRAM to a different address.
+ help
+ Older Allwinner SoCs have their mask boot ROM mapped just below 4GB,
+ with the first SRAM region being located at address 0.
+ Some newer SoCs map the boot ROM at address 0 instead and move the
+ SRAM to a different address.
config SUNXI_RVBAR_ADDRESS
hex
@@ -230,26 +230,26 @@ config SUNXI_RVBAR_ADDRESS
default 0x08000040 if MACH_SUN55I_A523
default 0x09010040 if SUN50I_GEN_H6
default 0x017000a0
- ---help---
- The read-only RVBAR system register holds the address of the first
- instruction to execute after a reset. Allwinner cores provide a
- writable MMIO backing store for this register, to allow to set the
- entry point when switching to AArch64. This store is on different
- addresses, depending on the SoC.
+ help
+ The read-only RVBAR system register holds the address of the first
+ instruction to execute after a reset. Allwinner cores provide a
+ writable MMIO backing store for this register, to allow to set the
+ entry point when switching to AArch64. This store is on different
+ addresses, depending on the SoC.
config SUNXI_RVBAR_ALTERNATIVE
hex
depends on ARM64
default 0x08100040 if MACH_SUN50I_H616
default SUNXI_RVBAR_ADDRESS
- ---help---
- The H616 die exists in at least two variants, with one having the
- RVBAR registers at a different address. If the SoC variant ID
- (stored in SRAM_VER_REG[7:0]) is not 0, we need to use the
- other address.
- Set this alternative address to the same as the normal address
- for all other SoCs, so the content of the SRAM_VER_REG becomes
- irrelevant there, and we can use the same code.
+ help
+ The H616 die exists in at least two variants, with one having the
+ RVBAR registers at a different address. If the SoC variant ID
+ (stored in SRAM_VER_REG[7:0]) is not 0, we need to use the
+ other address.
+ Set this alternative address to the same as the normal address
+ for all other SoCs, so the content of the SRAM_VER_REG becomes
+ irrelevant there, and we can use the same code.
config SUNXI_BL31_BASE
hex
@@ -276,16 +276,16 @@ config SUNXI_A64_TIMER_ERRATUM
# not supported by Kconfig
config SUNXI_GEN_SUN4I
bool
- ---help---
- Select this for sunxi SoCs which have resets and clocks set up
- as the original A10 (mach-sun4i).
+ help
+ Select this for sunxi SoCs which have resets and clocks set up
+ as the original A10 (mach-sun4i).
config SUNXI_GEN_SUN6I
bool
- ---help---
- Select this for sunxi SoCs which have sun6i like periphery, like
- separate ahb reset control registers, custom pmic bus, new style
- watchdog, etc.
+ help
+ Select this for sunxi SoCs which have sun6i like periphery, like
+ separate ahb reset control registers, custom pmic bus, new style
+ watchdog, etc.
config SUN50I_GEN_H6
bool
@@ -293,38 +293,38 @@ config SUN50I_GEN_H6
select SPL_LOAD_FIT if SPL
select MMC_SUNXI_HAS_NEW_MODE
select SUPPORT_SPL
- ---help---
- Select this for sunxi SoCs which have H6 like peripherals, clocks
- and memory map.
+ help
+ Select this for sunxi SoCs which have H6 like peripherals, clocks
+ and memory map.
config SUNXI_GEN_NCAT2
bool
select MMC_SUNXI_HAS_NEW_MODE
select SUPPORT_SPL
- ---help---
- Select this for sunxi SoCs which have D1 like peripherals, clocks
- and memory map.
+ help
+ Select this for sunxi SoCs which have D1 like peripherals, clocks
+ and memory map.
config SUNXI_DRAM_DW
bool
- ---help---
- Select this for sunxi SoCs which uses a DRAM controller like the
- DesignWare controller used in H3, mainly SoCs after H3, which do
- not have official open-source DRAM initialization code, but can
- use modified H3 DRAM initialization code.
+ help
+ Select this for sunxi SoCs which uses a DRAM controller like the
+ DesignWare controller used in H3, mainly SoCs after H3, which do
+ not have official open-source DRAM initialization code, but can
+ use modified H3 DRAM initialization code.
if SUNXI_DRAM_DW
config SUNXI_DRAM_DW_16BIT
bool
- ---help---
- Select this for sunxi SoCs with DesignWare DRAM controller and
- have only 16-bit memory buswidth.
+ help
+ Select this for sunxi SoCs with DesignWare DRAM controller and
+ have only 16-bit memory buswidth.
config SUNXI_DRAM_DW_32BIT
bool
- ---help---
- Select this for sunxi SoCs with DesignWare DRAM controller with
- 32-bit memory buswidth.
+ help
+ Select this for sunxi SoCs with DesignWare DRAM controller with
+ 32-bit memory buswidth.
endif
config MACH_SUNXI_H3_H5
@@ -570,25 +570,25 @@ config MACH_SUN8I
config RESERVE_ALLWINNER_BOOT0_HEADER
bool "reserve space for Allwinner boot0 header"
select ENABLE_ARM_SOC_BOOT0_HOOK
- ---help---
- Prepend a 1536 byte (empty) header to the U-Boot image file, to be
- filled with magic values post build. The Allwinner provided boot0
- blob relies on this information to load and execute U-Boot.
- Only needed on 64-bit Allwinner boards so far when using boot0.
+ help
+ Prepend a 1536 byte (empty) header to the U-Boot image file, to be
+ filled with magic values post build. The Allwinner provided boot0
+ blob relies on this information to load and execute U-Boot.
+ Only needed on 64-bit Allwinner boards so far when using boot0.
config ARM_BOOT_HOOK_RMR
bool
depends on ARM64
default y
select ENABLE_ARM_SOC_BOOT0_HOOK
- ---help---
- Insert some ARM32 code at the very beginning of the U-Boot binary
- which uses an RMR register write to bring the core into AArch64 mode.
- The very first instruction acts as a switch, since it's carefully
- chosen to be a NOP in one mode and a branch in the other, so the
- code would only be executed if not already in AArch64.
- This allows both the SPL and the U-Boot proper to be entered in
- either mode and switch to AArch64 if needed.
+ help
+ Insert some ARM32 code at the very beginning of the U-Boot binary
+ which uses an RMR register write to bring the core into AArch64 mode.
+ The very first instruction acts as a switch, since it's carefully
+ chosen to be a NOP in one mode and a branch in the other, so the
+ code would only be executed if not already in AArch64.
+ This allows both the SPL and the U-Boot proper to be entered in
+ either mode and switch to AArch64 if needed.
if SUNXI_DRAM_DW || DRAM_SUN50I_H6 || DRAM_SUN50I_H616 || DRAM_SUN50I_A133 || DRAM_SUN55I_A523
config SUNXI_DRAM_DDR3
@@ -616,33 +616,33 @@ config SUNXI_DRAM_DDR3_1333
bool "DDR3 1333"
select SUNXI_DRAM_DDR3
depends on !DRAM_SUN50I_A133
- ---help---
- This option is the original only supported memory type, which suits
- many H3/H5/A64 boards available now.
+ help
+ This option is the original only supported memory type, which suits
+ many H3/H5/A64 boards available now.
config SUNXI_DRAM_LPDDR3_STOCK
bool "LPDDR3 with Allwinner stock configuration"
select SUNXI_DRAM_LPDDR3
depends on !DRAM_SUN50I_A133
- ---help---
- This option is the LPDDR3 timing used by the stock boot0 by
- Allwinner.
+ help
+ This option is the LPDDR3 timing used by the stock boot0 by
+ Allwinner.
config SUNXI_DRAM_H6_LPDDR3
bool "LPDDR3 DRAM chips on the H6 DRAM controller"
select SUNXI_DRAM_LPDDR3
depends on DRAM_SUN50I_H6
- ---help---
- This option is the LPDDR3 timing used by the stock boot0 by
- Allwinner.
+ help
+ This option is the LPDDR3 timing used by the stock boot0 by
+ Allwinner.
config SUNXI_DRAM_H6_DDR3_1333
bool "DDR3-1333 boot0 timings on the H6 DRAM controller"
select SUNXI_DRAM_DDR3
depends on DRAM_SUN50I_H6
- ---help---
- This option is the DDR3 timing used by the boot0 on H6 TV boxes
- which use a DDR3-1333 timing.
+ help
+ This option is the DDR3 timing used by the boot0 on H6 TV boxes
+ which use a DDR3-1333 timing.
config SUNXI_DRAM_H616_LPDDR3
bool "LPDDR3 DRAM chips on the H616 DRAM controller"
@@ -688,9 +688,9 @@ config SUNXI_DRAM_DDR2_V3S
bool "DDR2 found in V3s chip"
select SUNXI_DRAM_DDR2
depends on MACH_SUN8I_V3S
- ---help---
- This option is only for the DDR2 memory chip which is co-packaged in
- Allwinner V3s SoC.
+ help
+ This option is only for the DDR2 memory chip which is co-packaged in
+ Allwinner V3s SoC.
config SUNXI_DRAM_A523_DDR3
bool "DDR3 DRAM chips on the A523/T527 DRAM controller"
@@ -714,8 +714,8 @@ config DRAM_TYPE
int "sunxi dram type"
depends on MACH_SUN8I_A83T
default 3
- ---help---
- Set the dram type, 3: DDR3, 7: LPDDR3
+ help
+ Set the dram type, 3: DDR3, 7: LPDDR3
config DRAM_CLK
int "sunxi dram clock speed"
@@ -728,17 +728,17 @@ config DRAM_CLK
default 744 if MACH_SUN50I_H6
default 720 if MACH_SUN50I_H616 || MACH_SUN50I_A133
default 1200 if MACH_SUN55I_A523
- ---help---
- Set the dram clock speed, valid range 240 - 480 (prior to sun9i),
- must be a multiple of 24. For the sun9i (A80), the tested values
- (for DDR3-1600) are 312 to 792.
+ help
+ Set the dram clock speed, valid range 240 - 480 (prior to sun9i),
+ must be a multiple of 24. For the sun9i (A80), the tested values
+ (for DDR3-1600) are 312 to 792.
if MACH_SUN5I || MACH_SUN7I
config DRAM_MBUS_CLK
int "sunxi mbus clock speed"
default 300
- ---help---
- Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
+ help
+ Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
endif
@@ -754,8 +754,8 @@ config DRAM_ZQ
default 3881979 if MACH_SUNXI_H3_H5 || MACH_SUN8I_R40 || MACH_SUN50I_H6
default 4145117 if MACH_SUN9I
default 3881915 if MACH_SUN50I
- ---help---
- Set the dram zq value.
+ help
+ Set the dram zq value.
config DRAM_ODT_EN
bool "sunxi dram odt enable"
@@ -766,72 +766,72 @@ config DRAM_ODT_EN
default y if MACH_SUN8I_R40
default y if MACH_SUN50I
default y if MACH_SUN50I_H6
- ---help---
- Select this to enable dram odt (on die termination).
+ help
+ Select this to enable dram odt (on die termination).
if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
config DRAM_EMR1
int "sunxi dram emr1 value"
default 0 if MACH_SUN4I
default 4 if MACH_SUN5I || MACH_SUN7I
- ---help---
- Set the dram controller emr1 value.
+ help
+ Set the dram controller emr1 value.
config DRAM_TPR3
hex "sunxi dram tpr3 value"
default 0x0
- ---help---
- Set the dram controller tpr3 parameter. This parameter configures
- the delay on the command lane and also phase shifts, which are
- applied for sampling incoming read data. The default value 0
- means that no phase/delay adjustments are necessary. Properly
- configuring this parameter increases reliability at high DRAM
- clock speeds.
+ help
+ Set the dram controller tpr3 parameter. This parameter configures
+ the delay on the command lane and also phase shifts, which are
+ applied for sampling incoming read data. The default value 0
+ means that no phase/delay adjustments are necessary. Properly
+ configuring this parameter increases reliability at high DRAM
+ clock speeds.
config DRAM_DQS_GATING_DELAY
hex "sunxi dram dqs_gating_delay value"
default 0x0
- ---help---
- Set the dram controller dqs_gating_delay parmeter. Each byte
- encodes the DQS gating delay for each byte lane. The delay
- granularity is 1/4 cycle. For example, the value 0x05060606
- means that the delay is 5 quarter-cycles for one lane (1.25
- cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
- The default value 0 means autodetection. The results of hardware
- autodetection are not very reliable and depend on the chip
- temperature (sometimes producing different results on cold start
- and warm reboot). But the accuracy of hardware autodetection
- is usually good enough, unless running at really high DRAM
- clocks speeds (up to 600MHz). If unsure, keep as 0.
+ help
+ Set the dram controller dqs_gating_delay parmeter. Each byte
+ encodes the DQS gating delay for each byte lane. The delay
+ granularity is 1/4 cycle. For example, the value 0x05060606
+ means that the delay is 5 quarter-cycles for one lane (1.25
+ cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
+ The default value 0 means autodetection. The results of hardware
+ autodetection are not very reliable and depend on the chip
+ temperature (sometimes producing different results on cold start
+ and warm reboot). But the accuracy of hardware autodetection
+ is usually good enough, unless running at really high DRAM
+ clocks speeds (up to 600MHz). If unsure, keep as 0.
choice
prompt "sunxi dram timings"
default DRAM_TIMINGS_VENDOR_MAGIC
- ---help---
+ help
Select the timings of the DDR3 chips.
config DRAM_TIMINGS_VENDOR_MAGIC
bool "Magic vendor timings from Android"
- ---help---
- The same DRAM timings as in the Allwinner boot0 bootloader.
+ help
+ The same DRAM timings as in the Allwinner boot0 bootloader.
config DRAM_TIMINGS_DDR3_1066F_1333H
bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
- ---help---
- Use the timings of the standard JEDEC DDR3-1066F speed bin for
- DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
- for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
- used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
- or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
- that down binning to DDR3-1066F is supported (because DDR3-1066F
- uses a bit faster timings than DDR3-1333H).
+ help
+ Use the timings of the standard JEDEC DDR3-1066F speed bin for
+ DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
+ for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
+ used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
+ or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
+ that down binning to DDR3-1066F is supported (because DDR3-1066F
+ uses a bit faster timings than DDR3-1333H).
config DRAM_TIMINGS_DDR3_800E_1066G_1333J
bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
- ---help---
- Use the timings of the slowest possible JEDEC speed bin for the
- selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
- DDR3-800E, DDR3-1066G or DDR3-1333J.
+ help
+ Use the timings of the slowest possible JEDEC speed bin for the
+ selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
+ DDR3-800E, DDR3-1066G or DDR3-1333J.
endchoice
@@ -841,11 +841,11 @@ if MACH_SUN8I_A23
config DRAM_ODT_CORRECTION
int "sunxi dram odt correction value"
default 0
- ---help---
- Set the dram odt correction value (range -255 - 255). In allwinner
- fex files, this option is found in bits 8-15 of the u32 odt_en variable
- in the [dram] section. When bit 31 of the odt_en variable is set
- then the correction is negative. Usually the value for this is 0.
+ help
+ Set the dram odt correction value (range -255 - 255). In allwinner
+ fex files, this option is found in bits 8-15 of the u32 odt_en variable
+ in the [dram] section. When bit 31 of the odt_en variable is set
+ then the correction is negative. Usually the value for this is 0.
endif
config SYS_CLK_FREQ
@@ -882,59 +882,59 @@ config SUNXI_MINIMUM_DRAM_MB
default 32 if MACH_SUNIV
default 64 if MACH_SUN8I_V3S
default 256
- ---help---
- Minimum DRAM size expected on the board. Traditionally we assumed
- 256 MB, so that U-Boot would load at 160MB. With co-packaged DRAM
- we have smaller sizes, though, so that U-Boot's own load address and
- the default payload addresses must be shifted down.
- This is expected to be fixed by the SoC selection.
+ help
+ Minimum DRAM size expected on the board. Traditionally we assumed
+ 256 MB, so that U-Boot would load at 160MB. With co-packaged DRAM
+ we have smaller sizes, though, so that U-Boot's own load address and
+ the default payload addresses must be shifted down.
+ This is expected to be fixed by the SoC selection.
config UART0_PORT_F
bool "UART0 on MicroSD breakout board"
- ---help---
- Repurpose the SD card slot for getting access to the UART0 serial
- console. Primarily useful only for low level u-boot debugging on
- tablets, where normal UART0 is difficult to access and requires
- device disassembly and/or soldering. As the SD card can't be used
- at the same time, the system can be only booted in the FEL mode.
- Only enable this if you really know what you are doing.
+ help
+ Repurpose the SD card slot for getting access to the UART0 serial
+ console. Primarily useful only for low level u-boot debugging on
+ tablets, where normal UART0 is difficult to access and requires
+ device disassembly and/or soldering. As the SD card can't be used
+ at the same time, the system can be only booted in the FEL mode.
+ Only enable this if you really know what you are doing.
config OLD_SUNXI_KERNEL_COMPAT
bool "Enable workarounds for booting old kernels"
- ---help---
- Set this to enable various workarounds for old kernels, this results in
- sub-optimal settings for newer kernels, only enable if needed.
+ help
+ Set this to enable various workarounds for old kernels, this results in
+ sub-optimal settings for newer kernels, only enable if needed.
config MMC1_PINS_PH
bool "Pins for mmc1 are on Port H"
depends on MACH_SUN4I || MACH_SUN7I || MACH_SUN8I_R40
- ---help---
- Select this option for boards where mmc1 uses the Port H pinmux.
+ help
+ Select this option for boards where mmc1 uses the Port H pinmux.
config MMC_SUNXI_SLOT_EXTRA
int "mmc extra slot number"
default -1
- ---help---
- sunxi builds always enable mmc0, some boards also have a second sdcard
- slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
- support for this.
+ help
+ sunxi builds always enable mmc0, some boards also have a second sdcard
+ slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
+ support for this.
config I2C0_ENABLE
bool "Enable I2C/TWI controller 0"
default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I_R40
default n if MACH_SUN6I || MACH_SUN8I
select CMD_I2C
- ---help---
- This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
- its clock and setting up the bus. This is especially useful on devices
- with slaves connected to the bus or with pins exposed through e.g. an
- expansion port/header.
+ help
+ This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
+ its clock and setting up the bus. This is especially useful on devices
+ with slaves connected to the bus or with pins exposed through e.g. an
+ expansion port/header.
config I2C1_ENABLE
bool "Enable I2C/TWI controller 1"
select CMD_I2C
- ---help---
- See I2C0_ENABLE help text.
+ help
+ See I2C0_ENABLE help text.
if SUNXI_GEN_SUN6I || SUN50I_GEN_H6 || SUNXI_GEN_NCAT2
config R_I2C_ENABLE
@@ -942,20 +942,20 @@ config R_I2C_ENABLE
# This is used for the pmic on H3
default y if SY8106A_POWER
select CMD_I2C
- ---help---
- Set this to y to enable the I2C controller which is part of the PRCM.
+ help
+ Set this to y to enable the I2C controller which is part of the PRCM.
endif
config AXP_GPIO
bool "Enable support for gpio-s on axp PMICs"
depends on AXP_PMIC_BUS
- ---help---
- Say Y here to enable support for the gpio pins of the axp PMIC ICs.
+ help
+ Say Y here to enable support for the gpio pins of the axp PMIC ICs.
config AXP_DISABLE_BOOT_ON_POWERON
bool "Disable device boot on power plug-in"
depends on AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER
- ---help---
+ help
Say Y here to prevent the device from booting up because of a plug-in
event. When set, the device will boot into the SPL briefly to
determine why it was powered on, and if it was determined because of
@@ -976,127 +976,127 @@ config VIDEO_SUNXI
imply VIDEO_DAMAGE
imply VIDEO_DT_SIMPLEFB
default y
- ---help---
- Say Y here to add support for using a graphical console on the HDMI,
- LCD or VGA output found on older sunxi devices. This will also provide
- a simple_framebuffer device for Linux.
+ help
+ Say Y here to add support for using a graphical console on the HDMI,
+ LCD or VGA output found on older sunxi devices. This will also provide
+ a simple_framebuffer device for Linux.
config VIDEO_HDMI
bool "HDMI output support"
depends on VIDEO_SUNXI && !MACH_SUN8I && !MACH_SUNIV
default y
- ---help---
- Say Y here to add support for outputting video over HDMI.
+ help
+ Say Y here to add support for outputting video over HDMI.
config VIDEO_VGA
bool "VGA output support"
depends on VIDEO_SUNXI && (MACH_SUN4I || MACH_SUN7I)
- ---help---
- Say Y here to add support for outputting video over VGA.
+ help
+ Say Y here to add support for outputting video over VGA.
config VIDEO_VGA_VIA_LCD
bool "VGA via LCD controller support"
depends on VIDEO_SUNXI && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
- ---help---
- Say Y here to add support for external DACs connected to the parallel
- LCD interface driving a VGA connector, such as found on the
- Olimex A13 boards.
+ help
+ Say Y here to add support for external DACs connected to the parallel
+ LCD interface driving a VGA connector, such as found on the
+ Olimex A13 boards.
config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
bool "Force sync active high for VGA via LCD controller support"
depends on VIDEO_VGA_VIA_LCD
- ---help---
- Say Y here if you've a board which uses opendrain drivers for the vga
- hsync and vsync signals. Opendrain drivers cannot generate steep enough
- positive edges for a stable video output, so on boards with opendrain
- drivers the sync signals must always be active high.
+ help
+ Say Y here if you've a board which uses opendrain drivers for the vga
+ hsync and vsync signals. Opendrain drivers cannot generate steep enough
+ positive edges for a stable video output, so on boards with opendrain
+ drivers the sync signals must always be active high.
config VIDEO_VGA_EXTERNAL_DAC_EN
string "LCD panel power enable pin"
depends on VIDEO_VGA_VIA_LCD
default ""
- ---help---
- Set the enable pin for the external VGA DAC. This takes a string in the
- format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
+ help
+ Set the enable pin for the external VGA DAC. This takes a string in the
+ format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
config VIDEO_COMPOSITE
bool "Composite video output support"
depends on VIDEO_SUNXI && (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
- ---help---
- Say Y here to add support for outputting composite video.
+ help
+ Say Y here to add support for outputting composite video.
config VIDEO_LCD_MODE
string "LCD panel timing details"
depends on VIDEO_SUNXI
default ""
- ---help---
- LCD panel timing details string, leave empty if there is no LCD panel.
- This is in drivers/video/videomodes.c: video_get_params() format, e.g.
- x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
- Also see: http://linux-sunxi.org/LCD
+ help
+ LCD panel timing details string, leave empty if there is no LCD panel.
+ This is in drivers/video/videomodes.c: video_get_params() format, e.g.
+ x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
+ Also see: http://linux-sunxi.org/LCD
config VIDEO_LCD_DCLK_PHASE
int "LCD panel display clock phase"
depends on VIDEO_SUNXI || VIDEO
default 1
range 0 3
- ---help---
- Select LCD panel display clock phase shift
+ help
+ Select LCD panel display clock phase shift
config VIDEO_LCD_POWER
string "LCD panel power enable pin"
depends on VIDEO_SUNXI
default ""
- ---help---
- Set the power enable pin for the LCD panel. This takes a string in the
- format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
+ help
+ Set the power enable pin for the LCD panel. This takes a string in the
+ format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
config VIDEO_LCD_RESET
string "LCD panel reset pin"
depends on VIDEO_SUNXI
default ""
- ---help---
- Set the reset pin for the LCD panel. This takes a string in the format
- understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
+ help
+ Set the reset pin for the LCD panel. This takes a string in the format
+ understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
config VIDEO_LCD_BL_EN
string "LCD panel backlight enable pin"
depends on VIDEO_SUNXI
default ""
- ---help---
- Set the backlight enable pin for the LCD panel. This takes a string in the
- the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
- port H.
+ help
+ Set the backlight enable pin for the LCD panel. This takes a string in the
+ the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
+ port H.
config VIDEO_LCD_BL_PWM
string "LCD panel backlight pwm pin"
depends on VIDEO_SUNXI
default ""
- ---help---
- Set the backlight pwm pin for the LCD panel. This takes a string in the
- format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
+ help
+ Set the backlight pwm pin for the LCD panel. This takes a string in the
+ format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
config VIDEO_LCD_BL_PWM_ACTIVE_LOW
bool "LCD panel backlight pwm is inverted"
depends on VIDEO_SUNXI
default y
- ---help---
- Set this if the backlight pwm output is active low.
+ help
+ Set this if the backlight pwm output is active low.
config VIDEO_LCD_PANEL_I2C
bool "LCD panel needs to be configured via i2c"
depends on VIDEO_SUNXI
select DM_I2C_GPIO
- ---help---
- Say y here if the LCD panel needs to be configured via i2c. This
- will add a bitbang i2c controller using gpios to talk to the LCD.
+ help
+ Say y here if the LCD panel needs to be configured via i2c. This
+ will add a bitbang i2c controller using gpios to talk to the LCD.
config VIDEO_LCD_PANEL_I2C_NAME
string "LCD panel i2c interface node name"
depends on VIDEO_LCD_PANEL_I2C
default "i2c"
- ---help---
- Set the device tree node name for the LCD i2c interface.
+ help
+ Set the device tree node name for the LCD i2c interface.
# Note only one of these may be selected at a time! But hidden choices are
# not supported by Kconfig
@@ -1117,16 +1117,16 @@ config VIDEO_DE2
select VIDEO_DW_HDMI
imply VIDEO_DT_SIMPLEFB
default y
- ---help---
- Say y here if you want to build DE2 video driver which is present on
- newer SoCs. Currently only HDMI output is supported.
+ help
+ Say y here if you want to build DE2 video driver which is present on
+ newer SoCs. Currently only HDMI output is supported.
choice
prompt "LCD panel support"
depends on VIDEO_SUNXI
- ---help---
- Select which type of LCD panel to support.
+ help
+ Select which type of LCD panel to support.
config VIDEO_LCD_PANEL_PARALLEL
bool "Generic parallel interface LCD panel"
@@ -1140,40 +1140,40 @@ config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
select VIDEO_LCD_SSD2828
select VIDEO_LCD_IF_PARALLEL
- ---help---
- 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
+ help
+ 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
config VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804
bool "eDP 4-lane, 1.62G LCD panel via ANX9804 bridge chip"
select VIDEO_LCD_ANX9804
select VIDEO_LCD_IF_PARALLEL
select VIDEO_LCD_PANEL_I2C
- ---help---
- Select this for eDP LCD panels with 4 lanes running at 1.62G,
- connected via an ANX9804 bridge chip.
+ help
+ Select this for eDP LCD panels with 4 lanes running at 1.62G,
+ connected via an ANX9804 bridge chip.
config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
bool "Hitachi tx18d42vm LCD panel"
select VIDEO_LCD_HITACHI_TX18D42VM
select VIDEO_LCD_IF_LVDS
- ---help---
- 7.85" 1024x768 Hitachi tx18d42vm LCD panel support
+ help
+ 7.85" 1024x768 Hitachi tx18d42vm LCD panel support
config VIDEO_LCD_TL059WV5C0
bool "tl059wv5c0 LCD panel"
select VIDEO_LCD_PANEL_I2C
select VIDEO_LCD_IF_PARALLEL
- ---help---
- 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
- Aigo M60/M608/M606 tablets.
+ help
+ 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
+ Aigo M60/M608/M606 tablets.
endchoice
config GMAC_TX_DELAY
int "GMAC Transmit Clock Delay Chain"
default 0
- ---help---
- Set the GMAC Transmit Clock Delay Chain value.
+ help
+ Set the GMAC Transmit Clock Delay Chain value.
config SPL_STACK_R_ADDR
default 0x81e00000 if MACH_SUNIV
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 36612756294..b23357440cd 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -351,7 +351,7 @@ config MIPS_RELOCATION_TABLE_SIZE
range 0x100 0x10000
default "0xc000" if TARGET_MALTA
default "0x8000"
- ---help---
+ help
A table of relocation data will be appended to the U-Boot binary
and parsed in relocate_code() to fix up all offsets in the relocated
U-Boot.
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index f69919abc05..2dcdf829363 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -458,9 +458,9 @@ config SUNXI_GPIO
config SUNXI_NEW_PINCTRL
bool
depends on SUNXI_GPIO
- ---help---
- The Allwinner D1 and other new SoCs use a different register map
- for the GPIO block, which we need to know about in the SPL.
+ help
+ The Allwinner D1 and other new SoCs use a different register map
+ for the GPIO block, which we need to know about in the SPL.
config XILINX_GPIO
bool "Xilinx GPIO driver"
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 55465dc1d46..5c7aa172917 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -110,16 +110,16 @@ config I2C_CROS_EC_TUNNEL
config I2C_CROS_EC_LDO
bool "Provide access to LDOs on the Chrome OS EC"
depends on CROS_EC
- ---help---
- On many Chromebooks the main PMIC is inaccessible to the AP. This is
- often dealt with by using an I2C pass-through interface provided by
- the EC. On some unfortunate models (e.g. Spring) the pass-through
- is not available, and an LDO message is available instead. This
- option enables a driver which provides very basic access to those
- regulators, via the EC. We implement this as an I2C bus which
- emulates just the TPS65090 messages we know about. This is done to
- avoid duplicating the logic in the TPS65090 regulator driver for
- enabling/disabling an LDO.
+ help
+ On many Chromebooks the main PMIC is inaccessible to the AP. This is
+ often dealt with by using an I2C pass-through interface provided by
+ the EC. On some unfortunate models (e.g. Spring) the pass-through
+ is not available, and an LDO message is available instead. This
+ option enables a driver which provides very basic access to those
+ regulators, via the EC. We implement this as an I2C bus which
+ emulates just the TPS65090 messages we know about. This is done to
+ avoid duplicating the logic in the TPS65090 regulator driver for
+ enabling/disabling an LDO.
config I2C_SET_DEFAULT_BUS_NUM
bool "Set default I2C bus number"
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 709f1c91eb2..2c15ff128c1 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -316,13 +316,13 @@ config PHY_TERANETICS
config PHY_TI
bool "Texas Instruments Ethernet PHYs support"
- ---help---
+ help
Adds PHY registration support for TI PHYs.
config PHY_TI_DP83867
select PHY_TI
bool "Texas Instruments Ethernet DP83867 PHY support"
- ---help---
+ help
Adds support for the TI DP83867 1Gbit PHY.
config SPL_PHY_TI_DP83867
@@ -332,13 +332,13 @@ config SPL_PHY_TI_DP83867
config PHY_TI_DP83869
select PHY_TI
bool "Texas Instruments Ethernet DP83869 PHY support"
- ---help---
+ help
Adds support for the TI DP83869 1Gbit PHY.
config PHY_TI_GENERIC
select PHY_TI
bool "Texas Instruments Generic Ethernet PHYs support"
- ---help---
+ help
Adds support for Generic TI PHYs that don't need special handling but
the PHY name is associated with a PHY ID.
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 1b06d8a66c7..5d0d94ee094 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -63,98 +63,100 @@ choice
config SUNXI_NO_PMIC
bool "board without a pmic"
- ---help---
- Select this for boards which do not use a PMIC.
+ help
+ Select this for boards which do not use a PMIC.
config AXP152_POWER
bool "axp152 pmic support"
depends on MACH_SUN5I
select AXP_PMIC_BUS
select CMD_POWEROFF
- ---help---
- Select this to enable support for the axp152 pmic found on most
- A10s boards.
+ help
+ Select this to enable support for the axp152 pmic found on most A10s
+ boards.
config AXP209_POWER
bool "axp209 pmic support"
depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I_V3S
select AXP_PMIC_BUS
select CMD_POWEROFF
- ---help---
- Select this to enable support for the axp209 pmic found on most
- A10, A13 and A20 boards.
+ help
+ Select this to enable support for the axp209 pmic found on most A10,
+ A13 and A20 boards.
config AXP221_POWER
bool "axp221 / axp223 pmic support"
depends on MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_R40
select AXP_PMIC_BUS
select CMD_POWEROFF
- ---help---
- Select this to enable support for the axp221/axp223 pmic found on most
- A23 and A31 boards.
+ help
+ Select this to enable support for the axp221/axp223 pmic found on
+ most A23 and A31 boards.
config AXP305_POWER
bool "axp305 pmic support"
depends on MACH_SUN50I_H616
select AXP_PMIC_BUS
select CMD_POWEROFF
- ---help---
- Select this to enable support for the axp305 pmic found on most
- H616 boards.
+ help
+ Select this to enable support for the axp305 pmic found on most H616
+ boards.
config AXP313_POWER
bool "axp313 pmic support"
depends on MACH_SUN50I_H616
select AXP_PMIC_BUS
select CMD_POWEROFF
- ---help---
- Select this to enable support for the AXP313 PMIC found on some
- H616 boards.
+ help
+ Select this to enable support for the AXP313 PMIC found on some H616
+ boards.
config AXP717_POWER
bool "axp717 pmic support"
select AXP_PMIC_BUS
select CMD_POWEROFF
- ---help---
- Select this to enable support for the AXP717 PMIC found on some boards.
+ help
+ Select this to enable support for the AXP717 PMIC found on some
+ boards.
config AXP803_POWER
bool "AXP803 PMIC support"
select AXP_PMIC_BUS
- ---help---
- Select this to enable support for the AXP803 PMIC found on some boards.
+ help
+ Select this to enable support for the AXP803 PMIC found on some
+ boards.
config AXP809_POWER
bool "axp809 pmic support"
depends on MACH_SUN9I
select AXP_PMIC_BUS
select CMD_POWEROFF
- ---help---
- Say y here to enable support for the axp809 pmic found on A80 boards.
+ help
+ Say y here to enable support for the axp809 pmic found on A80 boards.
config AXP818_POWER
bool "axp818 pmic support"
depends on MACH_SUN8I_A83T
select AXP_PMIC_BUS
select CMD_POWEROFF
- ---help---
- Say y here to enable support for the axp818 pmic found on
- A83T dev board.
+ help
+ Say y here to enable support for the axp818 pmic found on A83T dev
+ board.
config AXP318W_POWER
bool "axp318w pmic support"
select AXP_PMIC_BUS
select CMD_POWEROFF
- ---help---
- Select this to enable support for the AXP318W PMIC found on some
- A733 boards.
+ help
+ Select this to enable support for the AXP318W PMIC found on some A733
+ boards.
config SY8106A_POWER
bool "SY8106A pmic support"
depends on MACH_SUNXI_H3_H5
- ---help---
- Select this to enable support for the SY8106A pmic found on some
- H3 boards.
+ help
+ Select this to enable support for the SY8106A pmic found on some H3
+ boards.
endchoice
@@ -166,22 +168,23 @@ config AXP_I2C_ADDRESS
default 0x36 if AXP318W_POWER
default 0x30 if AXP152_POWER
default 0x34
- ---help---
- I2C address of the AXP PMIC, used for the SPL only.
+ help
+ I2C address of the AXP PMIC, used for the SPL only.
config AXP_DCDC1_VOLT
int "axp pmic dcdc1 voltage"
depends on AXP221_POWER || AXP809_POWER || AXP818_POWER || AXP803_POWER
default 3300 if AXP818_POWER || MACH_SUN8I_R40 || AXP803_POWER
default 3000 if MACH_SUN6I || MACH_SUN8I || MACH_SUN9I
- ---help---
- Set the voltage (mV) to program the axp pmic dcdc1 at, set to 0 to
- disable dcdc1. On A23 / A31 / A33 (axp221) boards dcdc1 is used for
- generic 3.3V IO voltage for external devices like the lcd-panal and
- sdcard interfaces, etc. On most boards dcdc1 is undervolted to 3.0V to
- save battery. On A31 devices dcdc1 is also used for VCC-IO. On A83T
- dcdc1 is used for VCC-IO, nand, usb0, sd , etc. On A80 dcdc1 normally
- powers some of the pingroups, NAND/eMMC, SD/MMC, and USB OTG.
+ help
+ Set the voltage (mV) to program the axp pmic dcdc1 at, set to 0 to
+ disable dcdc1. On A23 / A31 / A33 (axp221) boards dcdc1 is used for
+ generic 3.3V IO voltage for external devices like the lcd-panal and
+ sdcard interfaces, etc. On most boards dcdc1 is undervolted to 3.0V
+ to save battery. On A31 devices dcdc1 is also used for VCC-IO. On
+ A83T dcdc1 is used for VCC-IO, nand, usb0, sd , etc. On A80 dcdc1
+ normally powers some of the pingroups, NAND/eMMC, SD/MMC, and USB
+ OTG.
config AXP_DCDC2_VOLT
int "axp pmic dcdc2 voltage"
@@ -194,16 +197,17 @@ config AXP_DCDC2_VOLT
default 1200 if MACH_SUN6I
default 1100 if MACH_SUN8I
default 0 if MACH_SUN9I
- ---help---
- Set the voltage (mV) to program the axp pmic dcdc2 at, set to 0 to
- disable dcdc2.
- On A10(s) / A13 / A20 boards dcdc2 is VDD-CPU and should be 1.4V.
- On A31 boards dcdc2 is used for VDD-GPU and should be 1.2V.
- On A23/A33 boards dcdc2 is used for VDD-SYS and should be 1.1V.
- On A80 boards dcdc2 powers the GPU and can be left off.
- On A83T boards dcdc2 is used for VDD-CPUA(cluster 0) and should be 0.9V.
- On R40 boards dcdc2 is VDD-CPU and should be 1.1V
- On boards using the AXP313 or AXP717 it's often VDD-CPU.
+ help
+ Set the voltage (mV) to program the axp pmic dcdc2 at, set to 0 to
+ disable dcdc2.
+ On A10(s) / A13 / A20 boards dcdc2 is VDD-CPU and should be 1.4V.
+ On A31 boards dcdc2 is used for VDD-GPU and should be 1.2V.
+ On A23/A33 boards dcdc2 is used for VDD-SYS and should be 1.1V.
+ On A80 boards dcdc2 powers the GPU and can be left off.
+ On A83T boards dcdc2 is used for VDD-CPUA(cluster 0) and should be
+ 0.9V.
+ On R40 boards dcdc2 is VDD-CPU and should be 1.1V
+ On boards using the AXP313 or AXP717 it's often VDD-CPU.
config AXP_DCDC3_VOLT
int "axp pmic dcdc3 voltage"
@@ -214,18 +218,18 @@ config AXP_DCDC3_VOLT
default 1100 if AXP313_POWER
default 1100 if MACH_SUN8I_R40
default 1200 if MACH_SUN6I || MACH_SUN8I
- ---help---
- Set the voltage (mV) to program the axp pmic dcdc3 at, set to 0 to
- disable dcdc3.
- On A10(s) / A13 / A20 boards with an axp209 dcdc3 is VDD-INT-DLL and
- should be 1.25V.
- On A10s boards with an axp152 dcdc3 is VCC-DRAM and should be 1.5V.
- On A23 / A31 / A33 boards dcdc3 is VDD-CPU and should be 1.2V.
- On A80 boards dcdc3 is used for VDD-CPUA(cluster 0) and should be 0.9V.
- On A83T boards dcdc3 is used for VDD-CPUB(cluster 1) and should be 0.9V.
- On R40 boards dcdc3 is VDD-SYS and VDD-GPU and should be 1.1V.
- On boards using the AXP313 or AXP717 it's often VDD-DRAM and should
- be 1.1V for LPDDR4.
+ help
+ Set the voltage (mV) to program the axp pmic dcdc3 at, set to 0 to
+ disable dcdc3.
+ On A10(s) / A13 / A20 boards with an axp209 dcdc3 is VDD-INT-DLL and
+ should be 1.25V.
+ On A10s boards with an axp152 dcdc3 is VCC-DRAM and should be 1.5V.
+ On A23 / A31 / A33 boards dcdc3 is VDD-CPU and should be 1.2V.
+ On A80 boards dcdc3 is used for VDD-CPUA(cluster 0) and should be 0.9V.
+ On A83T boards dcdc3 is used for VDD-CPUB(cluster 1) and should be 0.9V.
+ On R40 boards dcdc3 is VDD-SYS and VDD-GPU and should be 1.1V.
+ On boards using the AXP313 or AXP717 it's often VDD-DRAM and should
+ be 1.1V for LPDDR4.
config AXP_DCDC4_VOLT
int "axp pmic dcdc4 voltage"
@@ -235,25 +239,25 @@ config AXP_DCDC4_VOLT
default 0 if MACH_SUN8I
default 900 if MACH_SUN9I
default 1500 if AXP305_POWER
- ---help---
- Set the voltage (mV) to program the axp pmic dcdc4 at, set to 0 to
- disable dcdc4.
- On A10s boards with an axp152 dcdc4 is VDD-INT-DLL and should be 1.25V.
- On A31 boards dcdc4 is used for VDD-SYS and should be 1.2V.
- On A23 / A33 boards dcdc4 is unused and should be disabled.
- On A80 boards dcdc4 powers VDD-SYS, HDMI, USB OTG and should be 0.9V.
- On A83T boards dcdc4 is used for VDD-GPU.
- On H616 boards dcdcd is used for VCC-DRAM.
+ help
+ Set the voltage (mV) to program the axp pmic dcdc4 at, set to 0 to
+ disable dcdc4.
+ On A10s boards with an axp152 dcdc4 is VDD-INT-DLL and should be 1.25V.
+ On A31 boards dcdc4 is used for VDD-SYS and should be 1.2V.
+ On A23 / A33 boards dcdc4 is unused and should be disabled.
+ On A80 boards dcdc4 powers VDD-SYS, HDMI, USB OTG and should be 0.9V.
+ On A83T boards dcdc4 is used for VDD-GPU.
+ On H616 boards dcdcd is used for VCC-DRAM.
config AXP_DCDC5_VOLT
int "axp pmic dcdc5 voltage"
depends on AXP221_POWER || AXP809_POWER || AXP818_POWER || AXP803_POWER
default 1500 if MACH_SUN6I || MACH_SUN8I || MACH_SUN9I
- ---help---
- Set the voltage (mV) to program the axp pmic dcdc5 at, set to 0 to
- disable dcdc5.
- On A23 / A31 / A33 / A80 / A83T / R40 boards dcdc5 is VCC-DRAM and
- should be 1.5V, 1.35V if DDR3L is used.
+ help
+ Set the voltage (mV) to program the axp pmic dcdc5 at, set to 0 to
+ disable dcdc5.
+ On A23 / A31 / A33 / A80 / A83T / R40 boards dcdc5 is VCC-DRAM and
+ should be 1.5V, 1.35V if DDR3L is used.
config AXP_ALDO1_VOLT
int "axp pmic (a)ldo1 voltage"
@@ -261,14 +265,14 @@ config AXP_ALDO1_VOLT
default 0 if MACH_SUN6I || MACH_SUN8I_R40
default 1800 if MACH_SUN8I_A83T
default 3000 if MACH_SUN8I || MACH_SUN9I
- ---help---
- Set the voltage (mV) to program the axp pmic aldo1 at, set to 0 to
- disable aldo1.
- On A31 boards aldo1 is often used to power the wifi module.
- On A23 / A33 boards aldo1 is used for VCC-IO and should be 3.0V.
- On A80 boards aldo1 powers the USB hosts and should be 3.0V.
- On A83T / H8 boards aldo1 is used for MIPI CSI, DSI, HDMI, EFUSE, and
- should be 1.8V.
+ help
+ Set the voltage (mV) to program the axp pmic aldo1 at, set to 0 to
+ disable aldo1.
+ On A31 boards aldo1 is often used to power the wifi module.
+ On A23 / A33 boards aldo1 is used for VCC-IO and should be 3.0V.
+ On A80 boards aldo1 powers the USB hosts and should be 3.0V.
+ On A83T / H8 boards aldo1 is used for MIPI CSI, DSI, HDMI, EFUSE, and
+ should be 1.8V.
config AXP_ALDO2_VOLT
int "axp pmic (a)ldo2 voltage"
@@ -277,188 +281,188 @@ config AXP_ALDO2_VOLT
default 0 if MACH_SUN6I || MACH_SUN9I
default 1800 if MACH_SUN8I_A83T
default 2500 if MACH_SUN8I
- ---help---
- Set the voltage (mV) to program the axp pmic aldo2 at, set to 0 to
- disable aldo2.
- On A10(s) / A13 / A20 boards aldo2 is AVCC and should be 3.0V.
- On A31 boards aldo2 is typically unused and should be disabled.
- On A31 boards aldo2 may be used for LPDDR2 then it should be 1.8V.
- On A23 / A33 boards aldo2 is used for VDD-DLL and should be 2.5V.
- On A80 boards aldo2 powers PB pingroup and camera IO and can be left off.
- On A83T / H8 boards aldo2 powers VDD-DLL, VCC18-PLL, CPVDD, VDD18-ADC,
- LPDDR2, and the codec. It should be 1.8V.
+ help
+ Set the voltage (mV) to program the axp pmic aldo2 at, set to 0 to
+ disable aldo2.
+ On A10(s) / A13 / A20 boards aldo2 is AVCC and should be 3.0V.
+ On A31 boards aldo2 is typically unused and should be disabled.
+ On A31 boards aldo2 may be used for LPDDR2 then it should be 1.8V.
+ On A23 / A33 boards aldo2 is used for VDD-DLL and should be 2.5V.
+ On A80 boards aldo2 powers PB pingroup and camera IO and can be left off.
+ On A83T / H8 boards aldo2 powers VDD-DLL, VCC18-PLL, CPVDD, VDD18-ADC,
+ LPDDR2, and the codec. It should be 1.8V.
config AXP_ALDO3_VOLT
int "axp pmic (a)ldo3 voltage"
depends on AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER
default 0 if AXP209_POWER || MACH_SUN9I
default 3000 if MACH_SUN6I || MACH_SUN8I
- ---help---
- Set the voltage (mV) to program the axp pmic aldo3 at, set to 0 to
- disable aldo3.
- On A10(s) / A13 / A20 boards aldo3 should be 2.8V.
- On A23 / A31 / A33 / R40 boards aldo3 is VCC-PLL and AVCC and should
- be 3.0V.
- On A80 boards aldo3 is normally not used.
- On A83T / H8 boards aldo3 is AVCC, VCC-PL, and VCC-LED, and should be
- 3.0V.
+ help
+ Set the voltage (mV) to program the axp pmic aldo3 at, set to 0 to
+ disable aldo3.
+ On A10(s) / A13 / A20 boards aldo3 should be 2.8V.
+ On A23 / A31 / A33 / R40 boards aldo3 is VCC-PLL and AVCC and should
+ be 3.0V.
+ On A80 boards aldo3 is normally not used.
+ On A83T / H8 boards aldo3 is AVCC, VCC-PL, and VCC-LED, and should be
+ 3.0V.
choice
prompt "axp pmic (a)ldo3 voltage rate control"
depends on AXP209_POWER
default AXP_ALDO3_VOLT_SLOPE_NONE
- ---help---
- The AXP can slowly ramp up voltage to reduce the inrush current when
- changing voltages.
- Note, this does not apply when enabling/disabling LDO3. See
- "axp pmic (a)ldo3 inrush quirk" below to enable a slew rate to limit
- inrush current on broken board designs.
+ help
+ The AXP can slowly ramp up voltage to reduce the inrush current when
+ changing voltages.
+ Note, this does not apply when enabling/disabling LDO3. See
+ "axp pmic (a)ldo3 inrush quirk" below to enable a slew rate to limit
+ inrush current on broken board designs.
config AXP_ALDO3_VOLT_SLOPE_NONE
bool "No voltage slope"
- ---help---
- Tries to reach the next voltage setting near instantaneously. Measurements
- indicate that this is about 0.0167 V/uS.
+ help
+ Tries to reach the next voltage setting near instantaneously.
+ Measurements indicate that this is about 0.0167 V/uS.
config AXP_ALDO3_VOLT_SLOPE_16
bool "1.6 mV per uS"
- ---help---
- Increases the voltage by 1.6 mV per uS until the final voltage has
- been reached. Note that the scaling is in 25 mV steps and thus
- the slew rate in reality is about 25 mV/31.250 uS.
+ help
+ Increases the voltage by 1.6 mV per uS until the final voltage has
+ been reached. Note that the scaling is in 25 mV steps and thus
+ the slew rate in reality is about 25 mV/31.250 uS.
config AXP_ALDO3_VOLT_SLOPE_08
bool "0.8 mV per uS"
- ---help---
- Increases the voltage by 0.8 mV per uS until the final voltage has
- been reached. Note that the scaling is in 25 mV steps however and thus
- the slew rate in reality is about 25 mV/15.625 uS.
- This is the slowest supported rate.
+ help
+ Increases the voltage by 0.8 mV per uS until the final voltage has
+ been reached. Note that the scaling is in 25 mV steps however and
+ thus the slew rate in reality is about 25 mV/15.625 uS.
+ This is the slowest supported rate.
endchoice
config AXP_ALDO3_INRUSH_QUIRK
bool "axp pmic (a)ldo3 inrush quirk"
depends on AXP209_POWER
- ---help---
- The reference design denotes a value of 4.7 uF for the output capacitor
- of LDO3. Some boards have too high capacitance causing an inrush current
- and resulting an AXP209 shutdown.
+ help
+ The reference design denotes a value of 4.7 uF for the output
+ capacitor of LDO3. Some boards have too high capacitance causing
+ an inrush current and resulting an AXP209 shutdown.
config AXP_ALDO4_VOLT
int "axp pmic (a)ldo4 voltage"
depends on AXP209_POWER
default 0 if AXP209_POWER
- ---help---
- Set the voltage (mV) to program the axp pmic aldo4 at, set to 0 to
- disable aldo4.
- On A10(s) / A13 / A20 boards aldo4 should be 2.8V.
+ help
+ Set the voltage (mV) to program the axp pmic aldo4 at, set to 0 to
+ disable aldo4.
+ On A10(s) / A13 / A20 boards aldo4 should be 2.8V.
config AXP_DLDO1_VOLT
int "axp pmic dldo1 voltage"
depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
default 0
- ---help---
- Set the voltage (mV) to program the axp pmic dldo1 at, set to 0 to
- disable dldo1. On sun6i (A31) boards with ethernet dldo1 is often used
- to power the ethernet phy. On A23, A33 and A80 boards this is often
- used to power the wifi.
+ help
+ Set the voltage (mV) to program the axp pmic dldo1 at, set to 0 to
+ disable dldo1. On sun6i (A31) boards with ethernet dldo1 is often used
+ to power the ethernet phy. On A23, A33 and A80 boards this is often
+ used to power the wifi.
config AXP_DLDO2_VOLT
int "axp pmic dldo2 voltage"
depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
default 3000 if MACH_SUN9I
default 0
- ---help---
- Set the voltage (mV) to program the axp pmic dldo2 at, set to 0 to
- disable dldo2.
- On A80 boards dldo2 normally powers the PL pins and should be 3.0V.
+ help
+ Set the voltage (mV) to program the axp pmic dldo2 at, set to 0 to
+ disable dldo2.
+ On A80 boards dldo2 normally powers the PL pins and should be 3.0V.
config AXP_DLDO3_VOLT
int "axp pmic dldo3 voltage"
depends on AXP221_POWER || AXP818_POWER
default 0
- ---help---
- Set the voltage (mV) to program the axp pmic dldo3 at, set to 0 to
- disable dldo3.
+ help
+ Set the voltage (mV) to program the axp pmic dldo3 at, set to 0 to
+ disable dldo3.
config AXP_DLDO4_VOLT
int "axp pmic dldo4 voltage"
depends on AXP221_POWER || AXP818_POWER
default 0
- ---help---
- Set the voltage (mV) to program the axp pmic dldo4 at, set to 0 to
- disable dldo4.
+ help
+ Set the voltage (mV) to program the axp pmic dldo4 at, set to 0 to
+ disable dldo4.
config AXP_ELDO1_VOLT
int "axp pmic eldo1 voltage"
depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
default 0
- ---help---
- Set the voltage (mV) to program the axp pmic eldo1 at, set to 0 to
- disable eldo1.
+ help
+ Set the voltage (mV) to program the axp pmic eldo1 at, set to 0 to
+ disable eldo1.
config AXP_ELDO2_VOLT
int "axp pmic eldo2 voltage"
depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
default 0
- ---help---
- Set the voltage (mV) to program the axp pmic eldo2 at, set to 0 to
- disable eldo2.
+ help
+ Set the voltage (mV) to program the axp pmic eldo2 at, set to 0 to
+ disable eldo2.
config AXP_ELDO3_VOLT
int "axp pmic eldo3 voltage"
depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
default 3000 if MACH_SUN9I
default 0
- ---help---
- Set the voltage (mV) to program the axp pmic eldo3 at, set to 0 to
- disable eldo3. On some A31(s) tablets it might be used to supply
- 1.2V for the SSD2828 chip (converter of parallel LCD interface
- into MIPI DSI).
- On A80 boards it powers the PM pingroup and should be 3.0V.
+ help
+ Set the voltage (mV) to program the axp pmic eldo3 at, set to 0 to
+ disable eldo3. On some A31(s) tablets it might be used to supply
+ 1.2V for the SSD2828 chip (converter of parallel LCD interface
+ into MIPI DSI).
+ On A80 boards it powers the PM pingroup and should be 3.0V.
config AXP_FLDO1_VOLT
int "axp pmic fldo1 voltage"
depends on AXP818_POWER
default 0 if MACH_SUN8I_A83T
- ---help---
- Set the voltage (mV) to program the axp pmic fldo1 at, set to 0 to
- disable fldo1.
- On A83T / H8 boards fldo1 is VCC-HSIC and should be 1.2V if HSIC is
- used.
+ help
+ Set the voltage (mV) to program the axp pmic fldo1 at, set to 0 to
+ disable fldo1.
+ On A83T / H8 boards fldo1 is VCC-HSIC and should be 1.2V if HSIC is
+ used.
config AXP_FLDO2_VOLT
int "axp pmic fldo2 voltage"
depends on AXP818_POWER
default 900 if MACH_SUN8I_A83T
- ---help---
- Set the voltage (mV) to program the axp pmic fldo2 at, set to 0 to
- disable fldo2.
- On A83T / H8 boards fldo2 is VCC-CPUS and should be 0.9V.
+ help
+ Set the voltage (mV) to program the axp pmic fldo2 at, set to 0 to
+ disable fldo2.
+ On A83T / H8 boards fldo2 is VCC-CPUS and should be 0.9V.
config AXP_FLDO3_VOLT
int "axp pmic fldo3 voltage"
depends on AXP818_POWER
default 0
- ---help---
- Set the voltage (mV) to program the axp pmic fldo3 at, set to 0 to
- disable fldo3.
+ help
+ Set the voltage (mV) to program the axp pmic fldo3 at, set to 0 to
+ disable fldo3.
config AXP_SW_ON
bool "axp pmic sw on"
depends on AXP809_POWER || AXP818_POWER
- ---help---
- Enable to turn on axp pmic sw.
+ help
+ Enable to turn on axp pmic sw.
config SY8106A_VOUT1_VOLT
int "SY8106A pmic VOUT1 voltage"
depends on SY8106A_POWER
default 1200
- ---help---
- Set the voltage (mV) to program the SY8106A pmic VOUT1. This
- is typically used to power the VDD-CPU and should be 1200mV.
- Values can range from 680mV till 1950mV.
+ help
+ Set the voltage (mV) to program the SY8106A pmic VOUT1. This
+ is typically used to power the VDD-CPU and should be 1200mV.
+ Values can range from 680mV till 1950mV.
config TPS6586X_POWER
bool "Enable legacy driver for TI TPS6586x power management chip"
@@ -467,9 +471,9 @@ config TWL4030_POWER
depends on OMAP34XX
bool "Enable driver for TI TWL4030 power management chip"
imply CMD_POWEROFF
- ---help---
- The TWL4030 in a combination audio CODEC/power management with
- GPIO and it is commonly used with the OMAP3 family of processors
+ help
+ The TWL4030 in a combination audio CODEC/power management with
+ GPIO and it is commonly used with the OMAP3 family of processors
config POWER_MT6323
bool "Poweroff driver for mediatek mt6323"
diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index 345b7c92263..7535f08f3da 100644
--- a/drivers/power/pmic/Kconfig
+++ b/drivers/power/pmic/Kconfig
@@ -1,14 +1,14 @@
config DM_PMIC
bool "Enable Driver Model for PMIC drivers (UCLASS_PMIC)"
depends on DM
- ---help---
- This config enables the driver-model PMIC support.
- UCLASS_PMIC - designed to provide an I/O interface for PMIC devices.
- For the multi-function PMIC devices, this can be used as parent I/O
- device for each IC's interface. Then, each children uses its parent
- for read/write. For detailed description, please refer to the files:
- - 'drivers/power/pmic/pmic-uclass.c'
- - 'include/power/pmic.h'
+ help
+ This config enables the driver-model PMIC support.
+ UCLASS_PMIC - designed to provide an I/O interface for PMIC devices.
+ For the multi-function PMIC devices, this can be used as parent I/O
+ device for each IC's interface. Then, each children uses its parent
+ for read/write. For detailed description, please refer to the files:
+ - 'drivers/power/pmic/pmic-uclass.c'
+ - 'include/power/pmic.h'
if DM_PMIC
@@ -16,34 +16,34 @@ config SPL_DM_PMIC
bool "Enable Driver Model for PMIC drivers (UCLASS_PMIC) in SPL"
depends on SPL_DM
default y
- ---help---
- This config enables the driver-model PMIC support in SPL.
- UCLASS_PMIC - designed to provide an I/O interface for PMIC devices.
- For the multi-function PMIC devices, this can be used as parent I/O
- device for each IC's interface. Then, each children uses its parent
- for read/write. For detailed description, please refer to the files:
- - 'drivers/power/pmic/pmic-uclass.c'
- - 'include/power/pmic.h'
+ help
+ This config enables the driver-model PMIC support in SPL.
+ UCLASS_PMIC - designed to provide an I/O interface for PMIC devices.
+ For the multi-function PMIC devices, this can be used as parent I/O
+ device for each IC's interface. Then, each children uses its parent
+ for read/write. For detailed description, please refer to the files:
+ - 'drivers/power/pmic/pmic-uclass.c'
+ - 'include/power/pmic.h'
config PMIC_CHILDREN
bool "Allow child devices for PMICs"
default y
- ---help---
- This allows PMICs to support child devices (such as regulators) in
- SPL. This adds quite a bit of code so if you are not using this
- feature you can turn it off. Most likely you should turn it on for
- U-Boot proper.
+ help
+ This allows PMICs to support child devices (such as regulators) in
+ SPL. This adds quite a bit of code so if you are not using this
+ feature you can turn it off. Most likely you should turn it on for
+ U-Boot proper.
config SPL_PMIC_CHILDREN
bool "Allow child devices for PMICs in SPL"
depends on SPL_DM_PMIC
default y
- ---help---
- This allows PMICs to support child devices (such as regulators) in
- SPL. This adds quite a bit of code so if you are not using this
- feature you can turn it off. In this case you may need a 'back door'
- to call your regulator code (e.g. see rk8xx.c for direct functions
- for use in SPL).
+ help
+ This allows PMICs to support child devices (such as regulators) in
+ SPL. This adds quite a bit of code so if you are not using this
+ feature you can turn it off. In this case you may need a 'back door'
+ to call your regulator code (e.g. see rk8xx.c for direct functions
+ for use in SPL).
config PMIC_AB8500
bool "Enable driver for ST-Ericsson AB8500 PMIC via PRCMU"
@@ -57,11 +57,11 @@ config PMIC_AB8500
config PMIC_ACT8846
bool "Enable support for the active-semi 8846 PMIC"
depends on DM_I2C
- ---help---
- This PMIC includes 4 DC/DC step-down buck regulators and 8 low-dropout
- regulators (LDOs). It also provides some GPIO, reset and battery
- functions. It uses an I2C interface and is designed for use with
- tablets and smartphones.
+ help
+ This PMIC includes 4 DC/DC step-down buck regulators and 8 low-dropout
+ regulators (LDOs). It also provides some GPIO, reset and battery
+ functions. It uses an I2C interface and is designed for use with
+ tablets and smartphones.
config PMIC_AXP
bool "Enable Driver Model for X-Powers AXP PMICs"
@@ -173,46 +173,46 @@ config SPL_DM_PMIC_PCA9450
config DM_PMIC_PFUZE100
bool "Enable Driver Model for PMIC PFUZE100"
- ---help---
- This config enables implementation of driver-model pmic uclass features
- for PMIC PFUZE100. The driver implements read/write operations.
+ help
+ This config enables implementation of driver-model pmic uclass features
+ for PMIC PFUZE100. The driver implements read/write operations.
config SPL_DM_PMIC_PFUZE100
bool "Enable Driver Model for PMIC PFUZE100 in SPL"
depends on SPL_DM_PMIC
- ---help---
- This config enables implementation of driver-model pmic uclass features
- for PMIC PFUZE100 in SPL. The driver implements read/write operations.
+ help
+ This config enables implementation of driver-model pmic uclass features
+ for PMIC PFUZE100 in SPL. The driver implements read/write operations.
config DM_PMIC_MAX8907
bool "Enable Driver Model for PMIC MAX8907"
- ---help---
- This config enables implementation of driver-model pmic uclass features
- for PMIC MAX8907. The driver implements read/write operations.
- This is a Power Management IC with a decent set of peripherals from which
- 3 DC-to-DC Step-Down (SD) Regulators, 20 Low-Dropout Linear (LDO) Regulators,
- Real-Time Clock (RTC) and more with I2C Compatible Interface.
+ help
+ This config enables implementation of driver-model pmic uclass features
+ for PMIC MAX8907. The driver implements read/write operations.
+ This is a Power Management IC with a decent set of peripherals from which
+ 3 DC-to-DC Step-Down (SD) Regulators, 20 Low-Dropout Linear (LDO) Regulators,
+ Real-Time Clock (RTC) and more with I2C Compatible Interface.
config DM_PMIC_MAX77663
bool "Enable Driver Model for PMIC MAX77663"
- ---help---
- This config enables implementation of driver-model pmic uclass features
- for PMIC MAX77663. The driver implements read/write operations.
- This is a Power Management IC with a decent set of peripherals from which
- 4 DC-to-DC Step-Down (SD) Regulators, 9 Low-Dropout Linear (LDO) Regulators,
- 8 GPIOs, Real-Time Clock (RTC) and more with I2C Compatible Interface.
+ help
+ This config enables implementation of driver-model pmic uclass features
+ for PMIC MAX77663. The driver implements read/write operations.
+ This is a Power Management IC with a decent set of peripherals from which
+ 4 DC-to-DC Step-Down (SD) Regulators, 9 Low-Dropout Linear (LDO) Regulators,
+ 8 GPIOs, Real-Time Clock (RTC) and more with I2C Compatible Interface.
config DM_PMIC_MAX77686
bool "Enable Driver Model for PMIC MAX77686"
- ---help---
- This config enables implementation of driver-model pmic uclass features
- for PMIC MAX77686. The driver implements read/write operations.
+ help
+ This config enables implementation of driver-model pmic uclass features
+ for PMIC MAX77686. The driver implements read/write operations.
config DM_PMIC_MAX8998
bool "Enable Driver Model for PMIC MAX8998"
- ---help---
- This config enables implementation of driver-model pmic uclass features
- for PMIC MAX8998. The driver implements read/write operations.
+ help
+ This config enables implementation of driver-model pmic uclass features
+ for PMIC MAX8998. The driver implements read/write operations.
config DM_PMIC_MC34708
bool "Enable Driver Model for PMIC MC34708"
@@ -222,87 +222,87 @@ config DM_PMIC_MC34708
config PMIC_MAX8997
bool "Enable Driver Model for PMIC MAX8997"
- ---help---
- This config enables implementation of driver-model pmic uclass features
- for PMIC MAX8997. The driver implements read/write operations.
- This is a Power Management IC with RTC, Fuel Gauge, MUIC control on Chip.
- - 21x LDOs
- - 12x GPIOs
- - Haptic motor driver
- - RTC with two alarms
- - Fuel Gauge and one backup battery charger
- - MUIC
- - Others
+ help
+ This config enables implementation of driver-model pmic uclass features
+ for PMIC MAX8997. The driver implements read/write operations.
+ This is a Power Management IC with RTC, Fuel Gauge, MUIC control on Chip.
+ - 21x LDOs
+ - 12x GPIOs
+ - Haptic motor driver
+ - RTC with two alarms
+ - Fuel Gauge and one backup battery charger
+ - MUIC
+ - Others
config PMIC_QCOM
bool "Enable Driver Model for Qualcomm generic PMIC"
- ---help---
- The Qcom PMIC is connected to one (or several) processors
- with SPMI bus. It has 2 slaves with several peripherals:
- - 18x LDO
- - 4x GPIO
- - Power and Reset buttons
- - Watchdog
- - RTC
- - Vibrator drivers
- - Others
-
- Driver binding info: doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt
+ help
+ The Qcom PMIC is connected to one (or several) processors
+ with SPMI bus. It has 2 slaves with several peripherals:
+ - 18x LDO
+ - 4x GPIO
+ - Power and Reset buttons
+ - Watchdog
+ - RTC
+ - Vibrator drivers
+ - Others
+
+ Driver binding info: doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt
config PMIC_RK8XX
bool "Enable support for Rockchip PMIC RK8XX"
select SYSRESET_CMD_POWEROFF if SYSRESET && CMD_POWEROFF
- ---help---
- The Rockchip RK808 PMIC provides four buck DC-DC convertors, 8 LDOs,
- an RTC and two low Rds (resistance (drain to source)) switches. It is
- accessed via an I2C interface. The device is used with Rockchip SoCs.
- This driver implements register read/write operations.
+ help
+ The Rockchip RK808 PMIC provides four buck DC-DC convertors, 8 LDOs,
+ an RTC and two low Rds (resistance (drain to source)) switches. It is
+ accessed via an I2C interface. The device is used with Rockchip SoCs.
+ This driver implements register read/write operations.
config SPL_PMIC_RK8XX
bool "Enable support for Rockchip PMIC RK8XX in SPL"
depends on SPL_DM_PMIC
- ---help---
- The Rockchip RK808 PMIC provides four buck DC-DC convertors, 8 LDOs,
- an RTC and two low Rds (resistance (drain to source)) switches. It is
- accessed via an I2C interface. The device is used with Rockchip SoCs.
- This driver implements register read/write operations.
+ help
+ The Rockchip RK808 PMIC provides four buck DC-DC convertors, 8 LDOs,
+ an RTC and two low Rds (resistance (drain to source)) switches. It is
+ accessed via an I2C interface. The device is used with Rockchip SoCs.
+ This driver implements register read/write operations.
config PMIC_S2MPS11
bool "Enable Driver Model for PMIC Samsung S2MPS11"
- ---help---
- The Samsung S2MPS11 PMIC provides:
- - 38 adjustable LDO regulators
- - 9 High-Efficiency Buck Converters
- - 1 BuckBoost Converter
- - RTC with two alarms
- - Backup battery charger
- - I2C Configuration Interface
- This driver provides access to I/O interface only.
- Binding info: doc/device-tree-bindings/pmic/s2mps11.txt
+ help
+ The Samsung S2MPS11 PMIC provides:
+ - 38 adjustable LDO regulators
+ - 9 High-Efficiency Buck Converters
+ - 1 BuckBoost Converter
+ - RTC with two alarms
+ - Backup battery charger
+ - I2C Configuration Interface
+ This driver provides access to I/O interface only.
+ Binding info: doc/device-tree-bindings/pmic/s2mps11.txt
config DM_PMIC_SANDBOX
bool "Enable Driver Model for emulated Sandbox PMIC"
- ---help---
- Enable the driver for Sandbox PMIC emulation. The emulated PMIC device
- depends on two drivers:
- - sandbox PMIC I/O driver - implements dm pmic operations
- - sandbox PMIC i2c emul driver - emulates the PMIC's I2C transmission
-
- A detailed information can be found in header: '<power/sandbox_pmic.h>'
-
- The Sandbox PMIC info:
- * I/O interface:
- - I2C chip address: 0x40
- - first register address: 0x0
- - register count: 0x10
- * Adjustable outputs:
- - 2x LDO
- - 2x BUCK
- - Each, with a different operating conditions (header).
- * Reset values:
- - set by i2c emul driver's probe() (defaults in header)
-
- Driver binding info: doc/device-tree-bindings/pmic/sandbox.txt
+ help
+ Enable the driver for Sandbox PMIC emulation. The emulated PMIC device
+ depends on two drivers:
+ - sandbox PMIC I/O driver - implements dm pmic operations
+ - sandbox PMIC i2c emul driver - emulates the PMIC's I2C transmission
+
+ A detailed information can be found in header: '<power/sandbox_pmic.h>'
+
+ The Sandbox PMIC info:
+ * I/O interface:
+ - I2C chip address: 0x40
+ - first register address: 0x0
+ - register count: 0x10
+ * Adjustable outputs:
+ - 2x LDO
+ - 2x BUCK
+ - Each, with a different operating conditions (header).
+ * Reset values:
+ - set by i2c emul driver's probe() (defaults in header)
+
+ Driver binding info: doc/device-tree-bindings/pmic/sandbox.txt
config DM_PMIC_CPCAP
bool "Enable Driver Model for Motorola CPCAP"
@@ -316,79 +316,80 @@ config DM_PMIC_CPCAP
config PMIC_S5M8767
bool "Enable Driver Model for the Samsung S5M8767 PMIC"
- ---help---
- The S5M8767 PMIC provides a large array of LDOs and BUCKs for use
- as a SoC power controller. It also provides 32KHz clock outputs. This
- driver provides basic register access and sets up the attached
- regulators if regulator support is enabled.
+ help
+ The S5M8767 PMIC provides a large array of LDOs and BUCKs for use
+ as a SoC power controller. It also provides 32KHz clock outputs. This
+ driver provides basic register access and sets up the attached
+ regulators if regulator support is enabled.
config PMIC_RN5T567
bool "Enable driver for Ricoh RN5T567 PMIC"
- ---help---
- The RN5T567 is a PMIC with 4 step-down DC/DC converters, 5 LDO
- regulators Real-Time Clock and 4 GPIOs. This driver provides
- register access only.
+ help
+ The RN5T567 is a PMIC with 4 step-down DC/DC converters, 5 LDO
+ regulators Real-Time Clock and 4 GPIOs. This driver provides
+ register access only.
config SPL_PMIC_RN5T567
bool "Enable driver for Ricoh RN5T567 PMIC in SPL"
depends on SPL_DM_PMIC
- ---help---
- The RN5T567 is a PMIC with 4 step-down DC/DC converters, 5 LDO
- regulators Real-Time Clock and 4 GPIOs. This driver provides
- register access only.
+ help
+ The RN5T567 is a PMIC with 4 step-down DC/DC converters, 5 LDO
+ regulators Real-Time Clock and 4 GPIOs. This driver provides
+ register access only.
config PMIC_TPS65090
bool "Enable driver for Texas Instruments TPS65090 PMIC"
- ---help---
- The TPS65090 is a PMIC containing several LDOs, DC to DC convertors,
- FETs and a battery charger. This driver provides register access
- only, and you can enable the regulator/charger drivers separately if
- required.
+ help
+ The TPS65090 is a PMIC containing several LDOs, DC to DC convertors,
+ FETs and a battery charger. This driver provides register access
+ only, and you can enable the regulator/charger drivers separately if
+ required.
config PMIC_PALMAS
bool "Enable driver for Texas Instruments PALMAS PMIC"
- ---help---
- The PALMAS is a PMIC containing several LDOs, SMPS.
- This driver binds the pmic children.
+ help
+ The PALMAS is a PMIC containing several LDOs, SMPS.
+ This driver binds the pmic children.
config PMIC_LP873X
bool "Enable driver for Texas Instruments LP873X PMIC"
- ---help---
- The LP873X is a PMIC containing couple of LDOs and couple of SMPS.
- This driver binds the pmic children.
+ help
+ The LP873X is a PMIC containing couple of LDOs and couple of SMPS.
+ This driver binds the pmic children.
config PMIC_LP87565
bool "Enable driver for Texas Instruments LP87565 PMIC"
- ---help---
- The LP87565 is a PMIC containing a bunch of SMPS.
- This driver binds the pmic children.
+ help
+ The LP87565 is a PMIC containing a bunch of SMPS.
+ This driver binds the pmic children.
config DM_PMIC_TPS65910
bool "Enable driver for Texas Instruments TPS65910 PMIC"
- ---help---
- The TPS65910 is a PMIC containing 3 buck DC-DC converters, one boost
- DC-DC converter, 8 LDOs and a RTC. This driver binds the SMPS and LDO
- pmic children.
+ help
+ The TPS65910 is a PMIC containing 3 buck DC-DC converters, one boost
+ DC-DC converter, 8 LDOs and a RTC. This driver binds the SMPS and LDO
+ pmic children.
config DM_PMIC_TPS80031
bool "Enable driver for Texas Instruments TPS80031/TPS80032 PMIC"
- ---help---
- This config enables implementation of driver-model pmic uclass features
- for TPS80031/TPS80032 PMICs. The driver implements read/write operations.
- This is a Power Management IC with a decent set of peripherals from which
- 5 Buck Converters refered as Switched-mode power supply (SMPS), 11 General-
- Purpose Low-Dropout Voltage Regulators (LDO), USB OTG Module, Real-Time
- Clock (RTC) with Timer and Alarm Wake-Up, Two Digital PWM Outputs and more
- with I2C Compatible Interface. PMIC occupies 4 I2C addresses.
+ help
+ This config enables implementation of driver-model pmic uclass features
+ for TPS80031/TPS80032 PMICs. The driver implements read/write
+ operations. This is a Power Management IC with a decent set of
+ peripherals from which 5 Buck Converters refered as Switched-mode
+ power supply (SMPS), 11 General- Purpose Low-Dropout Voltage
+ Regulators (LDO), USB OTG Module, Real-Time Clock (RTC) with Timer
+ and Alarm Wake-Up, Two Digital PWM Outputs and more with I2C
+ Compatible Interface. PMIC occupies 4 I2C addresses.
config PMIC_STPMIC1
bool "Enable support for STMicroelectronics STPMIC1 PMIC"
depends on DM_I2C
select SYSRESET_CMD_POWEROFF if CMD_POWEROFF && !ARM_PSCI_FW
- ---help---
- The STPMIC1 PMIC provides 4 BUCKs, 6 LDOs, 1 VREF and 2 power switches.
- It is accessed via an I2C interface. The device is used with STM32MP1
- SoCs. This driver implements register read/write operations.
+ help
+ The STPMIC1 PMIC provides 4 BUCKs, 6 LDOs, 1 VREF and 2 power switches.
+ It is accessed via an I2C interface. The device is used with STM32MP1
+ SoCs. This driver implements register read/write operations.
config SPL_PMIC_PALMAS
bool "Enable driver for Texas Instruments PALMAS PMIC"
@@ -445,11 +446,11 @@ endif
config PMIC_TPS65217
bool "Enable driver for Texas Instruments TPS65217 PMIC"
- ---help---
- The TPS65217 is a PMIC containing several LDOs, DC to DC convertors,
- FETs and a battery charger. This driver provides register access
- only, and you can enable the regulator/charger drivers separately if
- required.
+ help
+ The TPS65217 is a PMIC containing several LDOs, DC to DC convertors,
+ FETs and a battery charger. This driver provides register access
+ only, and you can enable the regulator/charger drivers separately if
+ required.
config POWER_TPS65218
bool "Enable legacy driver for TPS65218 PMIC"
@@ -485,9 +486,9 @@ config POWER_PFUZE3000
config POWER_MC34VR500
bool "Enable driver for Freescale MC34VR500 PMIC"
- ---help---
- The MC34VR500 is used in conjunction with the FSL T1 and LS1 series
- SoC. It provides 4 buck DC-DC convertors and 5 LDOs, and it is accessed
- via an I2C interface.
+ help
+ The MC34VR500 is used in conjunction with the FSL T1 and LS1 series
+ SoC. It provides 4 buck DC-DC convertors and 5 LDOs, and it is accessed
+ via an I2C interface.
endif
diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
index 4f39e46cebd..1d6b4e3e0f2 100644
--- a/drivers/power/regulator/Kconfig
+++ b/drivers/power/regulator/Kconfig
@@ -1,38 +1,38 @@
config DM_REGULATOR
bool "Enable Driver Model for REGULATOR drivers (UCLASS_REGULATOR)"
depends on DM
- ---help---
- This config enables the driver model regulator support.
- UCLASS_REGULATOR - designed to provide a common API for basic regulator's
- functions, like get/set Voltage or Current value, enable state, etc...
- Note:
- When enabling this, please read the description, found in the files:
- - 'include/power/pmic.h'
- - 'include/power/regulator.h'
- - 'drivers/power/pmic/pmic-uclass.c'
- - 'drivers/power/pmic/regulator-uclass.c'
- It's important to call the device_bind() with the proper node offset,
- when binding the regulator devices. The pmic_bind_childs() can be used
- for this purpose if PMIC I/O driver is implemented or dm_scan_fdt_dev()
- otherwise. Detailed information can be found in the header file.
+ help
+ This config enables the driver model regulator support.
+ UCLASS_REGULATOR - designed to provide a common API for basic regulator's
+ functions, like get/set Voltage or Current value, enable state, etc...
+ Note:
+ When enabling this, please read the description, found in the files:
+ - 'include/power/pmic.h'
+ - 'include/power/regulator.h'
+ - 'drivers/power/pmic/pmic-uclass.c'
+ - 'drivers/power/pmic/regulator-uclass.c'
+ It's important to call the device_bind() with the proper node offset,
+ when binding the regulator devices. The pmic_bind_childs() can be used
+ for this purpose if PMIC I/O driver is implemented or dm_scan_fdt_dev()
+ otherwise. Detailed information can be found in the header file.
config SPL_DM_REGULATOR
bool "Enable regulators for SPL"
depends on DM_REGULATOR && SPL_POWER
- ---help---
- Regulators are seldom needed in SPL. Even if they are accessed, some
- code space can be saved by accessing the PMIC registers directly.
- Enable this option if you need regulators in SPL and can cope with
- the extra code size.
+ help
+ Regulators are seldom needed in SPL. Even if they are accessed, some
+ code space can be saved by accessing the PMIC registers directly.
+ Enable this option if you need regulators in SPL and can cope with
+ the extra code size.
config REGULATOR_ACT8846
bool "Enable driver for ACT8846 regulator"
depends on DM_REGULATOR && PMIC_ACT8846
- ---help---
- Enable support for the regulator functions of the ACT8846 PMIC. The
- driver implements get/set api for the various BUCKS and LDOS supported
- by the PMIC device. This driver is controlled by a device tree node
- which includes voltage limits.
+ help
+ Enable support for the regulator functions of the ACT8846 PMIC. The
+ driver implements get/set api for the various BUCKS and LDOS supported
+ by the PMIC device. This driver is controlled by a device tree node
+ which includes voltage limits.
config REGULATOR_AS3722
bool "Enable driver for AS7322 regulator"
@@ -126,46 +126,46 @@ config SPL_DM_REGULATOR_DA9063
config DM_REGULATOR_PFUZE100
bool "Enable Driver Model for REGULATOR PFUZE100"
depends on DM_REGULATOR && DM_PMIC_PFUZE100
- ---help---
- This config enables implementation of driver-model regulator uclass
- features for REGULATOR PFUZE100. The driver implements get/set api for:
- value, enable and mode.
+ help
+ This config enables implementation of driver-model regulator uclass
+ features for REGULATOR PFUZE100. The driver implements get/set api
+ for: value, enable and mode.
config REGULATOR_PWM
bool "Enable driver for PWM regulators"
depends on DM_REGULATOR && DM_PWM
- ---help---
- Enable support for the PWM regulator functions which voltage are
- controlled by PWM duty ratio. Some of Rockchip board using this kind
- of regulator. The driver implements get/set api for the various BUCKS.
- This driver is controlled by a device tree node
- which includes voltage limits.
+ help
+ Enable support for the PWM regulator functions which voltage are
+ controlled by PWM duty ratio. Some of Rockchip board using this kind
+ of regulator. The driver implements get/set api for the various BUCKS.
+ This driver is controlled by a device tree node which includes
+ voltage limits.
config DM_REGULATOR_MAX8907
bool "Enable Driver Model for REGULATOR MAX8907"
depends on DM_REGULATOR && DM_PMIC_MAX8907
- ---help---
- This config enables implementation of driver-model regulator uclass
- features for REGULATOR MAX8907. The driver supports both DC-to-DC
- Step-Down (SD) Regulators and Low-Dropout Linear (LDO) Regulators
- found in MAX8907 PMIC and implements get/set api for value and enable.
+ help
+ This config enables implementation of driver-model regulator uclass
+ features for REGULATOR MAX8907. The driver supports both DC-to-DC
+ Step-Down (SD) Regulators and Low-Dropout Linear (LDO) Regulators
+ found in MAX8907 PMIC and implements get/set api for value and enable.
config DM_REGULATOR_MAX77663
bool "Enable Driver Model for REGULATOR MAX77663"
depends on DM_REGULATOR && DM_PMIC_MAX77663
- ---help---
- This config enables implementation of driver-model regulator uclass
- features for REGULATOR MAX77663. The driver supports both DC-to-DC
- Step-Down (SD) Regulators and Low-Dropout Linear (LDO) Regulators
- found in MAX77663 PMIC and implements get/set api for value and enable.
+ help
+ This config enables implementation of driver-model regulator uclass
+ features for REGULATOR MAX77663. The driver supports both DC-to-DC
+ Step-Down (SD) Regulators and Low-Dropout Linear (LDO) Regulators
+ found in MAX77663 PMIC and implements get/set api for value and enable.
config DM_REGULATOR_MAX77686
bool "Enable Driver Model for REGULATOR MAX77686"
depends on DM_REGULATOR && DM_PMIC_MAX77686
- ---help---
- This config enables implementation of driver-model regulator uclass
- features for REGULATOR MAX77686. The driver implements get/set api for:
- value, enable and mode.
+ help
+ This config enables implementation of driver-model regulator uclass
+ features for REGULATOR MAX77686. The driver implements get/set api for:
+ value, enable and mode.
config DM_REGULATOR_NPCM8XX
bool "Enable Driver Model for NPCM8xx voltage supply"
@@ -211,33 +211,33 @@ config DM_REGULATOR_FIXED
bool "Enable Driver Model for REGULATOR Fixed value"
depends on DM_REGULATOR
select DM_REGULATOR_COMMON
- ---help---
- This config enables implementation of driver-model regulator uclass
- features for fixed value regulators. The driver implements get/set api
- for enable and get only for voltage value.
+ help
+ This config enables implementation of driver-model regulator uclass
+ features for fixed value regulators. The driver implements get/set api
+ for enable and get only for voltage value.
config SPL_DM_REGULATOR_FIXED
bool "Enable Driver Model for REGULATOR Fixed value in SPL"
depends on DM_REGULATOR_FIXED && SPL
select SPL_DM_REGULATOR_COMMON
- ---help---
- This config enables implementation of driver-model regulator uclass
- features for fixed value regulators in SPL.
+ help
+ This config enables implementation of driver-model regulator uclass
+ features for fixed value regulators in SPL.
config DM_REGULATOR_GPIO
bool "Enable Driver Model for GPIO REGULATOR"
depends on DM_REGULATOR && DM_GPIO
select DM_REGULATOR_COMMON
- ---help---
- This config enables implementation of driver-model regulator uclass
- features for gpio regulators. The driver implements get/set for
- voltage value.
+ help
+ This config enables implementation of driver-model regulator uclass
+ features for gpio regulators. The driver implements get/set for
+ voltage value.
config DM_REGULATOR_QCOM_RPMH
bool "Enable driver model for Qualcomm RPMh regulator"
depends on DM_REGULATOR && QCOM_RPMH
select DEVRES
- ---help---
+ help
Enable support for the Qualcomm RPMh regulator. The driver
implements get/set api for a limited set of regulators used
by u-boot.
@@ -245,7 +245,7 @@ config DM_REGULATOR_QCOM_RPMH
config DM_REGULATOR_QCOM_USB_VBUS
bool "Enable driver model for Qualcomm USB vbus regulator"
depends on DM_REGULATOR
- ---help---
+ help
Enable support for the Qualcomm USB Vbus regulator. The driver
implements get/set api for the regulator to be used by u-boot.
@@ -253,18 +253,18 @@ config SPL_DM_REGULATOR_GPIO
bool "Enable Driver Model for GPIO REGULATOR in SPL"
depends on DM_REGULATOR_GPIO && SPL_DM_GPIO
select SPL_DM_REGULATOR_COMMON
- ---help---
- This config enables implementation of driver-model regulator uclass
- features for gpio regulators in SPL.
+ help
+ This config enables implementation of driver-model regulator uclass
+ features for gpio regulators in SPL.
config REGULATOR_RK8XX
bool "Enable driver for RK8XX regulators"
depends on DM_REGULATOR && PMIC_RK8XX
- ---help---
- Enable support for the regulator functions of the RK8XX PMIC. The
- driver implements get/set api for the various BUCKS and LDOs supported
- by the PMIC device. This driver is controlled by a device tree node
- which includes voltage limits.
+ help
+ Enable support for the regulator functions of the RK8XX PMIC. The
+ driver implements get/set api for the various BUCKS and LDOs supported
+ by the PMIC device. This driver is controlled by a device tree node
+ which includes voltage limits.
config SPL_REGULATOR_RK8XX
bool "Enable driver for RK8XX regulators in SPL"
@@ -278,98 +278,98 @@ config SPL_REGULATOR_RK8XX
config DM_REGULATOR_S2MPS11
bool "Enable driver for S2MPS11 regulator"
depends on DM_REGULATOR && PMIC_S2MPS11
- ---help---
- This enables implementation of driver-model regulator uclass
- features for REGULATOR S2MPS11.
- The driver implements get/set api for: value and enable.
+ help
+ This enables implementation of driver-model regulator uclass
+ features for REGULATOR S2MPS11.
+ The driver implements get/set api for: value and enable.
config REGULATOR_S5M8767
bool "Enable support for S5M8767 regulator"
depends on DM_REGULATOR && PMIC_S5M8767
- ---help---
- This enables the regulator features of the S5M8767, allowing voltages
- to be set, etc. The driver is not fully complete but supports most
- common requirements, including all LDOs and BUCKs. This allows many
- supplies to be set automatically using the device tree values.
+ help
+ This enables the regulator features of the S5M8767, allowing voltages
+ to be set, etc. The driver is not fully complete but supports most
+ common requirements, including all LDOs and BUCKs. This allows many
+ supplies to be set automatically using the device tree values.
config DM_REGULATOR_SANDBOX
bool "Enable Driver Model for Sandbox PMIC regulator"
depends on DM_REGULATOR && DM_PMIC_SANDBOX
- ---help---
- Enable the regulator driver for emulated Sandbox PMIC.
- The emulated PMIC device depends on two drivers:
- - sandbox PMIC I/O driver - implements dm pmic operations
- - sandbox PMIC regulator driver - implements dm regulator operations
- - sandbox PMIC i2c emul driver - emulates the PMIC's I2C transmission
-
- The regulator driver provides uclass operations for sandbox PMIC's
- regulators. The driver implements get/set api for: voltage, current,
- operation mode and enable state.
- The driver supports LDO and BUCK regulators.
-
- The Sandbox PMIC info:
- * I/O interface:
- - I2C chip address: 0x40
- - first register address: 0x0
- - register count: 0x10
- * Adjustable outputs:
- - 2x LDO
- - 2x BUCK
- - Each, with a different operating conditions (header).
- * Reset values:
- - set by i2c emul driver's probe() (defaults in header)
-
- A detailed information can be found in header: '<power/sandbox_pmic.h>'
- Binding info: 'doc/device-tree-bindings/pmic/max77686.txt'
+ help
+ Enable the regulator driver for emulated Sandbox PMIC.
+ The emulated PMIC device depends on two drivers:
+ - sandbox PMIC I/O driver - implements dm pmic operations
+ - sandbox PMIC regulator driver - implements dm regulator operations
+ - sandbox PMIC i2c emul driver - emulates the PMIC's I2C transmission
+
+ The regulator driver provides uclass operations for sandbox PMIC's
+ regulators. The driver implements get/set api for: voltage, current,
+ operation mode and enable state.
+ The driver supports LDO and BUCK regulators.
+
+ The Sandbox PMIC info:
+ * I/O interface:
+ - I2C chip address: 0x40
+ - first register address: 0x0
+ - register count: 0x10
+ * Adjustable outputs:
+ - 2x LDO
+ - 2x BUCK
+ - Each, with a different operating conditions (header).
+ * Reset values:
+ - set by i2c emul driver's probe() (defaults in header)
+
+ A detailed information can be found in header: '<power/sandbox_pmic.h>'
+ Binding info: 'doc/device-tree-bindings/pmic/max77686.txt'
config REGULATOR_TPS65090
bool "Enable driver for TPS65090 PMIC regulators"
depends on PMIC_TPS65090
- ---help---
- The TPS65090 provides several FETs (Field-effect Transistors,
- effectively switches) which are supported by this driver as
- regulators, one for each FET. The standard regulator interface is
- supported, but it is only possible to turn the regulators on or off.
- There is no voltage/current control.
+ help
+ The TPS65090 provides several FETs (Field-effect Transistors,
+ effectively switches) which are supported by this driver as
+ regulators, one for each FET. The standard regulator interface is
+ supported, but it is only possible to turn the regulators on or off.
+ There is no voltage/current control.
config DM_REGULATOR_PALMAS
bool "Enable driver for PALMAS PMIC regulators"
- depends on PMIC_PALMAS
- ---help---
- This enables implementation of driver-model regulator uclass
- features for REGULATOR PALMAS and the family of PALMAS PMICs.
- The driver implements get/set api for: value and enable.
+ depends on PMIC_PALMAS
+ help
+ This enables implementation of driver-model regulator uclass
+ features for REGULATOR PALMAS and the family of PALMAS PMICs.
+ The driver implements get/set api for: value and enable.
config DM_REGULATOR_PBIAS
bool "Enable driver for PBIAS regulator"
depends on DM_REGULATOR
select REGMAP
select SYSCON
- ---help---
- This enables implementation of driver-model regulator uclass
- features for pseudo-regulator PBIAS found in the OMAP SOCs.
- This pseudo-regulator is used to provide a BIAS voltage to MMC1
- signal pads and must be configured properly during a voltage switch.
- Voltage switching is required by some operating modes of SDcards and
- eMMC.
+ help
+ This enables implementation of driver-model regulator uclass
+ features for pseudo-regulator PBIAS found in the OMAP SOCs.
+ This pseudo-regulator is used to provide a BIAS voltage to MMC1
+ signal pads and must be configured properly during a voltage switch.
+ Voltage switching is required by some operating modes of SDcards and
+ eMC.
config DM_REGULATOR_LP873X
bool "Enable driver for LP873X PMIC regulators"
depends on PMIC_LP873X
- ---help---
- This enables implementation of driver-model regulator uclass
- features for REGULATOR LP873X and the family of LP873X PMICs.
- The driver implements get/set api for: value and enable.
+ help
+ This enables implementation of driver-model regulator uclass
+ features for REGULATOR LP873X and the family of LP873X PMICs.
+ The driver implements get/set api for: value and enable.
config DM_REGULATOR_LP87565
bool "Enable driver for LP87565 PMIC regulators"
depends on PMIC_LP87565
- ---help---
- This enables implementation of driver-model regulator uclass
- features for REGULATOR LP87565 and the family of LP87565 PMICs.
- LP87565 series of PMICs have 4 single phase BUCKs that can also
- be configured in multi phase modes. The driver implements
- get/set api for value and enable.
+ help
+ This enables implementation of driver-model regulator uclass
+ features for REGULATOR LP87565 and the family of LP87565 PMICs.
+ LP87565 series of PMICs have 4 single phase BUCKs that can also
+ be configured in multi phase modes. The driver implements
+ get/set api for value and enable.
config DM_REGULATOR_STM32_VREFBUF
bool "Enable driver for STMicroelectronics STM32 VREFBUF"
@@ -383,21 +383,21 @@ config DM_REGULATOR_STM32_VREFBUF
config DM_REGULATOR_TPS65910
bool "Enable driver for TPS65910 PMIC regulators"
depends on DM_PMIC_TPS65910
- ---help---
- The TPS65910 PMIC provides 4 SMPSs and 8 LDOs. This driver supports all
- regulator types of the TPS65910 (BUCK, BOOST and LDO). It implements
- the get/set api for value and enable.
+ help
+ The TPS65910 PMIC provides 4 SMPSs and 8 LDOs. This driver supports all
+ regulator types of the TPS65910 (BUCK, BOOST and LDO). It implements
+ the get/set api for value and enable.
config DM_REGULATOR_TPS65911
bool "Enable driver for TPS65911 PMIC regulators"
depends on DM_PMIC_TPS65910
- ---help---
- This config enables implementation of driver-model regulator
- uclass features for the TPS65911 PMIC. The driver supports Step-Down
- DC-DC Converters for Processor Cores (VDD1 and VDD2), Step-Down DC-DC
- Converter for I/O Power (VIO), Controller for External FETs (VDDCtrl)
- and LDO Voltage Regulators found in TPS65911 PMIC and implements
- get/set api for value and enable.
+ help
+ This config enables implementation of driver-model regulator
+ uclass features for the TPS65911 PMIC. The driver supports Step-Down
+ DC-DC Converters for Processor Cores (VDD1 and VDD2), Step-Down DC-DC
+ Converter for I/O Power (VIO), Controller for External FETs (VDDCtrl)
+ and LDO Voltage Regulators found in TPS65911 PMIC and implements
+ get/set api for value and enable.
config DM_REGULATOR_TPS62360
bool "Enable driver for TPS6236x Power Regulator"
@@ -412,10 +412,10 @@ config DM_REGULATOR_TPS62360
config DM_REGULATOR_TPS80031
bool "Enable driver for TPS80031/TPS80032 PMIC regulators"
depends on DM_PMIC_TPS80031
- ---help---
- This enables implementation of driver-model regulator uclass
- features for TPS80031/TPS80032 PMICs. The driver implements
- get/set api for: value and enable.
+ help
+ This enables implementation of driver-model regulator uclass
+ features for TPS80031/TPS80032 PMICs. The driver implements
+ get/set api for: value and enable.
config DM_REGULATOR_TPS6287X
bool "Enable driver for TPS6287x Power Regulator"
@@ -429,11 +429,11 @@ config DM_REGULATOR_TPS6287X
config DM_REGULATOR_STPMIC1
bool "Enable driver for STPMIC1 regulators"
depends on DM_REGULATOR && PMIC_STPMIC1
- ---help---
- Enable support for the regulator functions of the STPMIC1 PMIC. The
- driver implements get/set api for the various BUCKS and LDOs supported
- by the PMIC device. This driver is controlled by a device tree node
- which includes voltage limits.
+ help
+ Enable support for the regulator functions of the STPMIC1 PMIC. The
+ driver implements get/set api for the various BUCKS and LDOs supported
+ by the PMIC device. This driver is controlled by a device tree node
+ which includes voltage limits.
config DM_REGULATOR_ANATOP
bool "Enable driver for ANATOP regulators"
@@ -524,11 +524,11 @@ config REGULATOR_RZG2L_USBPHY
config DM_REGULATOR_CPCAP
bool "Enable driver for CPCAP PMIC regulators"
depends on DM_REGULATOR && DM_PMIC_CPCAP
- ---help---
- Enable implementation of driver-model regulator uclass features for
- REGULATOR CPCAP. The driver supports both DC-to-DC Step-Down Switching
- (SW) Regulators and Low-Dropout Linear (LDO) Regulators found in CPCAP
- PMIC and implements get/set api for voltage and state.
+ help
+ Enable implementation of driver-model regulator uclass features for
+ REGULATOR CPCAP. The driver supports both DC-to-DC Step-Down Switching
+ (SW) Regulators and Low-Dropout Linear (LDO) Regulators found in
+ CPCAP PMIC and implements get/set api for voltage and state.
config DM_REGULATOR_MT6357
bool "Enable driver for MediaTek MT6357 PMIC regulators"
diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
index ab4878ebae4..44305680357 100644
--- a/drivers/spmi/Kconfig
+++ b/drivers/spmi/Kconfig
@@ -3,7 +3,7 @@ menu "SPMI support"
config SPMI
bool "Enable SPMI bus support"
depends on DM
- ---help---
+ help
Select this to enable to support SPMI bus.
SPMI (System Power Management Interface) bus is used
to connect PMIC devices on various SoCs.
@@ -11,13 +11,13 @@ config SPMI
config SPMI_MSM
bool "Support Qualcomm SPMI bus"
depends on SPMI
- ---help---
+ help
Support SPMI bus implementation found on Qualcomm Snapdragon SoCs.
config SPMI_SANDBOX
bool "Support for Sandbox SPMI bus"
depends on SPMI
- ---help---
+ help
Demo SPMI bus implementation. Emulates part of PM8916 as single
slave (0) on bus. It has 4 GPIO peripherals, pid 0xC0-0xC3.
endmenu
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 93c5ee69b25..396a753fa06 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -1,7 +1,7 @@
menuconfig USB
bool "USB support"
select BLK
- ---help---
+ help
Universal Serial Bus (USB) is a specification for a serial bus
subsystem which offers higher speeds and more features than the
traditional PC serial port. The bus supplies power to peripherals
@@ -94,7 +94,7 @@ comment "USB peripherals"
config USB_STORAGE
bool "USB Mass Storage support"
- ---help---
+ help
Say Y here if you want to connect USB mass storage devices to your
board's USB port.
@@ -103,7 +103,7 @@ config USB_KEYBOARD
depends on DM_USB
select DM_KEYBOARD
select SYS_STDIO_DEREGISTER
- ---help---
+ help
Say Y here if you want to use a USB keyboard for U-Boot command line
input.
@@ -111,7 +111,7 @@ config USB_ONBOARD_HUB
bool "Onboard USB hub support"
depends on DM_USB
select DEVRES
- ---help---
+ help
Say Y here if you want to support discrete onboard USB hubs that
don't require an additional control bus for initialization, but
need some non-trivial form of initialization, such as enabling a
@@ -163,7 +163,7 @@ choice
prompt "USB keyboard polling"
default SYS_USB_EVENT_POLL_VIA_INT_QUEUE if ARCH_SUNXI
default SYS_USB_EVENT_POLL
- ---help---
+ help
Enable a polling mechanism for USB keyboard.
config SYS_USB_EVENT_POLL
diff --git a/drivers/usb/eth/Kconfig b/drivers/usb/eth/Kconfig
index 2f6bfa8e71b..b9b77f46743 100644
--- a/drivers/usb/eth/Kconfig
+++ b/drivers/usb/eth/Kconfig
@@ -1,6 +1,6 @@
menuconfig USB_HOST_ETHER
bool "USB to Ethernet Controller Drivers"
- ---help---
+ help
Say Y here if you would like to enable support for USB Ethernet
adapters.
@@ -9,14 +9,14 @@ if USB_HOST_ETHER
config USB_ETHER_ASIX
bool "ASIX AX8817X (USB 2.0) support"
depends on USB_HOST_ETHER
- ---help---
+ help
Say Y here if you would like to support ASIX AX8817X based USB 2.0
Ethernet Devices.
config USB_ETHER_ASIX88179
bool "ASIX AX88179 (USB 3.0) support"
depends on USB_HOST_ETHER
- ---help---
+ help
Say Y here if you would like to support ASIX AX88179 based USB 3.0
Ethernet Devices.
@@ -24,7 +24,7 @@ config USB_ETHER_LAN75XX
bool "Microchip LAN75XX support"
depends on USB_HOST_ETHER
depends on PHYLIB
- ---help---
+ help
Say Y here if you would like to support Microchip LAN75XX Hi-Speed
USB 2.0 to 10/100/1000 Gigabit Ethernet controller.
Supports 10Base-T/ 100Base-TX/1000Base-T.
@@ -34,7 +34,7 @@ config USB_ETHER_LAN78XX
bool "Microchip LAN78XX support"
depends on USB_HOST_ETHER
depends on PHYLIB
- ---help---
+ help
Say Y here if you would like to support Microchip LAN78XX USB 3.1
Gen 1 to 10/100/1000 Gigabit Ethernet controller.
Supports 10Base-T/ 100Base-TX/1000Base-T.
@@ -43,14 +43,14 @@ config USB_ETHER_LAN78XX
config USB_ETHER_MCS7830
bool "MOSCHIP MCS7830 (7730/7830/7832) suppport"
depends on USB_HOST_ETHER
- ---help---
+ help
Say Y here if you would like to support MOSCHIP MCS7830 based
(7730/7830/7832) USB 2.0 Ethernet Devices.
config USB_ETHER_RTL8152
bool "Realtek RTL8152B/RTL8153 support"
depends on USB_HOST_ETHER
- ---help---
+ help
Say Y here if you would like to support Realtek RTL8152B/RTL8153 base
USB Ethernet Devices. This driver also supports compatible devices
from Samsung, Lenovo, TP-LINK and Nvidia.
@@ -58,7 +58,7 @@ config USB_ETHER_RTL8152
config USB_ETHER_SMSC95XX
bool "SMSC LAN95x support"
depends on USB_HOST_ETHER
- ---help---
+ help
Say Y here if you would like to support SMSC LAN95xx based USB 2.0
Ethernet Devices.
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index d75883e2865..6bbed9cb513 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -24,7 +24,7 @@ config USB_XHCI_HCD
bool "xHCI HCD (USB 3.0) support"
depends on DM && OF_CONTROL
select USB_HOST
- ---help---
+ help
The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
"SuperSpeed" host controller hardware.
@@ -149,7 +149,7 @@ config USB_EHCI_HCD
select USB_HOST
select EHCI_DESC_BIG_ENDIAN if SYS_BIG_ENDIAN
select EHCI_MMIO_BIG_ENDIAN if SYS_BIG_ENDIAN
- ---help---
+ help
The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0
"high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware.
If your USB host controller supports USB 2.0, you will likely want to
@@ -174,14 +174,14 @@ config USB_EHCI_ATMEL
bool "Support for Atmel on-chip EHCI USB controller"
depends on ARCH_AT91
default y
- ---help---
+ help
Enables support for the on-chip EHCI controller on Atmel chips.
config USB_EHCI_EXYNOS
bool "Support for Samsung Exynos EHCI USB controller"
depends on ARCH_EXYNOS
default y
- ---help---
+ help
Enables support for the on-chip EHCI controller on Samsung Exynos
SoCs.
@@ -191,7 +191,7 @@ config USB_EHCI_MARVELL
default y
select USB_EHCI_IS_TDI if !ARM64
select USB_EHCI_IS_TDI if ALLEYCAT_5
- ---help---
+ help
Enables support for the on-chip EHCI controller on MVEBU SoCs.
config USB_EHCI_MX5
@@ -205,7 +205,7 @@ config USB_EHCI_MX6
depends on ARCH_MX6 || ARCH_MX7ULP || ARCH_IMXRT
select EHCI_HCD_INIT_AFTER_RESET
default y
- ---help---
+ help
Enables support for the on-chip EHCI controller on i.MX6 SoCs.
config USB_EHCI_MX7
@@ -215,7 +215,7 @@ config USB_EHCI_MX7
select PHY if IMX8M || IMX9
select NOP_PHY if IMX8M || IMX9
default y
- ---help---
+ help
Enables support for the on-chip EHCI controller on i.MX7/i.MX8M/i.MX9 SoCs.
config USB_EHCI_MXS
@@ -230,7 +230,7 @@ config USB_EHCI_MXS
config USB_EHCI_NPCM
bool "Support for Nuvoton NPCM on-chip EHCI USB controller"
depends on ARCH_NPCM
- ---help---
+ help
Enables support for the on-chip EHCI controller on
Nuvoton NPCM chips.
@@ -240,7 +240,7 @@ config USB_EHCI_OMAP
select PHY
imply NOP_PHY
default y
- ---help---
+ help
Enables support for the on-chip EHCI controller on OMAP3 and later
SoCs.
@@ -255,7 +255,7 @@ if USB_EHCI_MX6 || USB_EHCI_MX7
config MXC_USB_OTG_HACTIVE
bool "USB Power pin high active"
- ---help---
+ help
Set the USB Power pin polarity to be high active (PWR_POL)
endif
@@ -265,7 +265,7 @@ config USB_EHCI_MSM
depends on DM_USB
select USB_ULPI
select MSM8916_USB_PHY
- ---help---
+ help
Enables support for the on-chip EHCI controller on Qualcomm
Snapdragon SoCs.
@@ -280,7 +280,7 @@ config USB_EHCI_TEGRA
bool "Support for NVIDIA Tegra on-chip EHCI USB controller"
depends on ARCH_TEGRA
select USB_EHCI_IS_TDI
- ---help---
+ help
Enable support for Tegra on-chip EHCI USB controller. If you enable
ULPI and your PHY needs a different reference clock than the standard
24 MHz then you have to define CFG_ULPI_REF_CLK to the appropriate
@@ -291,14 +291,14 @@ config USB_EHCI_ZYNQ
depends on ARCH_ZYNQ
default y
select USB_EHCI_IS_TDI
- ---help---
+ help
Enable support for Zynq on-chip EHCI USB controller
config USB_EHCI_GENERIC
bool "Support for generic EHCI USB controller"
depends on DM_USB
default ARCH_SUNXI
- ---help---
+ help
Enables support for generic EHCI controller.
config EHCI_HCD_INIT_AFTER_RESET
@@ -310,7 +310,7 @@ config USB_EHCI_FSL
select EHCI_HCD_INIT_AFTER_RESET
select SYS_FSL_USB_INTERNAL_UTMI_PHY if MPC85xx && \
!(ARCH_B4860 || ARCH_B4420 || ARCH_P4080 || ARCH_P1020 || ARCH_P2020)
- ---help---
+ help
Enables support for the on-chip EHCI controller on FSL chips.
config SYS_FSL_USB_INTERNAL_UTMI_PHY
@@ -340,7 +340,7 @@ config USB_OHCI_HCD
depends on DM && OF_CONTROL
select USB_HOST
select USB_OHCI_NEW
- ---help---
+ help
The Open Host Controller Interface (OHCI) is a standard for accessing
USB 1.1 host controller hardware. It does more in hardware than Intel's
UHCI specification. If your USB host controller follows the OHCI spec,
@@ -361,7 +361,7 @@ config USB_OHCI_PCI
config USB_OHCI_GENERIC
bool "Support for generic OHCI USB controller"
default ARCH_SUNXI
- ---help---
+ help
Enables support for generic OHCI controller.
config USB_OHCI_DA8XX
@@ -374,7 +374,7 @@ config USB_OHCI_DA8XX
config USB_OHCI_NPCM
bool "Support for Nuvoton NPCM on-chip OHCI USB controller"
depends on ARCH_NPCM
- ---help---
+ help
Enables support for the on-chip OHCI controller on
Nuvoton NPCM chips.
@@ -391,7 +391,7 @@ config SYS_OHCI_SWAP_REG_ACCESS
config USB_UHCI_HCD
bool "UHCI HCD (most Intel and VIA) support"
select USB_HOST
- ---help---
+ help
The Universal Host Controller Interface is a standard by Intel for
accessing the USB hardware in the PC (which is also called the USB
host controller). If your USB host controller conforms to this
@@ -410,7 +410,7 @@ config USB_DWC2
bool "DesignWare USB2 Core support"
depends on DM && OF_CONTROL
select USB_HOST
- ---help---
+ help
The DesignWare USB 2.0 controller is compliant with the
USB-Implementers Forum (USB-IF) USB 2.0 specifications.
Hi-Speed (480 Mbps), Full-Speed (12 Mbps), and Low-Speed (1.5 Mbps)
@@ -421,7 +421,7 @@ if USB_DWC2
config USB_DWC2_BUFFER_SIZE
int "Data buffer size in kB"
default 64
- ---help---
+ help
By default 64 kB buffer is used but if amount of RAM avaialble on
the target is not enough to accommodate allocation of buffer of
that size it is possible to shrink it. Smaller sizes should be fine
@@ -433,7 +433,7 @@ config USB_R8A66597_HCD
bool "Renesas R8A66597 USB Core support"
depends on DM && OF_CONTROL
select USB_HOST
- ---help---
+ help
This enables support for the on-chip Renesas R8A66597 USB 2.0
controller, present in various RZ and SH SoCs.
diff --git a/drivers/usb/musb-new/Kconfig b/drivers/usb/musb-new/Kconfig
index f8daaddc657..60c8c3ebdba 100644
--- a/drivers/usb/musb-new/Kconfig
+++ b/drivers/usb/musb-new/Kconfig
@@ -81,9 +81,9 @@ config USB_MUSB_SUNXI
depends on PHY_SUN4I_USB
select USB_MUSB_PIO_ONLY
default y
- ---help---
- Say y here to enable support for the sunxi OTG / DRC USB controller
- used on almost all sunxi boards.
+ help
+ Say y here to enable support for the sunxi OTG / DRC USB controller
+ used on almost all sunxi boards.
config USB_MUSB_UX500
bool "Enable ST-Ericsson Ux500 USB controller"
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 08c9b020788..ffbe5ebcfac 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -508,10 +508,11 @@ config FRAMEBUFFER_VESA_MODE
config VIDEO_LCD_ANX9804
bool "ANX9804 bridge chip"
- ---help---
- Support for the ANX9804 bridge chip, which can take pixel data coming
- from a parallel LCD interface and translate it on the fy into a DP
- interface for driving eDP TFT displays. It uses I2C for configuration.
+ help
+ Support for the ANX9804 bridge chip, which can take pixel data
+ coming from a parallel LCD interface and translate it on the fy into
+ a DP interface for driving eDP TFT displays. It uses I2C for
+ configuration.
config ATMEL_LCD
bool "Atmel LCD panel support"
@@ -646,31 +647,32 @@ config VIDEO_LCD_SHARP_LQ101R1SX01
config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
- ---help---
- Support for the SSD2828 bridge chip, which can take pixel data coming
- from a parallel LCD interface and translate it on the fly into MIPI DSI
- interface for driving a MIPI compatible LCD panel. It uses SPI for
- configuration.
+ help
+ Support for the SSD2828 bridge chip, which can take pixel data
+ coming from a parallel LCD interface and translate it on the fly
+ into MIPI DSI interface for driving a MIPI compatible LCD panel. It
+ uses SPI for configuration.
config VIDEO_LCD_SSD2828_TX_CLK
int "SSD2828 TX_CLK frequency (in MHz)"
depends on VIDEO_LCD_SSD2828
default 0
- ---help---
- The frequency of the crystal, which is clocking SSD2828. It may be
- anything in the 8MHz-30MHz range and the exact value should be
- retrieved from the board schematics. Or in the case of Allwinner
- hardware, it can be usually found as 'lcd_xtal_freq' variable in
- FEX files. It can be also set to 0 for selecting PCLK from the
- parallel LCD interface instead of TX_CLK as the PLL clock source.
+ help
+ The frequency of the crystal, which is clocking SSD2828. It may be
+ anything in the 8MHz-30MHz range and the exact value should be
+ retrieved from the board schematics. Or in the case of Allwinner
+ hardware, it can be usually found as 'lcd_xtal_freq' variable in FEX
+ files. It can be also set to 0 for selecting PCLK from the parallel
+ LCD interface instead of TX_CLK as the PLL clock source.
config VIDEO_LCD_SSD2828_RESET
string "RESET pin of SSD2828"
depends on VIDEO_LCD_SSD2828
default ""
- ---help---
- The reset pin of SSD2828 chip. This takes a string in the format
- understood by 'sunxi_name_to_gpio' function, e.g. PH1 for pin 1 of port H.
+ help
+ The reset pin of SSD2828 chip. This takes a string in the format
+ understood by 'sunxi_name_to_gpio' function, e.g. PH1 for pin 1 of
+ port H.
config VIDEO_LCD_TDO_TL070WSH30
bool "TDO TL070WSH30 DSI LCD panel support"
@@ -689,10 +691,10 @@ config VIDEO_LCD_HITACHI_TX10D07VM0BAA
config VIDEO_LCD_HITACHI_TX18D42VM
bool "Hitachi tx18d42vm LVDS LCD panel support"
- ---help---
- Support for Hitachi tx18d42vm LVDS LCD panels, these panels have a
- lcd controller which needs to be initialized over SPI, once that is
- done they work like a regular LVDS panel.
+ help
+ Support for Hitachi tx18d42vm LVDS LCD panels, these panels have a
+ lcd controller which needs to be initialized over SPI, once that is
+ done they work like a regular LVDS panel.
config VIDEO_LCD_SONY_L4F00430T01
tristate "Sony L4F00430T01 480x800 LCD panel support"
@@ -715,44 +717,48 @@ config VIDEO_LCD_SPI_CS
string "SPI CS pin for LCD related config job"
depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM
default ""
- ---help---
- This is one of the SPI communication pins, involved in setting up a
- working LCD configuration. The exact role of SPI may differ for
- different hardware setups. The option takes a string in the format
- understood by 'sunxi_name_to_gpio' function, e.g. PH1 for pin 1 of port H.
+ help
+ This is one of the SPI communication pins, involved in setting up a
+ working LCD configuration. The exact role of SPI may differ for
+ different hardware setups. The option takes a string in the format
+ understood by 'sunxi_name_to_gpio' function, e.g. PH1 for pin 1 of
+ port H.
config VIDEO_LCD_SPI_SCLK
string "SPI SCLK pin for LCD related config job"
depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM
default ""
- ---help---
- This is one of the SPI communication pins, involved in setting up a
- working LCD configuration. The exact role of SPI may differ for
- different hardware setups. The option takes a string in the format
- understood by 'sunxi_name_to_gpio' function, e.g. PH1 for pin 1 of port H.
+ help
+ This is one of the SPI communication pins, involved in setting up a
+ working LCD configuration. The exact role of SPI may differ for
+ different hardware setups. The option takes a string in the format
+ understood by 'sunxi_name_to_gpio' function, e.g. PH1 for pin 1 of
+ port H.
config VIDEO_LCD_SPI_MOSI
string "SPI MOSI pin for LCD related config job"
depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM
default ""
- ---help---
- This is one of the SPI communication pins, involved in setting up a
- working LCD configuration. The exact role of SPI may differ for
- different hardware setups. The option takes a string in the format
- understood by 'sunxi_name_to_gpio' function, e.g. PH1 for pin 1 of port H.
+ help
+ This is one of the SPI communication pins, involved in setting up a
+ working LCD configuration. The exact role of SPI may differ for
+ different hardware setups. The option takes a string in the format
+ understood by 'sunxi_name_to_gpio' function, e.g. PH1 for pin 1 of
+ port H.
config VIDEO_LCD_SPI_MISO
string "SPI MISO pin for LCD related config job (optional)"
depends on VIDEO_LCD_SSD2828
default ""
- ---help---
- This is one of the SPI communication pins, involved in setting up a
- working LCD configuration. The exact role of SPI may differ for
- different hardware setups. If wired up, this pin may provide additional
- useful functionality. Such as bi-directional communication with the
- hardware and LCD panel id retrieval (if the panel can report it). The
- option takes a string in the format understood by 'sunxi_name_to_gpio'
- function, e.g. PH1 for pin 1 of port H.
+ help
+ This is one of the SPI communication pins, involved in setting up a
+ working LCD configuration. The exact role of SPI may differ for
+ different hardware setups. If wired up, this pin may provide
+ additional useful functionality. Such as bi-directional
+ communication with the hardware and LCD panel id retrieval (if the
+ panel can report it). The option takes a string in the format
+ understood by 'sunxi_name_to_gpio' function, e.g. PH1 for pin 1 of
+ port H.
source "drivers/video/meson/Kconfig"
@@ -760,9 +766,9 @@ config VIDEO_MVEBU
bool "Armada XP LCD controller"
depends on ARCH_MVEBU
imply VIDEO_DAMAGE
- ---help---
- Support for the LCD controller integrated in the Marvell
- Armada XP SoC.
+ help
+ Support for the LCD controller integrated in the Marvell Armada XP
+ SoC.
config VIDEO_OMAP3
bool "Enable OMAP3+ DSS Support"
diff --git a/env/Kconfig b/env/Kconfig
index 2feff0b382e..467787bab51 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -975,7 +975,7 @@ config USE_BOOTFILE
config BOOTFILE
string "'bootfile' environment variable value"
- default kernel.itb if SPL_ATF && ARCH_SOCFPGA_SOC64
+ default "kernel.itb" if SPL_ATF && ARCH_SOCFPGA_SOC64
depends on USE_BOOTFILE
help
The value to set the "bootfile" variable to.