From 2924e0699963b839f88f8c4e855929ea49185870 Mon Sep 17 00:00:00 2001 From: Michal Kalderon Date: Mon, 27 Jan 2020 15:26:07 +0200 Subject: qed: FW 8.42.2.0 Internal ram offsets modifications IRO stands for internal RAM offsets. Updating the FW binary produces different iro offsets. This file contains the different values, and a new representation of the values. Update the FW version Signed-off-by: Ariel Elior Signed-off-by: Michal Kalderon Signed-off-by: David S. Miller --- include/linux/qed/common_hsi.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include/linux') diff --git a/include/linux/qed/common_hsi.h b/include/linux/qed/common_hsi.h index 03f59a28fefd..3f437e826a4c 100644 --- a/include/linux/qed/common_hsi.h +++ b/include/linux/qed/common_hsi.h @@ -109,8 +109,8 @@ #define MAX_NUM_LL2_TX_STATS_COUNTERS 48 #define FW_MAJOR_VERSION 8 -#define FW_MINOR_VERSION 37 -#define FW_REVISION_VERSION 7 +#define FW_MINOR_VERSION 42 +#define FW_REVISION_VERSION 2 #define FW_ENGINEERING_VERSION 0 /***********************/ -- cgit v1.2.3 From 997af5df230e3288ec1f5b332955f9be643e450b Mon Sep 17 00:00:00 2001 From: Michal Kalderon Date: Mon, 27 Jan 2020 15:26:12 +0200 Subject: qed: FW 8.42.2.0 Additional ll2 type LL2 queues were a limited resource due to FW constraints. This FW introduced a new resource which is a context based ll2 queue (memory on host). The additional ll2 queues are required for RDMA SRIOV. The code refers to the previous ll2 queues as ram-based or legacy, and the new queues as ctx-based. This change decreased the "legacy" ram-based queues therefore the first ll2 queue used for iWARP was converted to the ctx-based ll2 queue. This feature also exposed a bug in the DIRECT_REG_WR64 macro implementation which didn't have an effect in other use cases. Signed-off-by: Ariel Elior Signed-off-by: Michal Kalderon Signed-off-by: David S. Miller --- include/linux/qed/common_hsi.h | 15 +++++++++++++-- include/linux/qed/qed_if.h | 4 +++- include/linux/qed/qed_ll2_if.h | 7 +++++++ 3 files changed, 23 insertions(+), 3 deletions(-) (limited to 'include/linux') diff --git a/include/linux/qed/common_hsi.h b/include/linux/qed/common_hsi.h index 3f437e826a4c..a2b7826b36f0 100644 --- a/include/linux/qed/common_hsi.h +++ b/include/linux/qed/common_hsi.h @@ -105,8 +105,15 @@ #define CORE_SPQE_PAGE_SIZE_BYTES 4096 -#define MAX_NUM_LL2_RX_QUEUES 48 -#define MAX_NUM_LL2_TX_STATS_COUNTERS 48 +/* Number of LL2 RAM based queues */ +#define MAX_NUM_LL2_RX_RAM_QUEUES 32 + +/* Number of LL2 context based queues */ +#define MAX_NUM_LL2_RX_CTX_QUEUES 208 +#define MAX_NUM_LL2_RX_QUEUES \ + (MAX_NUM_LL2_RX_RAM_QUEUES + MAX_NUM_LL2_RX_CTX_QUEUES) + +#define MAX_NUM_LL2_TX_STATS_COUNTERS 48 #define FW_MAJOR_VERSION 8 #define FW_MINOR_VERSION 42 @@ -340,6 +347,10 @@ #define DQ_PWM_OFFSET_TCM_ROCE_RQ_PROD (DQ_PWM_OFFSET_TCM16_BASE + 1) #define DQ_PWM_OFFSET_TCM_IWARP_RQ_PROD (DQ_PWM_OFFSET_TCM16_BASE + 3) +/* DQ_DEMS_AGG_VAL_BASE */ +#define DQ_PWM_OFFSET_TCM_LL2_PROD_UPDATE \ + (DQ_PWM_OFFSET_TCM32_BASE + DQ_TCM_AGG_VAL_SEL_REG9 - 4) + #define DQ_REGION_SHIFT (12) /* DPM */ diff --git a/include/linux/qed/qed_if.h b/include/linux/qed/qed_if.h index b5db1ee96d78..9bcb2f419004 100644 --- a/include/linux/qed/qed_if.h +++ b/include/linux/qed/qed_if.h @@ -463,7 +463,7 @@ enum qed_db_rec_space { #define DIRECT_REG_RD(reg_addr) readl((void __iomem *)(reg_addr)) -#define DIRECT_REG_WR64(reg_addr, val) writeq((u32)val, \ +#define DIRECT_REG_WR64(reg_addr, val) writeq((u64)val, \ (void __iomem *)(reg_addr)) #define QED_COALESCE_MAX 0x1FF @@ -1177,6 +1177,8 @@ struct qed_common_ops { #define GET_FIELD(value, name) \ (((value) >> (name ## _SHIFT)) & name ## _MASK) +#define DB_ADDR_SHIFT(addr) ((addr) << DB_PWM_ADDR_OFFSET_SHIFT) + /* Debug print definitions */ #define DP_ERR(cdev, fmt, ...) \ do { \ diff --git a/include/linux/qed/qed_ll2_if.h b/include/linux/qed/qed_ll2_if.h index 5eb022953aca..1313c34d9a68 100644 --- a/include/linux/qed/qed_ll2_if.h +++ b/include/linux/qed/qed_ll2_if.h @@ -52,6 +52,12 @@ enum qed_ll2_conn_type { QED_LL2_TYPE_ROCE, QED_LL2_TYPE_IWARP, QED_LL2_TYPE_RESERVED3, + MAX_QED_LL2_CONN_TYPE +}; + +enum qed_ll2_rx_conn_type { + QED_LL2_RX_TYPE_LEGACY, + QED_LL2_RX_TYPE_CTX, MAX_QED_LL2_RX_CONN_TYPE }; @@ -165,6 +171,7 @@ struct qed_ll2_cbs { }; struct qed_ll2_acquire_data_inputs { + enum qed_ll2_rx_conn_type rx_conn_type; enum qed_ll2_conn_type conn_type; u16 mtu; u16 rx_num_desc; -- cgit v1.2.3 From 1392d19ff1d6ddd370cefa73b552a0262f9c35ea Mon Sep 17 00:00:00 2001 From: Michal Kalderon Date: Mon, 27 Jan 2020 15:26:13 +0200 Subject: qed: Add abstraction for different hsi values per chip The number of BTB blocks was modified to be different between the two chip flavors supported (BB/K2) as a result, this lead to a re-write of selecting the default hsi value based on the chip. This patch creates a lookup table for hsi values per chip rather than ask again and again for every value. Signed-off-by: Ariel Elior Signed-off-by: Michal Kalderon Signed-off-by: David S. Miller --- include/linux/qed/common_hsi.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include/linux') diff --git a/include/linux/qed/common_hsi.h b/include/linux/qed/common_hsi.h index a2b7826b36f0..718ce72e5965 100644 --- a/include/linux/qed/common_hsi.h +++ b/include/linux/qed/common_hsi.h @@ -663,8 +663,8 @@ #define PBF_MAX_CMD_LINES 3328 /* Number of BTB blocks. Each block is 256B. */ -#define BTB_MAX_BLOCKS 1440 - +#define BTB_MAX_BLOCKS_BB 1440 +#define BTB_MAX_BLOCKS_K2 1840 /*****************/ /* PRS CONSTANTS */ /*****************/ -- cgit v1.2.3 From 6459d93619b5bc21f775e7eb12bc4d051743d7aa Mon Sep 17 00:00:00 2001 From: Michal Kalderon Date: Mon, 27 Jan 2020 15:26:14 +0200 Subject: qed: FW 8.42.2.0 iscsi/fcoe changes - Remove struct iscsi_slow_path_hdr and field fw_cid from several structs - Remove struct iscsi_spe_func_dstry - Remove fields pbe_page_size_log and pbl_page_size_log from struct iscsi_conn_offload_param Signed-off-by: Manish Rangankar Signed-off-by: Saurav Kashyap Signed-off-by: Ariel Elior Signed-off-by: Michal Kalderon Signed-off-by: David S. Miller --- include/linux/qed/iscsi_common.h | 64 ++++++++++++++------------------------ include/linux/qed/storage_common.h | 3 +- 2 files changed, 26 insertions(+), 41 deletions(-) (limited to 'include/linux') diff --git a/include/linux/qed/iscsi_common.h b/include/linux/qed/iscsi_common.h index 66aba505ec56..2f0a771a9176 100644 --- a/include/linux/qed/iscsi_common.h +++ b/include/linux/qed/iscsi_common.h @@ -999,7 +999,6 @@ struct iscsi_conn_offload_params { struct regpair r2tq_pbl_addr; struct regpair xhq_pbl_addr; struct regpair uhq_pbl_addr; - __le32 initial_ack; __le16 physical_q0; __le16 physical_q1; u8 flags; @@ -1011,10 +1010,10 @@ struct iscsi_conn_offload_params { #define ISCSI_CONN_OFFLOAD_PARAMS_RESTRICTED_MODE_SHIFT 2 #define ISCSI_CONN_OFFLOAD_PARAMS_RESERVED1_MASK 0x1F #define ISCSI_CONN_OFFLOAD_PARAMS_RESERVED1_SHIFT 3 - u8 pbl_page_size_log; - u8 pbe_page_size_log; u8 default_cq; + __le16 reserved0; __le32 stat_sn; + __le32 initial_ack; }; /* iSCSI connection statistics */ @@ -1029,25 +1028,14 @@ struct iscsi_conn_stats_params { __le32 reserved; }; -/* spe message header */ -struct iscsi_slow_path_hdr { - u8 op_code; - u8 flags; -#define ISCSI_SLOW_PATH_HDR_RESERVED0_MASK 0xF -#define ISCSI_SLOW_PATH_HDR_RESERVED0_SHIFT 0 -#define ISCSI_SLOW_PATH_HDR_LAYER_CODE_MASK 0x7 -#define ISCSI_SLOW_PATH_HDR_LAYER_CODE_SHIFT 4 -#define ISCSI_SLOW_PATH_HDR_RESERVED1_MASK 0x1 -#define ISCSI_SLOW_PATH_HDR_RESERVED1_SHIFT 7 -}; /* iSCSI connection update params passed by driver to FW in ISCSI update *ramrod. */ struct iscsi_conn_update_ramrod_params { - struct iscsi_slow_path_hdr hdr; + __le16 reserved0; __le16 conn_id; - __le32 fw_cid; + __le32 reserved1; u8 flags; #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_HD_EN_MASK 0x1 #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_HD_EN_SHIFT 0 @@ -1065,7 +1053,7 @@ struct iscsi_conn_update_ramrod_params { #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_DIF_ON_IMM_EN_SHIFT 6 #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_LUN_MAPPER_EN_MASK 0x1 #define ISCSI_CONN_UPDATE_RAMROD_PARAMS_LUN_MAPPER_EN_SHIFT 7 - u8 reserved0[3]; + u8 reserved3[3]; __le32 max_seq_size; __le32 max_send_pdu_length; __le32 max_recv_pdu_length; @@ -1251,22 +1239,22 @@ enum iscsi_ramrod_cmd_id { /* iSCSI connection termination request */ struct iscsi_spe_conn_mac_update { - struct iscsi_slow_path_hdr hdr; + __le16 reserved0; __le16 conn_id; - __le32 fw_cid; + __le32 reserved1; __le16 remote_mac_addr_lo; __le16 remote_mac_addr_mid; __le16 remote_mac_addr_hi; - u8 reserved0[2]; + u8 reserved2[2]; }; /* iSCSI and TCP connection (Option 1) offload params passed by driver to FW in * iSCSI offload ramrod. */ struct iscsi_spe_conn_offload { - struct iscsi_slow_path_hdr hdr; + __le16 reserved0; __le16 conn_id; - __le32 fw_cid; + __le32 reserved1; struct iscsi_conn_offload_params iscsi; struct tcp_offload_params tcp; }; @@ -1275,44 +1263,36 @@ struct iscsi_spe_conn_offload { * iSCSI offload ramrod. */ struct iscsi_spe_conn_offload_option2 { - struct iscsi_slow_path_hdr hdr; + __le16 reserved0; __le16 conn_id; - __le32 fw_cid; + __le32 reserved1; struct iscsi_conn_offload_params iscsi; struct tcp_offload_params_opt2 tcp; }; /* iSCSI collect connection statistics request */ struct iscsi_spe_conn_statistics { - struct iscsi_slow_path_hdr hdr; + __le16 reserved0; __le16 conn_id; - __le32 fw_cid; + __le32 reserved1; u8 reset_stats; - u8 reserved0[7]; + u8 reserved2[7]; struct regpair stats_cnts_addr; }; /* iSCSI connection termination request */ struct iscsi_spe_conn_termination { - struct iscsi_slow_path_hdr hdr; + __le16 reserved0; __le16 conn_id; - __le32 fw_cid; + __le32 reserved1; u8 abortive; - u8 reserved0[7]; + u8 reserved2[7]; struct regpair queue_cnts_addr; struct regpair query_params_addr; }; -/* iSCSI firmware function destroy parameters */ -struct iscsi_spe_func_dstry { - struct iscsi_slow_path_hdr hdr; - __le16 reserved0; - __le32 reserved1; -}; - /* iSCSI firmware function init parameters */ struct iscsi_spe_func_init { - struct iscsi_slow_path_hdr hdr; __le16 half_way_close_timeout; u8 num_sq_pages_in_ring; u8 num_r2tq_pages_in_ring; @@ -1324,8 +1304,12 @@ struct iscsi_spe_func_init { #define ISCSI_SPE_FUNC_INIT_RESERVED0_MASK 0x7F #define ISCSI_SPE_FUNC_INIT_RESERVED0_SHIFT 1 struct iscsi_debug_modes debug_mode; - __le16 reserved1; - __le32 reserved2; + u8 params; +#define ISCSI_SPE_FUNC_INIT_MAX_SYN_RT_MASK 0xF +#define ISCSI_SPE_FUNC_INIT_MAX_SYN_RT_SHIFT 0 +#define ISCSI_SPE_FUNC_INIT_RESERVED1_MASK 0xF +#define ISCSI_SPE_FUNC_INIT_RESERVED1_SHIFT 4 + u8 reserved2[7]; struct scsi_init_func_params func_params; struct scsi_init_func_queues q_params; }; diff --git a/include/linux/qed/storage_common.h b/include/linux/qed/storage_common.h index 505c0b48a761..9a973ffbbff5 100644 --- a/include/linux/qed/storage_common.h +++ b/include/linux/qed/storage_common.h @@ -107,8 +107,9 @@ struct scsi_drv_cmdq { struct scsi_init_func_params { __le16 num_tasks; u8 log_page_size; + u8 log_page_size_conn; u8 debug_mode; - u8 reserved2[12]; + u8 reserved2[11]; }; /* SCSI RQ/CQ/CMDQ firmware function init parameters */ -- cgit v1.2.3 From 0500a70d6e071040ffdaadebb966986afa83c5e9 Mon Sep 17 00:00:00 2001 From: Michal Kalderon Date: Mon, 27 Jan 2020 15:26:15 +0200 Subject: qed: FW 8.42.2.0 HSI changes This patch contains several HSI changes. The changes are part of features like RDMA VF and OVS, the patch also contains a fix to how the init code determines if the dmae is ready to be used. Signed-off-by: Ariel Elior Signed-off-by: Michal Kalderon Signed-off-by: David S. Miller --- include/linux/qed/common_hsi.h | 21 +++++++----- include/linux/qed/eth_common.h | 78 ++++++++++++++++++++++++++++++------------ 2 files changed, 68 insertions(+), 31 deletions(-) (limited to 'include/linux') diff --git a/include/linux/qed/common_hsi.h b/include/linux/qed/common_hsi.h index 718ce72e5965..2c4737e6694a 100644 --- a/include/linux/qed/common_hsi.h +++ b/include/linux/qed/common_hsi.h @@ -76,7 +76,6 @@ #define FW_ASSERT_GENERAL_ATTN_IDX 32 -#define MAX_PINNED_CCFC 32 /* Queue Zone sizes in bytes */ #define TSTORM_QZONE_SIZE 8 @@ -139,10 +138,10 @@ #define MAX_NUM_VFS (MAX_NUM_VFS_K2) #define MAX_NUM_FUNCTIONS_BB (MAX_NUM_PFS_BB + MAX_NUM_VFS_BB) -#define MAX_NUM_FUNCTIONS (MAX_NUM_PFS + MAX_NUM_VFS) #define MAX_FUNCTION_NUMBER_BB (MAX_NUM_PFS + MAX_NUM_VFS_BB) -#define MAX_FUNCTION_NUMBER (MAX_NUM_PFS + MAX_NUM_VFS) +#define MAX_FUNCTION_NUMBER_K2 (MAX_NUM_PFS + MAX_NUM_VFS_K2) +#define MAX_NUM_FUNCTIONS (MAX_FUNCTION_NUMBER_K2) #define MAX_NUM_VPORTS_K2 (208) #define MAX_NUM_VPORTS_BB (160) @@ -229,6 +228,7 @@ #define DQ_XCM_TOE_TX_BD_PROD_CMD DQ_XCM_AGG_VAL_SEL_WORD4 #define DQ_XCM_TOE_MORE_TO_SEND_SEQ_CMD DQ_XCM_AGG_VAL_SEL_REG3 #define DQ_XCM_TOE_LOCAL_ADV_WND_SEQ_CMD DQ_XCM_AGG_VAL_SEL_REG4 +#define DQ_XCM_ROCE_ACK_EDPM_DORQ_SEQ_CMD DQ_XCM_AGG_VAL_SEL_WORD5 /* UCM agg val selection (HW) */ #define DQ_UCM_AGG_VAL_SEL_WORD0 0 @@ -406,6 +406,7 @@ /* Number of Protocol Indices per Status Block */ #define PIS_PER_SB_E4 12 +#define MAX_PIS_PER_SB PIS_PER_SB #define CAU_HC_STOPPED_STATE 3 #define CAU_HC_DISABLE_STATE 4 @@ -436,8 +437,6 @@ #define IGU_MEM_PBA_MSIX_RESERVED_UPPER 0x03ff #define IGU_CMD_INT_ACK_BASE 0x0400 -#define IGU_CMD_INT_ACK_UPPER (IGU_CMD_INT_ACK_BASE + \ - MAX_TOT_SB_PER_PATH - 1) #define IGU_CMD_INT_ACK_RESERVED_UPPER 0x05ff #define IGU_CMD_ATTN_BIT_UPD_UPPER 0x05f0 @@ -450,8 +449,6 @@ #define IGU_REG_SISR_MDPC_WOMASK_UPPER 0x05f6 #define IGU_CMD_PROD_UPD_BASE 0x0600 -#define IGU_CMD_PROD_UPD_UPPER (IGU_CMD_PROD_UPD_BASE +\ - MAX_TOT_SB_PER_PATH - 1) #define IGU_CMD_PROD_UPD_RESERVED_UPPER 0x07ff /*****************/ @@ -741,6 +738,8 @@ enum protocol_type { PROTOCOLID_PREROCE, PROTOCOLID_COMMON, PROTOCOLID_RESERVED1, + PROTOCOLID_RDMA, + PROTOCOLID_SCSI, MAX_PROTOCOL_TYPE }; @@ -761,6 +760,10 @@ union rdma_eqe_data { struct rdma_eqe_destroy_qp rdma_destroy_qp_data; }; +struct tstorm_queue_zone { + __le32 reserved[2]; +}; + /* Ustorm Queue Zone */ struct ustorm_eth_queue_zone { struct coalescing_timeset int_coalescing_timeset; @@ -883,8 +886,8 @@ struct db_l2_dpm_data { #define DB_L2_DPM_DATA_RESERVED0_SHIFT 27 #define DB_L2_DPM_DATA_SGE_NUM_MASK 0x7 #define DB_L2_DPM_DATA_SGE_NUM_SHIFT 28 -#define DB_L2_DPM_DATA_GFS_SRC_EN_MASK 0x1 -#define DB_L2_DPM_DATA_GFS_SRC_EN_SHIFT 31 +#define DB_L2_DPM_DATA_TGFS_SRC_EN_MASK 0x1 +#define DB_L2_DPM_DATA_TGFS_SRC_EN_SHIFT 31 }; /* Structure for SGE in a DPM doorbell of type DPM_L2_BD */ diff --git a/include/linux/qed/eth_common.h b/include/linux/qed/eth_common.h index d9416ad5ef59..95f5fd615852 100644 --- a/include/linux/qed/eth_common.h +++ b/include/linux/qed/eth_common.h @@ -38,9 +38,11 @@ /********************/ #define ETH_HSI_VER_MAJOR 3 -#define ETH_HSI_VER_MINOR 10 +#define ETH_HSI_VER_MINOR 11 -#define ETH_HSI_VER_NO_PKT_LEN_TUNN 5 +#define ETH_HSI_VER_NO_PKT_LEN_TUNN 5 +/* Maximum number of pinned L2 connections (CIDs) */ +#define ETH_PINNED_CONN_MAX_NUM 32 #define ETH_CACHE_LINE_SIZE 64 #define ETH_RX_CQE_GAP 32 @@ -61,6 +63,7 @@ #define ETH_TX_MIN_BDS_PER_TUNN_IPV6_WITH_EXT_PKT 3 #define ETH_TX_MIN_BDS_PER_IPV6_WITH_EXT_PKT 2 #define ETH_TX_MIN_BDS_PER_PKT_W_LOOPBACK_MODE 2 +#define ETH_TX_MIN_BDS_PER_PKT_W_VPORT_FORWARDING 4 #define ETH_TX_MAX_NON_LSO_PKT_LEN (9700 - (4 + 4 + 12 + 8)) #define ETH_TX_MAX_LSO_HDR_BYTES 510 #define ETH_TX_LSO_WINDOW_BDS_NUM (18 - 1) @@ -75,9 +78,8 @@ #define ETH_NUM_STATISTIC_COUNTERS_QUAD_VF_ZONE \ (ETH_NUM_STATISTIC_COUNTERS - 3 * MAX_NUM_VFS / 4) -/* Maximum number of buffers, used for RX packet placement */ #define ETH_RX_MAX_BUFF_PER_PKT 5 -#define ETH_RX_BD_THRESHOLD 12 +#define ETH_RX_BD_THRESHOLD 16 /* Num of MAC/VLAN filters */ #define ETH_NUM_MAC_FILTERS 512 @@ -96,24 +98,24 @@ #define ETH_RSS_ENGINE_NUM_BB 127 /* TPA constants */ -#define ETH_TPA_MAX_AGGS_NUM 64 -#define ETH_TPA_CQE_START_LEN_LIST_SIZE ETH_RX_MAX_BUFF_PER_PKT -#define ETH_TPA_CQE_CONT_LEN_LIST_SIZE 6 -#define ETH_TPA_CQE_END_LEN_LIST_SIZE 4 +#define ETH_TPA_MAX_AGGS_NUM 64 +#define ETH_TPA_CQE_START_BW_LEN_LIST_SIZE 2 +#define ETH_TPA_CQE_CONT_LEN_LIST_SIZE 6 +#define ETH_TPA_CQE_END_LEN_LIST_SIZE 4 /* Control frame check constants */ -#define ETH_CTL_FRAME_ETH_TYPE_NUM 4 +#define ETH_CTL_FRAME_ETH_TYPE_NUM 4 /* GFS constants */ #define ETH_GFT_TRASHCAN_VPORT 0x1FF /* GFT drop flow vport number */ /* Destination port mode */ -enum dest_port_mode { - DEST_PORT_PHY, - DEST_PORT_LOOPBACK, - DEST_PORT_PHY_LOOPBACK, - DEST_PORT_DROP, - MAX_DEST_PORT_MODE +enum dst_port_mode { + DST_PORT_PHY, + DST_PORT_LOOPBACK, + DST_PORT_PHY_LOOPBACK, + DST_PORT_DROP, + MAX_DST_PORT_MODE }; /* Ethernet address type */ @@ -167,8 +169,8 @@ struct eth_tx_data_2nd_bd { #define ETH_TX_DATA_2ND_BD_TUNN_INNER_L2_HDR_SIZE_W_SHIFT 0 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_ETH_TYPE_MASK 0x3 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_ETH_TYPE_SHIFT 4 -#define ETH_TX_DATA_2ND_BD_DEST_PORT_MODE_MASK 0x3 -#define ETH_TX_DATA_2ND_BD_DEST_PORT_MODE_SHIFT 6 +#define ETH_TX_DATA_2ND_BD_DST_PORT_MODE_MASK 0x3 +#define ETH_TX_DATA_2ND_BD_DST_PORT_MODE_SHIFT 6 #define ETH_TX_DATA_2ND_BD_START_BD_MASK 0x1 #define ETH_TX_DATA_2ND_BD_START_BD_SHIFT 8 #define ETH_TX_DATA_2ND_BD_TUNN_TYPE_MASK 0x3 @@ -244,8 +246,9 @@ struct eth_fast_path_rx_reg_cqe { struct eth_tunnel_parsing_flags tunnel_pars_flags; u8 bd_num; u8 reserved; - __le16 flow_id; - u8 reserved1[11]; + __le16 reserved2; + __le32 flow_id_or_resource_id; + u8 reserved1[7]; struct eth_pmd_flow_flags pmd_flags; }; @@ -296,9 +299,10 @@ struct eth_fast_path_rx_tpa_start_cqe { struct eth_tunnel_parsing_flags tunnel_pars_flags; u8 tpa_agg_index; u8 header_len; - __le16 ext_bd_len_list[ETH_TPA_CQE_START_LEN_LIST_SIZE]; - __le16 flow_id; - u8 reserved; + __le16 bw_ext_bd_len_list[ETH_TPA_CQE_START_BW_LEN_LIST_SIZE]; + __le16 reserved2; + __le32 flow_id_or_resource_id; + u8 reserved[3]; struct eth_pmd_flow_flags pmd_flags; }; @@ -407,6 +411,29 @@ struct eth_tx_3rd_bd { struct eth_tx_data_3rd_bd data; }; +/* The parsing information data for the forth tx bd of a given packet. */ +struct eth_tx_data_4th_bd { + u8 dst_vport_id; + u8 reserved4; + __le16 bitfields; +#define ETH_TX_DATA_4TH_BD_DST_VPORT_ID_VALID_MASK 0x1 +#define ETH_TX_DATA_4TH_BD_DST_VPORT_ID_VALID_SHIFT 0 +#define ETH_TX_DATA_4TH_BD_RESERVED1_MASK 0x7F +#define ETH_TX_DATA_4TH_BD_RESERVED1_SHIFT 1 +#define ETH_TX_DATA_4TH_BD_START_BD_MASK 0x1 +#define ETH_TX_DATA_4TH_BD_START_BD_SHIFT 8 +#define ETH_TX_DATA_4TH_BD_RESERVED2_MASK 0x7F +#define ETH_TX_DATA_4TH_BD_RESERVED2_SHIFT 9 + __le16 reserved3; +}; + +/* The forth tx bd of a given packet */ +struct eth_tx_4th_bd { + struct regpair addr; /* Single continuous buffer */ + __le16 nbytes; /* Number of bytes in this BD */ + struct eth_tx_data_4th_bd data; /* Parsing information data */ +}; + /* Complementary information for the regular tx bd of a given packet */ struct eth_tx_data_bd { __le16 reserved0; @@ -431,6 +458,7 @@ union eth_tx_bd_types { struct eth_tx_1st_bd first_bd; struct eth_tx_2nd_bd second_bd; struct eth_tx_3rd_bd third_bd; + struct eth_tx_4th_bd fourth_bd; struct eth_tx_bd reg_bd; }; @@ -443,6 +471,12 @@ enum eth_tx_tunn_type { MAX_ETH_TX_TUNN_TYPE }; +/* Mstorm Queue Zone */ +struct mstorm_eth_queue_zone { + struct eth_rx_prod_data rx_producers; + __le32 reserved[3]; +}; + /* Ystorm Queue Zone */ struct xstorm_eth_queue_zone { struct coalescing_timeset int_coalescing_timeset; -- cgit v1.2.3 From 8a52bbab39c9791480cbae86c69ad0d47f62972e Mon Sep 17 00:00:00 2001 From: Michal Kalderon Date: Mon, 27 Jan 2020 15:26:17 +0200 Subject: qed: Debug feature: ilt and mdump Part of the FW drop includes new debug capabilities implemented in the qed_debug file. This patch dumps additional information during ethtool -d for better debugging. The data dumped is the ilt (internal logical table) and information gathered by the management firmware incase there was a crash and driver was not able to extract the information (mdump). Signed-off-by: Ariel Elior Signed-off-by: Michal Kalderon Signed-off-by: David S. Miller --- include/linux/qed/qed_if.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/linux') diff --git a/include/linux/qed/qed_if.h b/include/linux/qed/qed_if.h index 9bcb2f419004..1b27c22d39af 100644 --- a/include/linux/qed/qed_if.h +++ b/include/linux/qed/qed_if.h @@ -159,6 +159,7 @@ struct qed_dcbx_get { enum qed_nvm_images { QED_NVM_IMAGE_ISCSI_CFG, QED_NVM_IMAGE_FCOE_CFG, + QED_NVM_IMAGE_MDUMP, QED_NVM_IMAGE_NVM_CFG1, QED_NVM_IMAGE_DEFAULT_CFG, QED_NVM_IMAGE_NVM_META, -- cgit v1.2.3 From 2d22bc8354b15abe413dff76cfe0f7aeb88ef9aa Mon Sep 17 00:00:00 2001 From: Michal Kalderon Date: Mon, 27 Jan 2020 15:26:19 +0200 Subject: qed: FW 8.42.2.0 debug features Add to debug dump more information on the platform it was collected from (pci func, path id). Provide human readable reg fifo erros. Removed static debug arrays from HSI Functions, and move them to the hwfn. Some structures were slightly changed (removing reserved chip id for example) which lead to many long initializations being modified with one parameter less during initialization. This leads to some long diffs that don't really change anything. Signed-off-by: Ariel Elior Signed-off-by: Michal Kalderon Signed-off-by: David S. Miller --- include/linux/qed/qed_if.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include/linux') diff --git a/include/linux/qed/qed_if.h b/include/linux/qed/qed_if.h index 1b27c22d39af..8f29e0d8a7b3 100644 --- a/include/linux/qed/qed_if.h +++ b/include/linux/qed/qed_if.h @@ -1178,6 +1178,15 @@ struct qed_common_ops { #define GET_FIELD(value, name) \ (((value) >> (name ## _SHIFT)) & name ## _MASK) +#define GET_MFW_FIELD(name, field) \ + (((name) & (field ## _MASK)) >> (field ## _OFFSET)) + +#define SET_MFW_FIELD(name, field, value) \ + do { \ + (name) &= ~(field ## _MASK); \ + (name) |= (((value) << (field ## _OFFSET)) & (field ## _MASK));\ + } while (0) + #define DB_ADDR_SHIFT(addr) ((addr) << DB_PWM_ADDR_OFFSET_SHIFT) /* Debug print definitions */ -- cgit v1.2.3