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2025-06-09iio: adc: ad7768-1: Ensure SYNC_IN pulse minimum timing requirementJonathan Santos
The SYNC_IN pulse width must be at least 1.5 x Tmclk, corresponding to ~2.5 µs at the lowest supported MCLK frequency. Add a 3 µs delay to ensure reliable synchronization timing even for the worst-case scenario. Signed-off-by: Jonathan Santos <Jonathan.Santos@analog.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/d3ee92a533cd1207cf5c5cc4d7bdbb5c6c267f68.1749063024.git.Jonathan.Santos@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: bmi160: suspend and resume triggering on relevant pm operationsDenis Benato
Prevent triggers from stop working after the device has entered sleep: use iio_device_suspend_triggering and iio_device_resume_triggering helpers. Closes: https://lore.kernel.org/all/31d7f7aa-e834-4fd0-a66a-e0ff528425dc@gmail.com Signed-off-by: Denis Benato <benato.denis96@gmail.com> Link: https://patch.msgid.link/20250525142530.71955-3-benato.denis96@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: bmi270: suspend and resume triggering on relevant pm operationsDenis Benato
Prevent triggers from stop working after the device has entered sleep: use iio_device_suspend_triggering and iio_device_resume_triggering helpers. Closes: https://lore.kernel.org/all/31d7f7aa-e834-4fd0-a66a-e0ff528425dc@gmail.com Signed-off-by: Denis Benato <benato.denis96@gmail.com> Tested-by: Justin Weiss <justin@justinweiss.com> Link: https://patch.msgid.link/20250525142530.71955-2-benato.denis96@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: adc: ad7606: add enabling of optional Vrefin voltageAngelo Dureghello
Add optional refin voltage enabling. The property "refin-supply" is already available and optional in the current fdt dt_schema. Note that the driver does not need to take any actions if the supply is not present because a pin strap is used to change the behavior of the device if an external reference is connected. Signed-off-by: Angelo Dureghello <adureghello@baylibre.com> Link: https://patch.msgid.link/20250530-wip-bl-ad7606-reference-voltages-v2-2-d5e1ad7e6f14@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: adc: ad7606: enable Vdrive power supplyAngelo Dureghello
Enable Vdrive power supply. The "vdrive-supply" property is mandatory, already declared in fdt dt_schema. Signed-off-by: Angelo Dureghello <adureghello@baylibre.com> Link: https://patch.msgid.link/20250530-wip-bl-ad7606-reference-voltages-v2-1-d5e1ad7e6f14@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: adc: ad7476: Support ROHM BU79100GMatti Vaittinen
ROHM BU79100G is a 12-bit, single channel ADC. From the software point of view it is identical to the TI's ADS7866. Support reading ADC measurements using the ad7476.c Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Link: https://patch.msgid.link/aDk2qNE9LTVnfAFM@mva-rohm Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: Remove unused macro definition for driver and IRQ nameWaqar Hameed
These macro definitions are completely unused. Remove them. Signed-off-by: Waqar Hameed <waqar.hameed@axis.com> Link: https://patch.msgid.link/0dec4fe7b2bdc90d06163ac75a53b97d4ae31c21.1748356671.git.waqar.hameed@axis.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: Remove single use of macro definition for regmap nameWaqar Hameed
There is really no reason for having the `regmap` name as a macro definition if it is only used once directly in `struct regmap_config`. It is also more readable this way. Remove these macro definitions and instead use the string literal directly. Signed-off-by: Waqar Hameed <waqar.hameed@axis.com> Link: https://patch.msgid.link/3a8572de8316c7d2746c2ccea8c478f594221319.1748356671.git.waqar.hameed@axis.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: Remove single use of macro definition for IRQ nameWaqar Hameed
There is really no reason for having the IRQ name as a macro definition if it is only used once (often in functions requesting the IRQ). It is also more readable this way. Remove these macro definitions and instead use the string literal directly. Signed-off-by: Waqar Hameed <waqar.hameed@axis.com> Link: https://patch.msgid.link/3dc06cb2a83d292c50d9758643aad37ca5c6d95c.1748356671.git.waqar.hameed@axis.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: Remove single use of macro definition for driver nameWaqar Hameed
There is really no reason for having the driver name as a macro definition if it is only used once (often as `.name` in `struct device_driver`). It is also more readable this way. Remove these macro definitions and instead use the string literal directly. Signed-off-by: Waqar Hameed <waqar.hameed@axis.com> Link: https://patch.msgid.link/4840779a167e027b8be77c82f7a4f27210ef084a.1748356671.git.waqar.hameed@axis.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: imu: inv_mpu6050: refactor aux read/write to use shared xfer logicIsabella Caselli
Refactors inv_mpu_aux_read() and inv_mpu_aux_write() to extract the common I2C transfer sequence into inv_mpu_i2c_master_xfer(), which now handles starting and stopping the I2C master, waiting for completion, disabling SLV0, and checking for NACK errors. This refactoring removes code duplication and improves maintainability. No functional changes are intended. Signed-off-by: Isabella Caselli <bellacaselli20@gmail.com> Co-developed-by: Rodrigo Michelassi <rodrigo.michelassi@usp.br> Signed-off-by: Rodrigo Michelassi <rodrigo.michelassi@usp.br> Acked-by: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com> Link: https://patch.msgid.link/20250507184539.54658-1-bellacaselli20@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: buffer: Fix checkpatch.pl warningGyeyoung Baek
Remove the following trivial warning: "WARNING: Block comments should align the * on each line" Signed-off-by: Gyeyoung Baek <gye976@gmail.com> Link: https://patch.msgid.link/20250519-timestamp-v1-1-fcb4f6c2721c@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: amplifiers: ada4250: use DMA-safe memory for regmap_bulk_read()David Lechner
Use DMA-safe memory instead of stack-allocated memory for the call to regmap_bulk_read() in the ada4250_init() function as this could be used directly by a SPI controller. Also remove unnecessary use of get_unaligned_le16() and explicitly include linux/types.h e.g. for __le16 while we are fixing this up. Note this is DMA issue does not appear to be an actual bug due to internals of the regmap SPI implementation. However, for IIO we are following guidance that we should not make that assumption. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250418-iio-amplifiers-ada4250-simplify-data-buffer-in-init-v1-1-7e7bd6dad423@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: accel: adxl345: add g-range configurationLothar Rubusch
Introduce a mechanism to be able to configure and work with the available g-ranges keeping the precision of 13 digits. Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com> Link: https://patch.msgid.link/20250510224405.17910-3-l.rubusch@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: accel: adxl345: extend sample frequency adjustmentsLothar Rubusch
Introduce enums and functions to work with the sample frequency adjustments. Let the sample frequency adjust via IIO and configure a reasonable default. Replace the old static sample frequency handling. During adjustment of bw registers, measuring is disabled and afterwards enabled again. Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com> Link: https://patch.msgid.link/20250510224405.17910-2-l.rubusch@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: dac: adi-axi-dac: use unique bus free checkAngelo Dureghello
Use a unique function for the bus free check by polling, to reduce duplicated code. An error is always thrown in case of timeout. Signed-off-by: Angelo Dureghello <adureghello@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250523-ad3552r-fix-bus-read-v3-2-310e726dd964@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: adc: ad4080: add driver supportAntoniu Miclaus
Add support for AD4080 high-speed, low noise, low distortion, 20-bit, Easy Drive, successive approximation register (SAR) analog-to-digital converter (ADC). Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Link: https://patch.msgid.link/20250516082630.8236-10-antoniu.miclaus@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: adc: adi-axi-adc: add num lanes supportAntoniu Miclaus
Add support for setting the number of lanes enabled. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Link: https://patch.msgid.link/20250516082630.8236-8-antoniu.miclaus@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: adc: adi-axi-adc: add data align processAntoniu Miclaus
Add support for starting the sync process used for data capture alignment. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Link: https://patch.msgid.link/20250516082630.8236-7-antoniu.miclaus@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: adc: adi-axi-adc: add filter type configAntoniu Miclaus
Add support for enabling/disabling filter based on the filter type provided. This feature is specific to the axi ad408x IP core, therefore add new compatible string and corresponding iio_backend_ops. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Link: https://patch.msgid.link/20250516082630.8236-6-antoniu.miclaus@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: backend: add support for number of lanesAntoniu Miclaus
Add iio backend support for number of lanes to be enabled. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Link: https://patch.msgid.link/20250516082630.8236-4-antoniu.miclaus@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: backend: add support for data alignmentAntoniu Miclaus
Add backend support for staring the capture synchronization. When activated, it initates a proccess that aligns the sample's most significant bit (MSB) based solely on the captured data, without considering any other external signals. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Link: https://patch.msgid.link/20250516082630.8236-3-antoniu.miclaus@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: backend: add support for filter configAntoniu Miclaus
Add backend support for digital filter type selection. This setting can be adjusted within the IP cores interfacing devices. The IP core can be configured based on the state of the actual digital filter configuration of the part. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Link: https://patch.msgid.link/20250516082630.8236-2-antoniu.miclaus@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: irsd200: Remove print of error code from dev_err_probeWaqar Hameed
Since `dev_err_probe()` already prints the error code, there is no need to additionally print it in the error message. Therefore, just remove them. Signed-off-by: Waqar Hameed <waqar.hameed@axis.com> Link: https://patch.msgid.link/83c5ed21654b1b98437247d0fef823237af641b4.1747415559.git.waqar.hameed@axis.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: adc: max1363: Reorder mode_list[] entriesFabio Estevam
The IIO core issues warnings when a scan mask is a subset of a previous entry in the available_scan_masks array. On a board using a MAX11601, the following warning is observed: max1363 1-0064: available_scan_mask 7 subset of 6. Never used This occurs because the entries in the max11607_mode_list[] array are not ordered correctly. To fix this, reorder the entries so that no scan mask is a subset of an earlier one. While at it, reorder the mode_list[] arrays for other supported chips as well, to prevent similar warnings on different variants. Note fixes tag dropped as these were introduced over many commits a long time back and the side effect until recently was a reduction in sampling rate due to reading too many channels when only a few were desired. Now we have a sanity check that reports this error but that is not where the issue was introduced. Cc: stable@vger.kernel.org Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Matti Vaittinen <mazziesaccount@gmail.com> Link: https://patch.msgid.link/20250516173900.677821-2-festevam@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: adc: max1363: Fix MAX1363_4X_CHANS/MAX1363_8X_CHANS[]Fabio Estevam
Since commit 2718f15403fb ("iio: sanity check available_scan_masks array"), booting a board populated with a MAX11601 results in a flood of warnings: max1363 1-0064: available_scan_mask 8 subset of 0. Never used max1363 1-0064: available_scan_mask 9 subset of 0. Never used max1363 1-0064: available_scan_mask 10 subset of 0. Never used max1363 1-0064: available_scan_mask 11 subset of 0. Never used max1363 1-0064: available_scan_mask 12 subset of 0. Never used max1363 1-0064: available_scan_mask 13 subset of 0. Never used ... These warnings are caused by incorrect offsets used for differential channels in the MAX1363_4X_CHANS() and MAX1363_8X_CHANS() macros. The max1363_mode_table[] defines the differential channel mappings as follows: MAX1363_MODE_DIFF_SINGLE(0, 1, 1 << 12), MAX1363_MODE_DIFF_SINGLE(2, 3, 1 << 13), MAX1363_MODE_DIFF_SINGLE(4, 5, 1 << 14), MAX1363_MODE_DIFF_SINGLE(6, 7, 1 << 15), MAX1363_MODE_DIFF_SINGLE(8, 9, 1 << 16), MAX1363_MODE_DIFF_SINGLE(10, 11, 1 << 17), MAX1363_MODE_DIFF_SINGLE(1, 0, 1 << 18), MAX1363_MODE_DIFF_SINGLE(3, 2, 1 << 19), MAX1363_MODE_DIFF_SINGLE(5, 4, 1 << 20), MAX1363_MODE_DIFF_SINGLE(7, 6, 1 << 21), MAX1363_MODE_DIFF_SINGLE(9, 8, 1 << 22), MAX1363_MODE_DIFF_SINGLE(11, 10, 1 << 23), Update the macros to follow this same pattern, ensuring that the scan masks are valid and preventing the warnings. Cc: stable@vger.kernel.org Suggested-by: Jonathan Cameron <jic23@kernel.org> Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Matti Vaittinen <mazziesaccount@gmail.com> Link: https://patch.msgid.link/20250516173900.677821-1-festevam@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: adc: stm32-adc: Fix race in installing chained IRQ handlerChen Ni
Fix a race where a pending interrupt could be received and the handler called before the handler's data has been setup, by converting to irq_set_chained_handler_and_data(). Fixes: 1add69880240 ("iio: adc: Add support for STM32 ADC core") Signed-off-by: Chen Ni <nichen@iscas.ac.cn> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Tested-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://patch.msgid.link/20250515083101.3811350-1-nichen@iscas.ac.cn Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: fix potential out-of-bound writeMarkus Burri
The buffer is set to 20 characters. If a caller write more characters, count is truncated to the max available space in "simple_write_to_buffer". To protect from OoB access, check that the input size fit into buffer and add a zero terminator after copy to the end of the copied data. Fixes: 6d5dd486c715 iio: core: make use of simple_write_to_buffer() Signed-off-by: Markus Burri <markus.burri@mt.com> Link: https://patch.msgid.link/20250508130612.82270-4-markus.burri@mt.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: backend: fix out-of-bound writeMarkus Burri
The buffer is set to 80 character. If a caller write more characters, count is truncated to the max available space in "simple_write_to_buffer". But afterwards a string terminator is written to the buffer at offset count without boundary check. The zero termination is written OUT-OF-BOUND. Add a check that the given buffer is smaller then the buffer to prevent. Fixes: 035b4989211d ("iio: backend: make sure to NULL terminate stack buffer") Signed-off-by: Markus Burri <markus.burri@mt.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250508130612.82270-2-markus.burri@mt.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09drm: renesas: rz-du: Implement MIPI DSI host transfersHugo Villeneuve
Add support for sending MIPI DSI command packets from the host to a peripheral. This is required for panels that need configuration before they accept video data. Also for long reads to work properly, set DCS maximum return packet size to the value of the DMA buffer size. Based on Renesas Linux kernel v5.10 repos [1]. Link: https://github.com/renesas-rz/rz_linux-cip.git Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Tested-by: Chris Brandt <Chris.Brandt@renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20250604145306.1170676-2-hugo@hugovil.com
2025-06-09drm/msm/dsi/dsi_phy_10nm: Fix missing initial VCO rateKrzysztof Kozlowski
Driver unconditionally saves current state on first init in dsi_pll_10nm_init(), but does not save the VCO rate, only some of the divider registers. The state is then restored during probe/enable via msm_dsi_phy_enable() -> msm_dsi_phy_pll_restore_state() -> dsi_10nm_pll_restore_state(). Restoring calls dsi_pll_10nm_vco_set_rate() with pll_10nm->vco_current_rate=0, which basically overwrites existing rate of VCO and messes with clock hierarchy, by setting frequency to 0 to clock tree. This makes anyway little sense - VCO rate was not saved, so should not be restored. If PLL was not configured configure it to minimum rate to avoid glitches and configuring entire in clock hierarchy to 0 Hz. Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/sz4kbwy5nwsebgf64ia7uq4ee7wbsa5uy3xmlqwcstsbntzcov@ew3dcyjdzmi2/ Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Fixes: a4ccc37693a2 ("drm/msm/dsi_pll_10nm: restore VCO rate during Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/654796/ Link: https://lore.kernel.org/r/20250520111325.92352-2-krzysztof.kozlowski@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-06-09firewire: core: use from_work() macro to expand parent structure of work_structTakashi Sakamoto
A commit 60b2ebf48526 ("workqueue: Introduce from_work() helper for cleaner callback declarations") introduces a new macro to retrieve a poiner for the parent structure of the work item. It is convenient to reduce input text. This commit uses the macro in core functionalities. Link: https://lore.kernel.org/r/20250608233808.202355-3-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2025-06-09firewire: ohci: use from_work() macro to expand parent structure of work_structTakashi Sakamoto
A commit 60b2ebf48526 ("workqueue: Introduce from_work() helper for cleaner callback declarations") introduces a new macro to retrieve a poiner for the parent structure of the work item. It is convenient to reduce input text. This commit uses the macro in PCI driver for 1394 OHCI. Link: https://lore.kernel.org/r/20250608233808.202355-2-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2025-06-09firewire: ohci: correct code comments about bus_reset taskletTakashi Sakamoto
The tasklet for bus reset event has been replaced with work item, while some code comments still address to the tasklet. This commit corrects them. Fixes: 2d7a36e23300 ("firewire: ohci: Move code from the bus reset tasklet into a workqueue") Link: https://lore.kernel.org/r/20250608233808.202355-1-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
2025-06-08spi: spi-pci1xxxx: Add support for 25MHz Clock frequency in C0Thangaraj Samynathan
Adds support for 25MHz clock frequency. Support for this frequency is added in C0. Signed-off-by: Thangaraj Samynathan <thangaraj.s@microchip.com> Link: https://patch.msgid.link/20250526104908.404564-1-thangaraj.s@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-08spi: spi-qpic-snand: remove 'qpic_snand_op' structureGabor Juhos
The 'qpic_snand_op' structure is used only in the qcom_spi_send_cmdaddr() function as a type of a local variable. Additionally, the sole purpose of that variable is to keep some interim values before those gets passed as arguments for cpu_to_le32() calls. In order to simplify the code, remove the definition of the structure along with the local variable, and use the corresponding values directly as parameters for cpu_to_le32() calls. No functional changes intended. Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> Link: https://patch.msgid.link/20250529-qpic-snand-remove-qpic_snand_op-v1-1-6e42b772d748@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-08spi: spi-qpic-snand: use NANDC_STEP_SIZE consistentlyGabor Juhos
Change the qcom_spi_read_page_ecc() function to use NANDC_STEP_SIZE instead of a magic number while calculating the data size to keep it consistent with other functions like qcom_spi_program_{raw,ecc,oob} and qcom_spi_read_cw_{raw,page_oob}. No functional changes. Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> Reviewed-by: Md Sadre Alam <quic_mdalam@quicinc.com> Link: https://patch.msgid.link/20250525-qpic-snand-nandc_step_size-v1-1-6039e9bfe1c6@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-09drm/msm/disp: Correct porch timing for SDM845James A. MacInnes
Type-C DisplayPort inoperable due to incorrect porch settings. - Re-used wide_bus_en as flag to prevent porch shifting Fixes: c943b4948b58 ("drm/msm/dp: add displayPort driver support") Signed-off-by: James A. MacInnes <james.a.macinnes@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/636945/ Link: https://lore.kernel.org/r/20250212-sdm845_dp-v2-2-4954e51458f4@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-06-08spi: spi-fsl-dspi: Enable support for S32G platformsCiprian Marian Costea
Add compatible for S32G platforms, allowing DSPI to be used. Add a depends for ARCH_NXP which can replace LAYERSCAPE and also includes the new ARCH_S32 for S32G. Similarly, ARCH_MXC can replace SOC_VF610 || SOC_LS1021A which should avoid updating this for every new sub-platform in the future. Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com> Signed-off-by: Dan Nica <dan.nica@nxp.com> Signed-off-by: Larisa Grigore <Larisa.Grigore@nxp.com> Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com> Signed-off-by: James Clark <james.clark@linaro.org> Link: https://patch.msgid.link/20250522-james-nxp-spi-v2-13-bea884630cfb@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-08spi: spi-fsl-dspi: Enable modified transfer protocol on S32GAndra-Teodora Ilie
S32G supports modified transfer protocol where both host and target devices sample later in the SCK period than in Classic SPI mode to allow the logic to tolerate more delays in device pads and board traces. Set MTFE bit in MCR register for frequencies higher than 25MHz. Signed-off-by: Andra-Teodora Ilie <andra.ilie@nxp.com> Signed-off-by: Bogdan-Gabriel Roman <bogdan-gabriel.roman@nxp.com> Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com> Signed-off-by: James Clark <james.clark@linaro.org> Link: https://patch.msgid.link/20250522-james-nxp-spi-v2-11-bea884630cfb@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-08spi: spi-fsl-dspi: Reinitialize DSPI regs after resuming for S32GLarisa Grigore
After resuming, DSPI registers (MCR and SR) need to be reinitialized for S32G platforms. Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com> Signed-off-by: James Clark <james.clark@linaro.org> Link: https://patch.msgid.link/20250522-james-nxp-spi-v2-10-bea884630cfb@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-08spi: spi-fsl-dspi: Use DMA for S32G controller in target modeLarisa Grigore
Switch to DMA for target mode otherwise the controller is too slow to feed TX FIFO and UNDERFLOW occurs frequently. DMA can work only with 8 and 16 bits per word. 32bits per word is not supported, this is a hardware limitation, so we keep the controller mode in TCFQ mode. Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: James Clark <james.clark@linaro.org> Link: https://patch.msgid.link/20250522-james-nxp-spi-v2-9-bea884630cfb@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-08spi: spi-fsl-dspi: Avoid setup_accel logic for DMA transfersLarisa Grigore
Repacking multiple smaller words into larger ones to make use of the full FIFO doesn't save anything in DMA mode, so don't bother doing it. Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com> Signed-off-by: James Clark <james.clark@linaro.org> Link: https://patch.msgid.link/20250522-james-nxp-spi-v2-8-bea884630cfb@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-08spi: spi-fsl-dspi: Use spi_alloc_target for targetMarius Trifu
spi_alloc_target should be used for target devices. This also sets ctlr->target automatically so delete that line. Signed-off-by: Marius Trifu <marius.trifu@nxp.com> Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com> Signed-off-by: James Clark <james.clark@linaro.org> Link: https://patch.msgid.link/20250522-james-nxp-spi-v2-7-bea884630cfb@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-08spi: spi-fsl-dspi: Add config and regmaps for S32G platformsLarisa Grigore
S32G adds SPI_{T,R}XFR4 and extends SPI_CTAR registers to 5. Add the new regmaps, configs and bits. dspi_volatile_ranges gets SPI_{T,R}XFR4 added which affects all platforms, however they are further limited by dspi_yes_ranges. Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com> Signed-off-by: James Clark <james.clark@linaro.org> Link: https://patch.msgid.link/20250522-james-nxp-spi-v2-6-bea884630cfb@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-08spi: spi-fsl-dspi: Define regmaps per deviceJames Clark
Refactor the regmaps so they can be defined per device rather than programmatically. This will allow us to add two new regmaps for S32G in a later commit. No functional changes. Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: James Clark <james.clark@linaro.org> Link: https://patch.msgid.link/20250522-james-nxp-spi-v2-5-bea884630cfb@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-08spi: spi-fsl-dspi: Re-use one volatile regmap for both device typesJames Clark
max_register overrides anything in the volatile ranges, so we can get away with sharing the same one for both types. In a later commit we'll add more devices so this avoids adding even more duplication. Also replace the max_register magic numbers with their register definitions so it's clearer what's going on. No functional changes. Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: James Clark <james.clark@linaro.org> Link: https://patch.msgid.link/20250522-james-nxp-spi-v2-4-bea884630cfb@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-08regulator: pca9450: Add support for mode operationsMartijn de Gouw
Make the PWM mode on the buck controllers configurable from devicetree. Some boards require forced PWM mode to keep the supply ripple within acceptable limits under light load conditions. Signed-off-by: Martijn de Gouw <martijn.de.gouw@prodrive-technologies.com> Link: https://patch.msgid.link/20250525071823.819342-2-martijn.de.gouw@prodrive-technologies.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-08regulator: tps6594-regulator: Remove a useless static qualifierChristophe JAILLET
There is no point in having 'npname' a static variable. So remove the static qualifier. This is cleaner and saves a few bytes. On a x86_64, with allmodconfig: Before: ====== text data bss dec hex filename 27949 12176 64 40189 9cfd drivers/regulator/tps6594-regulator.o After: ===== text data bss dec hex filename 27947 12112 0 40059 9c7b drivers/regulator/tps6594-regulator.o Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://patch.msgid.link/ebc53d4049ec19796ef07e1bb734de19a2814727.1748103005.git.christophe.jaillet@wanadoo.fr Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-08regulator: tps6594-regulator: Constify struct tps6594_regulator_irq_typeChristophe JAILLET
'struct tps6594_regulator_irq_type' are not modified in this driver. Constifying this structure moves some data to a read-only section, so increases overall security. On a x86_64, with allmodconfig, as an example: Before: ====== text data bss dec hex filename 25645 14480 64 40189 9cfd drivers/regulator/tps6594-regulator.o After: ===== text data bss dec hex filename 27949 12176 64 40189 9cfd drivers/regulator/tps6594-regulator.o Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://patch.msgid.link/1446fb1938f3f38115be3e53f5dda3c8bb0ba5a1.1748103005.git.christophe.jaillet@wanadoo.fr Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit v1.3 (git 2.53.0) at 2026-11-12 21:28:34 +0000