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2025-10-31can: mcp251x: mcp251x_can_probe(): use dev_err_probe()Maud Spierings
The currently used combination of dev_err() plus return leaves a loud error in dmesg even when the error is a deferred probe which gets resolved later. For example a supply that has not been probed yet. Use dev_err_probe() to improve the handling/display of errors. Signed-off-by: Maud Spierings <maudspierings@gocontroll.com> Link: https://patch.msgid.link/20251030-mcp_err-v1-1-eecf737823b7@gocontroll.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2025-10-31can: peak_usb: convert to use ndo_hwtstamp callbacksVadim Fedorenko
Convert driver to use ndo_hwtstamp_set()/ndo_hwtstamp_get() callbacks. ndo_eth_ioctl handler does nothing after conversion - remove it. Signed-off-by: Vadim Fedorenko <vadim.fedorenko@linux.dev> Reviewed-by: Kory Maincent <kory.maincent@bootlin.com> Reviewed-by: Vincent Mailhol <mailhol@kernel.org> Link: https://patch.msgid.link/20251029231620.1135640-4-vadim.fedorenko@linux.dev Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2025-10-31can: peak_canfd: convert to use ndo_hwtstamp callbacksVadim Fedorenko
Convert driver to use ndo_hwtstamp_set()/ndo_hwtstamp_get() callbacks. ndo_eth_ioctl handler does nothing after conversion - remove it. Signed-off-by: Vadim Fedorenko <vadim.fedorenko@linux.dev> Reviewed-by: Kory Maincent <kory.maincent@bootlin.com> Reviewed-by: Vincent Mailhol <mailhol@kernel.org> Link: https://patch.msgid.link/20251029231620.1135640-3-vadim.fedorenko@linux.dev Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2025-10-31can: convert generic HW timestamp ioctl to ndo_hwtstamp callbacksVadim Fedorenko
Can has generic implementation of ndo_eth_ioctl which implements only HW timestamping commands. Implement generic ndo_hwtstamp callbacks and use it in drivers instead of generic ioctl interface. Signed-off-by: Vadim Fedorenko <vadim.fedorenko@linux.dev> Reviewed-by: Kory Maincent <kory.maincent@bootlin.com> Reviewed-by: Vincent Mailhol <mailhol@kernel.org> Link: https://patch.msgid.link/20251029231620.1135640-2-vadim.fedorenko@linux.dev Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2025-10-31regcache: maple: Split ->populate() from ->init()Andy Shevchenko
Split ->populate() implementation from ->init() code. This decoupling will help for the further changes. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://patch.msgid.link/20251031080540.3970776-6-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-10-31regcache: flat: Split ->populate() from ->init()Andy Shevchenko
Split ->populate() implementation from ->init() code. This decoupling will help for the further changes. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://patch.msgid.link/20251031080540.3970776-5-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-10-31regcache: flat: Remove unneeded check and error message for -ENOMEMAndy Shevchenko
There is a convention in the kernel to avoid error messages in the cases of -ENOMEM errors. Besides that, the idea behind using struct_size() and other macros from overflow.h is to saturate the size that the following allocation call will definitely fail, hence the check and the error messaging added in regcache_flat_init() are redundant. Remove them. Acked-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://patch.msgid.link/20251031080540.3970776-4-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-10-31regcache: rbtree: Split ->populate() from ->init()Andy Shevchenko
Split ->populate() implementation from ->init() code. This decoupling will help for the further changes. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://patch.msgid.link/20251031080540.3970776-3-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-10-31regcache: Add ->populate() callback to separate from ->init()Andy Shevchenko
In the future changes we would like to change the flow of the cache handling. Add ->populate() callback in order to prepare for that. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://patch.msgid.link/20251031080540.3970776-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-10-31Revert "rtc: cpcap: Fix initial enable_irq/disable_irq balance"Jon Hunter
Commit e0762fd26ad6 ("rtc: cpcap: Fix initial enable_irq/disable_irq balance") set 'alarm_enabled' prior to calling the function devm_request_threaded_irq() because this enables the IRQ. However, right after calling devm_request_threaded_irq(), the driver calls disable_irq() to disable the IRQ and so now 'alarm_enabled' will be true but the IRQ is actually disabled. Revert this commit to fix the 'alarm_enabled' state. Fixes: e0762fd26ad6 ("rtc: cpcap: Fix initial enable_irq/disable_irq balance") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Link: https://patch.msgid.link/20251031103741.945460-2-jonathanh@nvidia.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2025-10-31Revert "rtc: tps6586x: Fix initial enable_irq/disable_irq balance"Jon Hunter
Commit 1502fe0e97be ("rtc: tps6586x: Fix initial enable_irq/disable_irq balance") breaks the wake-up alarm for the tps6586x. After this commit was added RTC wake ups from suspend stopped working on the Tegra20 Ventana platform. The problem is that this change set the 'irq_en' variable to true prior to calling devm_request_threaded_irq() to indicate that the IRQ is enabled, however, it was over looked that the flag IRQ_NOAUTOEN is already set meaning that the IRQ is not enabled by default. This prevents the IRQ from being enabled as expected. Revert this change to fix this. Fixes: 1502fe0e97be ("rtc: tps6586x: Fix initial enable_irq/disable_irq balance") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Link: https://patch.msgid.link/20251031103741.945460-1-jonathanh@nvidia.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2025-10-31drm/i915/xe3p_lpd: use pixel normalizer for fp16 formats for FBCVinod Govindapillai
There is a hw restriction that we could enable the FBC for FP16 formats only if the pixel normalization block is enabled. Hence enable the pixel normalizer block with normalzation factor as 1.0 for the supported FP16 formats to get the FBC enabled. Two existing helper function definitions are moved up to avoid the forward declarations as part of this patch as well. v2: sw/hw state differentiation on handling pixel normalizer (Jani) Bspec: 69863, 68881 Cc: Shekhar Chauhan <shekhar.chauhan@intel.com> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patch.msgid.link/20251027134001.325064-5-vinod.govindapillai@intel.com
2025-10-31drm/i915/xe3p_lpd: extract pixel format valid routine for FP16 formatsVinod Govindapillai
As the pixel normalizer block is needed only for the FP16 formats, separating out the FP16 formats handling will benefit in selectively enabling the pixel normalizer block in the following patch. Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patch.msgid.link/20251027134001.325064-4-vinod.govindapillai@intel.com
2025-10-31drm/i915/xe3p_lpd: Add FBC support for FP16 formatsVinod Govindapillai
Add supported FP16 formats for FBC. FBC can be enabled with FP16 formats only when plane pixel normalizer block is enabled. The follow up patches will handle the pixel normalizer block configuration. v2: changes related to comments to use better tracking of pixel normalizer Bspec: 6881, 69863, 68904 Cc: Shekhar Chauhan <shekhar.chauhan@intel.com> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patch.msgid.link/20251027134001.325064-3-vinod.govindapillai@intel.com
2025-10-31drm/i915/xe3p_lpd: Extend FBC support to UINT16 formatsSai Teja Pottumuttu
Starting Xe3p_LPD, FBC is supported on UINT16 formats as well. Also UINT16 being a 64bpp format, will use cpp of 8 for cfb stride and thus size calculations. v2: simplify getting the cpp per format (Ville) simplify the pixel format is valid for xe3p_lp (Vinod) Cc: Shekhar Chauhan <shekhar.chauhan@intel.com> BSpec: 68881, 68904, 69560 Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patch.msgid.link/20251027134001.325064-2-vinod.govindapillai@intel.com
2025-10-31drm/xe/compat: reduce i915_utils.[ch]Jani Nikula
Reduce the compat i915_utils.h to only cover the requirements of MISSING_CASE() in soc/ and the few i915_inject_probe_failure() instances, instead of including the entire i915_utils.h from i915. This prevents new users for the utilities from cropping up. With this, we can remove the xe/display/ext/i915_utils.c altogether. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Link: https://patch.msgid.link/c02f82e45f31caf95bd1339080b9099c3b7190be.1761146196.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-10-31drm/i915/display: switch to intel_display_utils.hJani Nikula
The remaining utils display needs from i915_utils.h are primarily MISSING_CASE() and fetch_and_zero(), with a couple of i915_inject_probe_failure() uses. To avoid excessive churn, add duplicates of MISSING_CASE() and fetch_and_zero() to intel_display_utils.h, and switch display to use the display utils. As long as there are display files that include i915_drv.h, which includes i915_utils.h, we'll need #ifndef guards for MISSING_CASE() and fetch_and_zero() in both utils headers. We can remove them once display no longer depends on i915_drv.h. A couple of files in display still need i915_utils.h for i915_inject_probe_failure(). Annotate this. They will be handled separately. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Link: https://patch.msgid.link/79f9e31ca64c8c045834d48e20ceb0c515d1e9e1.1761146196.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-10-31drm/i915/display: add intel_display_vtd_active()Jani Nikula
Add intel_display_vtd_active() to utils. It's intentional duplication with i915_utils.h i915_vtd_active(), but reduces duplication with xe. Win some, lose some. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Link: https://patch.msgid.link/e022166af7c67f43904e2d0fc87bc5c13e0f1204.1761146196.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-10-31drm/i915/display: add intel_display_run_as_guest()Jani Nikula
Add intel_display_utils.c for display utilities that need more than a header. Start off with intel_display_run_as_guest(). The implementation is intentional duplication of the i915_utils.h i915_run_as_guest(), with the idea that it's small enough to not matter. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Link: https://patch.msgid.link/469f9c41e0c3e3099314a3cf1a7671bf36ec8ffd.1761146196.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-10-31drm/i915/display: create intel_display_utils.hJani Nikula
Start a file for display specific generic utilities. Move KHz() and MHz() helpers there first. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Link: https://patch.msgid.link/dbdd1915466850293b9737b751170dd225197873.1761146196.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-10-31drm/i915: split out separate files for jiffies timeout and wait helpersJani Nikula
Add i915_jiffies.h and intel_display_jiffies.h for jiffies timeout and wait helpers, and use them separately from i915 and display. This helps reduce the display dependency on i915_utils.h. Long term, both msecs_to_jiffies_timeout() and wait_remaining_ms_from_jiffies() really belong in core kernel headers, but for now unblock display refactoring. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Link: https://patch.msgid.link/d8bc62b3a81afa05c849dde9b0f633572eaf5611.1761146196.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-10-31drm/i915/dsi: debug log send packet sequence contentsJani Nikula
This might help debug issues better than just debug logging the function name. v2: Debug log type as hex (Ville) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20251029084603.2254982-2-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-10-31drm/i915/dsi: log send packet sequence errorsJani Nikula
We might be getting send packet sequence errors and never know. Log them as errors. Also upgrade the not supported read commands to errors. v2: Also error log -EOPNOTSUPP (Ville) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20251029084603.2254982-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-10-31Merge back system sleep material for 6.19Rafael J. Wysocki
2025-10-31drm/panel: ilitek-ili9882t: Add support for Ilitek IL79900A-based panelsLangyan Ye
The Ilitek IL79900A display controller is similar to the ILI9882T and can be supported within the existing `panel-ilitek-ili9882t.c` driver. This patch extends the ILI9882T driver to handle IL79900A-based panels, such as the Tianma TL121BVMS07-00. The IL79900A uses a similar command sequence and initialization flow, with minor differences in power supply configuration and timing. Signed-off-by: Langyan Ye <yelangyan@huaqin.corp-partner.google.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20251031100447.253164-3-yelangyan@huaqin.corp-partner.google.com
2025-10-31drm/sched: Fix comment in drm_sched_run_job_work()Philipp Stanner
drm_sched_run_job_work() contains a comment which explains that an entity being NULL means that there is no more work to do. It can, however, also mean that there is work, but the scheduler doesn't have enough credits to process the jobs right now. Provide this detail in the comment. Reviewed-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Philipp Stanner <phasta@kernel.org> Link: https://patch.msgid.link/20251028134602.94125-3-phasta@kernel.org
2025-10-31drm/i915/gt: Use standard API for seqcount read in TLB invalidationAndi Shyti
seqprop_sequence() is not intended for use outside seqlock.h. Although it is accessible as a macro, it is meant to be used only internally within the header. Replace it with its proper wrapper, raw_read_seqcount(). Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Co-developed-by: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@linux.intel.com> Cc: Christoph Lameter (Ampere) <cl@gentwo.org> Reviewed-by: Sebastian Brzezinka <sebastian.brzezinka@intel.com> Link: https://lore.kernel.org/r/20251023132802.654061-1-andi.shyti@linux.intel.com
2025-10-31crypto: qat - use simple_strtoull to improve qat_uclo_parse_numThorsten Blum
Replace the manual string copying and parsing logic with a call to simple_strtoull() to simplify and improve qat_uclo_parse_num(). Ensure that the parsed number does not exceed UINT_MAX, and add an approximate upper-bound check (no more than 19 digits) to guard against overflow. Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev> Acked-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-10-31crypto: hisilicon/qm - add missing default in switch in qm_vft_data_cfgnieweiqiang
Add default case to avoid warnings and meet code style requirements. Signed-off-by: nieweiqiang <nieweiqiang@huawei.com> Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-10-31crypto: hisilicon/sgl - remove unnecessary checks for curr_hw_sgl errornieweiqiang
Before calling acc_get_sgl(), the mem_block has already been created. acc_get_sgl() will not return NULL or any other error. so the return value check can be removed. Signed-off-by: nieweiqiang <nieweiqiang@huawei.com> Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-10-31crypto: hisilicon/qm - add concurrency protection for variable err_thresholdnieweiqiang
The isolate_strategy_store function is not protected by a lock. If sysfs operations and functions that depend on the err_threshold variable,such as qm_hw_err_isolate(), execute concurrently, the outcome will be unpredictable. Therefore, concurrency protection should be added for the err_threshold variable. Signed-off-by: nieweiqiang <nieweiqiang@huawei.com> Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-10-31crypto: hisilicon/qm - add the save operation of eqe and aeqenieweiqiang
The eqe and aeqe are device updated values that include the valid bit and queue number. In the current process, there is no memory barrier added, so it cannot be guaranteed that the valid bit is read before other processes are executed. Since eqe and aeqe are only 4 bytes and the device writes them to memory in a single operation, saving the values of eqe and aeqe ensures that the valid bit and queue number read by the CPU were written by the device simultaneously. Signed-off-by: nieweiqiang <nieweiqiang@huawei.com> Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-10-31crypto: qce - Provide dev_err_probe() status on DMA failureBjorn Andersson
On multiple occasions the qce device have shown up in devices_deferred, without the explanation that this came from the failure to acquire the DMA channels from the associated BAM. Use dev_err_probe() to associate this context with the failure to faster pinpoint the culprit when this happens in the future. Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: David Heidelberg <david@ixit.cz> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-10-31drm/i915: Wait for page_sizes_gtt in gtt selftest on CHV/BXT+VTDJanusz Krzysztofik
VMA pinning to GGTT is now commited asynchronously in CHV / BXT+VDT environments to avoid lock inversion among reservation_ww and cpu_hotplug locks, the latter acquired from stop_machine(). Then, vma->resource->page_sizes_gtt the test uses as shift count may still be not populated (equal 0) after i915_vma_pin() returns. Wait for VMA bind completion in those cases to avoid shift-out-of-bounds kernel warnings and the test case failing with -EBADSLT. v2: Explain why VMA pinning is commited asynchronously on CHV/BXT+VTD (Krzysztof), - use more precise wording in commit description. Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> Reviewed-by: Sebastian Brzezinka <sebastian.brzezinka@intel.com> Reviewed-by: Krzysztof Karas <krzysztof.karas@intel.com> Acked-by: Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://lore.kernel.org/r/20251023082925.351307-8-janusz.krzysztofik@linux.intel.com
2025-10-31drm/i915: Wait longer for threads in migrate selftest on CHV/BXT+VTDJanusz Krzysztofik
When running on a Cherryview, or on a Broxton with VTD enabled, pinning of a VMA to GGTT is now committed asynchronously to avoid lock inversion among reservation_ww and cpu_hotplug locks, the latter acquired from stop_machine(). That may defer further processing of resources that depend on that VMA. As a consequence, a 10ms delay in a multithreaded migrate test case may occur too short and still incomplete threads may be interrupted, and the test case may fail with -ERESTARTSYS or -EINTR error code returned by any of those threads. Extend the delay to empirically determined 100ms on affected platforms. v3: Add an in-line comment that explains why 100ms (Andi). v2: Fix spelling (Sebastian, Krzysztof), - explain why VMA pinning is commited asynchronously on CHV/BXT+VTD (Krzysztof). Cc: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> Reviewed-by: Sebastian Brzezinka <sebastian.brzezinka@intel.com> Reviewed-by: Krzysztof Karas <krzysztof.karas@intel.com> Acked-by: Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://lore.kernel.org/r/20251023082925.351307-7-janusz.krzysztofik@linux.intel.com
2025-10-31drm/i915: Avoid lock inversion when pinning to GGTT on CHV/BXT+VTDJanusz Krzysztofik
On completion of i915_vma_pin_ww(), a synchronous variant of dma_fence_work_commit() is called. When pinning a VMA to GGTT address space on a Cherry View family processor, or on a Broxton generation SoC with VTD enabled, i.e., when stop_machine() is then called from intel_ggtt_bind_vma(), that can potentially lead to lock inversion among reservation_ww and cpu_hotplug locks. [86.861179] ====================================================== [86.861193] WARNING: possible circular locking dependency detected [86.861209] 6.15.0-rc5-CI_DRM_16515-gca0305cadc2d+ #1 Tainted: G U [86.861226] ------------------------------------------------------ [86.861238] i915_module_loa/1432 is trying to acquire lock: [86.861252] ffffffff83489090 (cpu_hotplug_lock){++++}-{0:0}, at: stop_machine+0x1c/0x50 [86.861290] but task is already holding lock: [86.861303] ffffc90002e0b4c8 (reservation_ww_class_mutex){+.+.}-{3:3}, at: i915_vma_pin.constprop.0+0x39/0x1d0 [i915] [86.862233] which lock already depends on the new lock. [86.862251] the existing dependency chain (in reverse order) is: [86.862265] -> #5 (reservation_ww_class_mutex){+.+.}-{3:3}: [86.862292] dma_resv_lockdep+0x19a/0x390 [86.862315] do_one_initcall+0x60/0x3f0 [86.862334] kernel_init_freeable+0x3cd/0x680 [86.862353] kernel_init+0x1b/0x200 [86.862369] ret_from_fork+0x47/0x70 [86.862383] ret_from_fork_asm+0x1a/0x30 [86.862399] -> #4 (reservation_ww_class_acquire){+.+.}-{0:0}: [86.862425] dma_resv_lockdep+0x178/0x390 [86.862440] do_one_initcall+0x60/0x3f0 [86.862454] kernel_init_freeable+0x3cd/0x680 [86.862470] kernel_init+0x1b/0x200 [86.862482] ret_from_fork+0x47/0x70 [86.862495] ret_from_fork_asm+0x1a/0x30 [86.862509] -> #3 (&mm->mmap_lock){++++}-{3:3}: [86.862531] down_read_killable+0x46/0x1e0 [86.862546] lock_mm_and_find_vma+0xa2/0x280 [86.862561] do_user_addr_fault+0x266/0x8e0 [86.862578] exc_page_fault+0x8a/0x2f0 [86.862593] asm_exc_page_fault+0x27/0x30 [86.862607] filldir64+0xeb/0x180 [86.862620] kernfs_fop_readdir+0x118/0x480 [86.862635] iterate_dir+0xcf/0x2b0 [86.862648] __x64_sys_getdents64+0x84/0x140 [86.862661] x64_sys_call+0x1058/0x2660 [86.862675] do_syscall_64+0x91/0xe90 [86.862689] entry_SYSCALL_64_after_hwframe+0x76/0x7e [86.862703] -> #2 (&root->kernfs_rwsem){++++}-{3:3}: [86.862725] down_write+0x3e/0xf0 [86.862738] kernfs_add_one+0x30/0x3c0 [86.862751] kernfs_create_dir_ns+0x53/0xb0 [86.862765] internal_create_group+0x134/0x4c0 [86.862779] sysfs_create_group+0x13/0x20 [86.862792] topology_add_dev+0x1d/0x30 [86.862806] cpuhp_invoke_callback+0x4b5/0x850 [86.862822] cpuhp_issue_call+0xbf/0x1f0 [86.862836] __cpuhp_setup_state_cpuslocked+0x111/0x320 [86.862852] __cpuhp_setup_state+0xb0/0x220 [86.862866] topology_sysfs_init+0x30/0x50 [86.862879] do_one_initcall+0x60/0x3f0 [86.862893] kernel_init_freeable+0x3cd/0x680 [86.862908] kernel_init+0x1b/0x200 [86.862921] ret_from_fork+0x47/0x70 [86.862934] ret_from_fork_asm+0x1a/0x30 [86.862947] -> #1 (cpuhp_state_mutex){+.+.}-{3:3}: [86.862969] __mutex_lock+0xaa/0xed0 [86.862982] mutex_lock_nested+0x1b/0x30 [86.862995] __cpuhp_setup_state_cpuslocked+0x67/0x320 [86.863012] __cpuhp_setup_state+0xb0/0x220 [86.863026] page_alloc_init_cpuhp+0x2d/0x60 [86.863041] mm_core_init+0x22/0x2d0 [86.863054] start_kernel+0x576/0xbd0 [86.863068] x86_64_start_reservations+0x18/0x30 [86.863084] x86_64_start_kernel+0xbf/0x110 [86.863098] common_startup_64+0x13e/0x141 [86.863114] -> #0 (cpu_hotplug_lock){++++}-{0:0}: [86.863135] __lock_acquire+0x1635/0x2810 [86.863152] lock_acquire+0xc4/0x2f0 [86.863166] cpus_read_lock+0x41/0x100 [86.863180] stop_machine+0x1c/0x50 [86.863194] bxt_vtd_ggtt_insert_entries__BKL+0x3b/0x60 [i915] [86.863987] intel_ggtt_bind_vma+0x43/0x70 [i915] [86.864735] __vma_bind+0x55/0x70 [i915] [86.865510] fence_work+0x26/0xa0 [i915] [86.866248] fence_notify+0xa1/0x140 [i915] [86.866983] __i915_sw_fence_complete+0x8f/0x270 [i915] [86.867719] i915_sw_fence_commit+0x39/0x60 [i915] [86.868453] i915_vma_pin_ww+0x462/0x1360 [i915] [86.869228] i915_vma_pin.constprop.0+0x133/0x1d0 [i915] [86.870001] initial_plane_vma+0x307/0x840 [i915] [86.870774] intel_initial_plane_config+0x33f/0x670 [i915] [86.871546] intel_display_driver_probe_nogem+0x1c6/0x260 [i915] [86.872330] i915_driver_probe+0x7fa/0xe80 [i915] [86.873057] i915_pci_probe+0xe6/0x220 [i915] [86.873782] local_pci_probe+0x47/0xb0 [86.873802] pci_device_probe+0xf3/0x260 [86.873817] really_probe+0xf1/0x3c0 [86.873833] __driver_probe_device+0x8c/0x180 [86.873848] driver_probe_device+0x24/0xd0 [86.873862] __driver_attach+0x10f/0x220 [86.873876] bus_for_each_dev+0x7f/0xe0 [86.873892] driver_attach+0x1e/0x30 [86.873904] bus_add_driver+0x151/0x290 [86.873917] driver_register+0x5e/0x130 [86.873931] __pci_register_driver+0x7d/0x90 [86.873945] i915_pci_register_driver+0x23/0x30 [i915] [86.874678] i915_init+0x37/0x120 [i915] [86.875347] do_one_initcall+0x60/0x3f0 [86.875369] do_init_module+0x97/0x2a0 [86.875385] load_module+0x2c54/0x2d80 [86.875398] init_module_from_file+0x96/0xe0 [86.875413] idempotent_init_module+0x117/0x330 [86.875426] __x64_sys_finit_module+0x77/0x100 [86.875440] x64_sys_call+0x24de/0x2660 [86.875454] do_syscall_64+0x91/0xe90 [86.875470] entry_SYSCALL_64_after_hwframe+0x76/0x7e [86.875486] other info that might help us debug this: [86.875502] Chain exists of: cpu_hotplug_lock --> reservation_ww_class_acquire --> reservation_ww_class_mutex [86.875539] Possible unsafe locking scenario: [86.875552] CPU0 CPU1 [86.875563] ---- ---- [86.875573] lock(reservation_ww_class_mutex); [86.875588] lock(reservation_ww_class_acquire); [86.875606] lock(reservation_ww_class_mutex); [86.875624] rlock(cpu_hotplug_lock); [86.875637] *** DEADLOCK *** [86.875650] 3 locks held by i915_module_loa/1432: [86.875663] #0: ffff888101f5c1b0 (&dev->mutex){....}-{3:3}, at: __driver_attach+0x104/0x220 [86.875699] #1: ffffc90002e0b4a0 (reservation_ww_class_acquire){+.+.}-{0:0}, at: i915_vma_pin.constprop.0+0x39/0x1d0 [i915] [86.876512] #2: ffffc90002e0b4c8 (reservation_ww_class_mutex){+.+.}-{3:3}, at: i915_vma_pin.constprop.0+0x39/0x1d0 [i915] [86.877305] stack backtrace: [86.877326] CPU: 0 UID: 0 PID: 1432 Comm: i915_module_loa Tainted: G U 6.15.0-rc5-CI_DRM_16515-gca0305cadc2d+ #1 PREEMPT(voluntary) [86.877334] Tainted: [U]=USER [86.877336] Hardware name: /NUC5CPYB, BIOS PYBSWCEL.86A.0079.2020.0420.1316 04/20/2020 [86.877339] Call Trace: [86.877344] <TASK> [86.877353] dump_stack_lvl+0x91/0xf0 [86.877364] dump_stack+0x10/0x20 [86.877369] print_circular_bug+0x285/0x360 [86.877379] check_noncircular+0x135/0x150 [86.877390] __lock_acquire+0x1635/0x2810 [86.877403] lock_acquire+0xc4/0x2f0 [86.877408] ? stop_machine+0x1c/0x50 [86.877422] ? __pfx_bxt_vtd_ggtt_insert_entries__cb+0x10/0x10 [i915] [86.878173] cpus_read_lock+0x41/0x100 [86.878182] ? stop_machine+0x1c/0x50 [86.878191] ? __pfx_bxt_vtd_ggtt_insert_entries__cb+0x10/0x10 [i915] [86.878916] stop_machine+0x1c/0x50 [86.878927] bxt_vtd_ggtt_insert_entries__BKL+0x3b/0x60 [i915] [86.879652] intel_ggtt_bind_vma+0x43/0x70 [i915] [86.880375] __vma_bind+0x55/0x70 [i915] [86.881133] fence_work+0x26/0xa0 [i915] [86.881851] fence_notify+0xa1/0x140 [i915] [86.882566] __i915_sw_fence_complete+0x8f/0x270 [i915] [86.883286] i915_sw_fence_commit+0x39/0x60 [i915] [86.884003] i915_vma_pin_ww+0x462/0x1360 [i915] [86.884756] ? i915_vma_pin.constprop.0+0x6c/0x1d0 [i915] [86.885513] i915_vma_pin.constprop.0+0x133/0x1d0 [i915] [86.886281] initial_plane_vma+0x307/0x840 [i915] [86.887049] intel_initial_plane_config+0x33f/0x670 [i915] [86.887819] intel_display_driver_probe_nogem+0x1c6/0x260 [i915] [86.888587] i915_driver_probe+0x7fa/0xe80 [i915] [86.889293] ? mutex_unlock+0x12/0x20 [86.889301] ? drm_privacy_screen_get+0x171/0x190 [86.889308] ? acpi_dev_found+0x66/0x80 [86.889321] i915_pci_probe+0xe6/0x220 [i915] [86.890038] local_pci_probe+0x47/0xb0 [86.890049] pci_device_probe+0xf3/0x260 [86.890058] really_probe+0xf1/0x3c0 [86.890067] __driver_probe_device+0x8c/0x180 [86.890072] driver_probe_device+0x24/0xd0 [86.890078] __driver_attach+0x10f/0x220 [86.890083] ? __pfx___driver_attach+0x10/0x10 [86.890088] bus_for_each_dev+0x7f/0xe0 [86.890097] driver_attach+0x1e/0x30 [86.890101] bus_add_driver+0x151/0x290 [86.890107] driver_register+0x5e/0x130 [86.890113] __pci_register_driver+0x7d/0x90 [86.890119] i915_pci_register_driver+0x23/0x30 [i915] [86.890833] i915_init+0x37/0x120 [i915] [86.891482] ? __pfx_i915_init+0x10/0x10 [i915] [86.892135] do_one_initcall+0x60/0x3f0 [86.892145] ? __kmalloc_cache_noprof+0x33f/0x470 [86.892157] do_init_module+0x97/0x2a0 [86.892164] load_module+0x2c54/0x2d80 [86.892168] ? __kernel_read+0x15c/0x300 [86.892185] ? kernel_read_file+0x2b1/0x320 [86.892195] init_module_from_file+0x96/0xe0 [86.892199] ? init_module_from_file+0x96/0xe0 [86.892211] idempotent_init_module+0x117/0x330 [86.892224] __x64_sys_finit_module+0x77/0x100 [86.892230] x64_sys_call+0x24de/0x2660 [86.892236] do_syscall_64+0x91/0xe90 [86.892243] ? irqentry_exit+0x77/0xb0 [86.892249] ? sysvec_apic_timer_interrupt+0x57/0xc0 [86.892256] entry_SYSCALL_64_after_hwframe+0x76/0x7e [86.892261] RIP: 0033:0x7303e1b2725d [86.892271] Code: ff c3 66 2e 0f 1f 84 00 00 00 00 00 90 f3 0f 1e fa 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 8b bb 0d 00 f7 d8 64 89 01 48 [86.892276] RSP: 002b:00007ffddd1fdb38 EFLAGS: 00000246 ORIG_RAX: 0000000000000139 [86.892281] RAX: ffffffffffffffda RBX: 00005d771d88fd90 RCX: 00007303e1b2725d [86.892285] RDX: 0000000000000000 RSI: 00005d771d893aa0 RDI: 000000000000000c [86.892287] RBP: 00007ffddd1fdbf0 R08: 0000000000000040 R09: 00007ffddd1fdb80 [86.892289] R10: 00007303e1c03b20 R11: 0000000000000246 R12: 00005d771d893aa0 [86.892292] R13: 0000000000000000 R14: 00005d771d88f0d0 R15: 00005d771d895710 [86.892304] </TASK> Call asynchronous variant of dma_fence_work_commit() in that case. v3: Provide more verbose in-line comment (Andi), - mention target environments in commit message. Fixes: 7d1c2618eac59 ("drm/i915: Take reservation lock around i915_vma_pin.") Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14985 Cc: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> Reviewed-by: Sebastian Brzezinka <sebastian.brzezinka@intel.com> Reviewed-by: Krzysztof Karas <krzysztof.karas@intel.com> Acked-by: Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://lore.kernel.org/r/20251023082925.351307-6-janusz.krzysztofik@linux.intel.com
2025-10-31crypto: ti - Add support for AES-XTS in DTHEv2 driverT Pratham
Add support for XTS mode of operation for AES algorithm in the AES Engine of the DTHEv2 hardware cryptographic engine. Signed-off-by: T Pratham <t-pratham@ti.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-10-31drm/ttm: Add an allocation flag to propagate -ENOSPC on OOMTvrtko Ursulin
Some graphics APIs differentiate between out-of-graphics-memory and out-of-host-memory (system memory). Add a device init flag to have -ENOSPC propagated from the resource managers instead of being converted to -ENOMEM, to aid driver stacks in determining what error code to return or whether corrective action can be taken at the driver level. Co-developed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Cc: Christian König <christian.koenig@amd.com> Cc: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net> Link: https://lore.kernel.org/r/20251020115411.36818-7-tvrtko.ursulin@igalia.com
2025-10-31drm/amdgpu: Configure max beneficial TTM pool allocation orderTvrtko Ursulin
Let the TTM pool allocator know that we can afford for it to expend less effort for satisfying contiguous allocations larger than 2MiB. The latter is the maximum relevant PTE entry size and the driver and hardware are happy to get larger blocks only opportunistically. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Thadeu Lima de Souza Cascardo <cascardo@igalia.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net> Link: https://lore.kernel.org/r/20251020115411.36818-6-tvrtko.ursulin@igalia.com
2025-10-31drm/ttm: Allow drivers to specify maximum beneficial TTM pool sizeTvrtko Ursulin
GPUs typically benefit from contiguous memory via reduced TLB pressure and improved caching performance, where the maximum size of contiguous block which adds a performance benefit is related to hardware design. TTM pool allocator by default tries (hard) to allocate up to the system MAX_PAGE_ORDER blocks. This varies by the CPU platform and can also be configured via Kconfig. If that limit was set to be higher than the GPU can make an extra use of, lets allow the individual drivers to let TTM know over which allocation order can the pool allocator afford to make a little bit less effort with. We implement this by disabling direct reclaim for those allocations, which reduces the allocation latency and lowers the demands on the page allocator, in cases where expending this effort is not critical for the GPU in question. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Cc: Christian König <christian.koenig@amd.com> Cc: Thadeu Lima de Souza Cascardo <cascardo@igalia.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net> Link: https://lore.kernel.org/r/20251020115411.36818-5-tvrtko.ursulin@igalia.com
2025-10-31drm/ttm: Replace multiple booleans with flags in device initTvrtko Ursulin
Multiple consecutive boolean function arguments are usually not very readable. Replace the ones in ttm_device_init() with flags with the additional benefit of soon being able to pass in more data with just a one off code base churning cost. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Danilo Krummrich <dakr@kernel.org> Cc: Dave Airlie <airlied@redhat.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Lyude Paul <lyude@redhat.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Sui Jingfeng <suijingfeng@loongson.cn> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: Zack Rusin <zack.rusin@broadcom.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Zack Rusin <zack.rusin@broadcom.com> Acked-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> # For xe Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net> Link: https://lore.kernel.org/r/20251020115411.36818-4-tvrtko.ursulin@igalia.com [tursulin: fixup checkpatch while applying]
2025-10-31HID: nintendo: Reduce JC_SUBCMD_RATE_MAX_ATTEMPTSWilly Huang
The JC_SUBCMD_RATE_MAX_ATTEMPTS constant is currently set to 500. In a worst-case scenario where all attempts consistently fail, this could cause the loop to block for up to 60000 ms (500 * 60ms * 2, including the additional retry after a timeout). This change lowers the maximum potential blocking time to 3000 ms (25 * 60ms * 2), improving system responsiveness and efficiency. Signed-off-by: Willy Huang <willyhuang@google.com> Reviewed-by: Daniel J. Ogorchock <djogorchock@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
2025-10-31HID: hid-input: Extend Elan ignore battery quirk to USBMario Limonciello (AMD)
USB Elan devices have the same problem as the I2C ones with a fake battery device showing up. Reviewed-by: Hans de Goede <hansg@kernel.org> Reported-by: André Barata <andretiagob@protonmail.com> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=220722 Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org> Signed-off-by: Jiri Kosina <jkosina@suse.com>
2025-10-31drm/ttm: Replace multiple booleans with flags in pool initTvrtko Ursulin
Multiple consecutive boolean function arguments are usually not very readable. Replace the ones in ttm_pool_init() with flags with the additional benefit of soon being able to pass in more data with just this one code base churning cost. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net> Link: https://lore.kernel.org/r/20251020115411.36818-3-tvrtko.ursulin@igalia.com
2025-10-31HID: hid-ntrig: Prevent memory leak in ntrig_report_version()Masami Ichikawa
Use a scope-based cleanup helper for the buffer allocated with kmalloc() in ntrig_report_version() to simplify the cleanup logic and prevent memory leaks (specifically the !hid_is_usb()-case one). [jkosina@suse.com: elaborate on the actual existing leak] Fixes: 185c926283da ("HID: hid-ntrig: fix unable to handle page fault in ntrig_report_version()") Signed-off-by: Masami Ichikawa <masami256@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
2025-10-31drm/ttm: Add getter for some pool propertiesTvrtko Ursulin
No functional change but to allow easier refactoring in the future. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Cc: Christian König <christian.koenig@amd.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net> Link: https://lore.kernel.org/r/20251020115411.36818-2-tvrtko.ursulin@igalia.com
2025-10-31drm: include drm_print.h where neededJani Nikula
There are a gazillion files that depend on drm_print.h being indirectly included via drm_buddy.h, drm_mm.h, or ttm/ttm_resource.h. In preparation for removing those includes, explicitly include drm_print.h where needed. Cc: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://lore.kernel.org/r/5fe67395907be33eb5199ea6d540e29fddee71c8.1761734313.git.jani.nikula@intel.com
2025-10-30drm/xe/gt_throttle: Drop individual show functionsLucas De Marchi
They are all doing the same thing with the mask being the param. Just declare our own attribute to store the mask and provide a single function. Another common pattern is to define the show function in the macro, however on follow up work the mask may be used for returning more information, so it'd need to be stored in any case. Reviewed-by: Raag Jadav <raag.jadav@intel.com> Link: https://patch.msgid.link/20251029-gt-throttle-cri-v3-7-d1f5abbb8114@intel.com Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2025-10-30drm/xe: Improve freq and throttle documentationLucas De Marchi
Add xe_gt_throttle under the "GT Frequency Management" and improve the narrative making sure the documentation for both *_freq and throttle/* attributes follow the same style. Reviewed-by: Raag Jadav <raag.jadav@intel.com> Link: https://patch.msgid.link/20251029-gt-throttle-cri-v3-6-d1f5abbb8114@intel.com Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2025-10-30drm/xe/gt_throttle: Tidy up attribute definitionLucas De Marchi
Move the attribute definitions to be grouped together rather than near the show() function: checkpatch keeps complaining about the missing newline when defining new attributes and it reads better to group everything, which should match e.g. the xe_pmu.c style. While grouping them, also define a THROTTLE_ATTR_RO(), similar to DEVICE_ATTR_RO(), and use it to define all attributes. This makes it shorter and with a familiar syntax. Finally, during the cri_throttle_attrs[] array definition, also highlight what's coming from common attributes and what is CRI-specific. These 3 things could be done as separate commits, but they are all about the same thing: reduce the attribute definition verbosity and are very simple and mechanical. Reviewed-by: Raag Jadav <raag.jadav@intel.com> Link: https://patch.msgid.link/20251029-gt-throttle-cri-v3-5-d1f5abbb8114@intel.com Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>