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2026-01-06dt-bindings: arm: rockchip: fix description for Radxa CM5FUKAUMI Naoki
"Radxa CM5" is the correct name[1], so fix the description. While at it, move the CM5 entry after the CM3I. [1] https://dl.radxa.com/cm5/radxa_cm5_product_brief.pdf Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251229045838.2917-2-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-01-06dt-bindings: arm: rockchip: fix description for Radxa CM3IFUKAUMI Naoki
"Radxa CM3I" is the correct name[1], so fix the description. [1] https://dl.radxa.com/cm3i/docs/hw/radxa_cm3i_product_brief.pdf Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251229045838.2917-1-naoki@radxa.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-01-06ASoC: codecs: wsa88xx: fix codec initialisationMark Brown
Merge series from Johan Hovold <johan@kernel.org>: The soundwire update_status() callback may be called multiple times with the same ATTACHED status but initialisation should only be done when transitioning from UNATTACHED to ATTACHED. This series fixes the Qualcomm wsa88xx codec drivers that do unnecessary reinitialisation or potentially fail to initialise at all. Included is also a related clean up suppressing a related codec variant printk.
2026-01-06spi: st: use pm_ptr and remove __maybe_unusedMark Brown
Merge series from Alain Volmat <alain.volmat@foss.st.com>: Update ST related SPI drivers in order to remove the __maybe_unused statements on pm related functions thanks to the usage of pm_ptr.
2026-01-06Documentation/x86: Update IOMMU spec references to use stable identifiersRichard Lyu
Direct URLs to vendor specifications for Intel VT-d and AMD IOMMU are frequently changed by vendors, leading to broken links in the documentation. Replace the fragile URLs with persistent identifiers, providing the official document titles and IDs. This ensures users can locate the relevant specifications regardless of vendor website restructuring. Signed-off-by: Richard Lyu <richard.lyu@suse.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Link: https://patch.msgid.link/20260106052815.46114-1-richard.lyu@suse.com
2026-01-06dt-bindings: gpio: spacemit: add compatible name for K3 SoCYixun Lan
Add new compatible string for SpacemiT K3 SoC's GPIO controller. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20260106-02-k3-gpio-v3-1-4800c214810b@gentoo.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2026-01-06ASoC: dt-bindings: everest,es8316: Add interrupt supportRob Herring (Arm)
The Everest ES8316 has interrupt capability on its GPIO3 pin for headphone detection. Several of the RockPi 4 variants are using it already. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260105193203.3166320-1-robh@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-01-06dt-bindings: soc: samsung: exynos-pmu: Drop unnecessary select schemaRob Herring (Arm)
The "select" schema is not necessary because "syscon" compatible is already excluded from the default select logic. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260105212858.3454174-1-robh@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-01-06media: Documentation: mali-c55: Use v4l2-isp version identifierJacopo Mondi
The Mali C55 driver uses the v4l2-isp framework, which defines its own versioning numbers. Do not use the Mali C55 specific version identifier in the code example in the documentation of the Mali C55 stats and params metadata formats. Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com> Reviewed-by: Daniel Scally <dan.scally@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-01-06dt-bindings: display: msm: document DSI controller and phy on QCS8300Ayushi Makhija
Document DSI controller and phy on QCS8300 platform. Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/696787/ Link: https://lore.kernel.org/r/20260104134442.732876-4-quic_amakhija@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-01-06dt-bindings: msm: dsi-controller-main: document the QCS8300 DSI CTRLAyushi Makhija
QCS8300 MDSS DSI controller reuses the same IP as SA8775P, with identical register layout and programming model. Introduce a QCS8300-specific compatible with a fallback to `qcom,sa8775p-dsi-ctrl` to reflect this hardware reuse. Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/696784/ Link: https://lore.kernel.org/r/20260104134442.732876-3-quic_amakhija@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-01-06dt-bindings: display: msm-dsi-phy-7nm: document the QCS8300 DSI PHYAyushi Makhija
QCS8300 uses the same 5nm MDSS DSI PHY IP as SA8775P, sharing an identical register layout and programming model. Introduce a QCS8300-specific compatible with a fallback to `qcom,sa8775p-dsi-phy-5nm` to reflect this hardware reuse. Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/696783/ Link: https://lore.kernel.org/r/20260104134442.732876-2-quic_amakhija@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-01-05netlink: specs: netdev: clarify the page pool API a littleJakub Kicinski
The phrasing of the page-pool-get doc is very confusing. It's supposed to highlight that support depends on the driver doing its part but it sounds like orphaned page pools won't be visible. The description of the ifindex is completely wrong. We move the page pool to loopback and skip the attribute if ifindex is loopback. Link: https://lore.kernel.org/20260104084347.5de3a537@kernel.org Reviewed-by: Donald Hunter <donald.hunter@gmail.com> Acked-by: Jesper Dangaard Brouer <hawk@kernel.org> Link: https://patch.msgid.link/20260104165232.710460-1-kuba@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-01-05dt-bindings: arm: qcom: Add Milos and The Fairphone (Gen. 6)Luca Weiss
Document the Milos-based The Fairphone (Gen. 6) smartphone. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20251210-sm7635-fp6-initial-v4-4-b05fddd8b45c@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-05dt-bindings: qcom,pdc: document the Milos Power Domain ControllerLuca Weiss
Document the Power Domain Controller on the Milos SoC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20251210-sm7635-fp6-initial-v4-3-b05fddd8b45c@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-05dt-bindings: crypto: qcom,prng: document MilosLuca Weiss
Document Milos SoC compatible for the True Random Number Generator. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20251210-sm7635-fp6-initial-v4-2-b05fddd8b45c@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-05Documentation/amdgpu: Add UMA carveout detailsYo-Jung Leo Lin (AMD)
Add documentation for the uma/carveout_options and uma/carveout attributes in sysfs Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Yo-Jung Leo Lin (AMD) <Leo.Lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05coresight: tpda: add sysfs node to flush specific portTao Zhang
Setting bit i in the TPDA_FLUSH_CR register initiates a flush request for port i, forcing the data to synchronize and be transmitted to the sink device. Signed-off-by: Tao Zhang <tao.zhang@oss.qualcomm.com> Reviewed-by: James Clark <james.clark@linaro.org> Co-developed-by: Jie Gan <jie.gan@oss.qualcomm.com> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com> [ Fix kernel version in Documentation ] Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251223-add_sysfs_nodes_to_configure_tpda-v8-4-4c95db608b62@oss.qualcomm.com
2026-01-05coresight: tpda: add logic to configure TPDA_SYNCR registerTao Zhang
The TPDA_SYNC counter tracks the number of bytes transferred from the aggregator. When this count reaches the value programmed in the TPDA_SYNCR register, an ASYNC request is triggered, allowing userspace tools to accurately parse each valid packet. Signed-off-by: Tao Zhang <tao.zhang@oss.qualcomm.com> Reviewed-by: James Clark <james.clark@linaro.org> Co-developed-by: Jie Gan <jie.gan@oss.qualcomm.com> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com> [ Fix kernel version in Documentation ] Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251223-add_sysfs_nodes_to_configure_tpda-v8-3-4c95db608b62@oss.qualcomm.com
2026-01-05coresight: tpda: add global_flush_req sysfs nodeJie Gan
Setting the global_flush_req register to 1 initiates a flush request for all enabled TPDA input ports. The register remains set until the flush operation is complete. Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com> [ Fix kernel version in the Documentation ] Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251223-add_sysfs_nodes_to_configure_tpda-v8-2-4c95db608b62@oss.qualcomm.com
2026-01-05coresight: tpda: add sysfs nodes for tpda cross-trigger configurationTao Zhang
Introduce sysfs nodes to configure cross-trigger parameters for TPDA. These registers define the characteristics of cross-trigger packets, including generation frequency and flag values. Signed-off-by: Tao Zhang <tao.zhang@oss.qualcomm.com> Reviewed-by: James Clark <james.clark@linaro.org> Co-developed-by: Jie Gan <jie.gan@oss.qualcomm.com> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com> [ Fix kernel version in the Documentation ] Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20251223-add_sysfs_nodes_to_configure_tpda-v8-1-4c95db608b62@oss.qualcomm.com
2026-01-05compiler-context-analysis: Remove __cond_lock() function-like helperMarco Elver
As discussed in [1], removing __cond_lock() will improve the readability of trylock code. Now that Sparse context tracking support has been removed, we can also remove __cond_lock(). Change existing APIs to either drop __cond_lock() completely, or make use of the __cond_acquires() function attribute instead. In particular, spinlock and rwlock implementations required switching over to inline helpers rather than statement-expressions for their trylock_* variants. Suggested-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/all/20250207082832.GU7145@noisy.programming.kicks-ass.net/ [1] Link: https://patch.msgid.link/20251219154418.3592607-25-elver@google.com
2026-01-05compiler-context-analysis: Remove Sparse supportMarco Elver
Remove Sparse support as discussed at [1]. The kernel codebase is still scattered with numerous places that try to appease Sparse's context tracking ("annotation for sparse", "fake out sparse", "work around sparse", etc.). Eventually, as more subsystems enable Clang's context analysis, these places will show up and need adjustment or removal of the workarounds altogether. Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/all/20250207083335.GW7145@noisy.programming.kicks-ass.net/ [1] Link: https://lore.kernel.org/all/Z6XTKTo_LMj9KmbY@elver.google.com/ [2] Link: https://patch.msgid.link/20251219154418.3592607-24-elver@google.com
2026-01-05locking/ww_mutex: Support Clang's context analysisMarco Elver
Add support for Clang's context analysis for ww_mutex. The programming model for ww_mutex is subtly more complex than other locking primitives when using ww_acquire_ctx. Encoding the respective pre-conditions for ww_mutex lock/unlock based on ww_acquire_ctx state using Clang's context analysis makes incorrect use of the API harder. Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251219154418.3592607-21-elver@google.com
2026-01-05locking/local_lock: Support Clang's context analysisMarco Elver
Add support for Clang's context analysis for local_lock_t and local_trylock_t. Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251219154418.3592607-20-elver@google.com
2026-01-05locking/rwsem: Support Clang's context analysisMarco Elver
Add support for Clang's context analysis for rw_semaphore. Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251219154418.3592607-18-elver@google.com
2026-01-05srcu: Support Clang's context analysisMarco Elver
Add support for Clang's context analysis for SRCU. Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Paul E. McKenney <paulmck@kernel.org> Link: https://patch.msgid.link/20251219154418.3592607-16-elver@google.com
2026-01-05rcu: Support Clang's context analysisMarco Elver
Improve the existing annotations to properly support Clang's context analysis. The old annotations distinguished between RCU, RCU_BH, and RCU_SCHED; however, to more easily be able to express that "hold the RCU read lock" without caring if the normal, _bh(), or _sched() variant was used we'd have to remove the distinction of the latter variants: change the _bh() and _sched() variants to also acquire "RCU". When (and if) we introduce context locks to denote more generally that "IRQ", "BH", "PREEMPT" contexts are disabled, it would make sense to acquire these instead of RCU_BH and RCU_SCHED respectively. The above change also simplified introducing __guarded_by support, where only the "RCU" context lock needs to be held: introduce __rcu_guarded, where Clang's context analysis warns if a pointer is dereferenced without any of the RCU locks held, or updated without the appropriate helpers. The primitives rcu_assign_pointer() and friends are wrapped with context_unsafe(), which enforces using them to update RCU-protected pointers marked with __rcu_guarded. Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Paul E. McKenney <paulmck@kernel.org> Link: https://patch.msgid.link/20251219154418.3592607-15-elver@google.com
2026-01-05bit_spinlock: Support Clang's context analysisMarco Elver
The annotations for bit_spinlock.h have simply been using "bitlock" as the token. For Sparse, that was likely sufficient in most cases. But Clang's context analysis is more precise, and we need to ensure we can distinguish different bitlocks. To do so, add a token context, and a macro __bitlock(bitnum, addr) that is used to construct unique per-bitlock tokens. Add the appropriate test. <linux/list_bl.h> is implicitly included through other includes, and requires 2 annotations to indicate that acquisition (without release) and release (without prior acquisition) of its bitlock is intended. Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251219154418.3592607-14-elver@google.com
2026-01-05locking/seqlock: Support Clang's context analysisMarco Elver
Add support for Clang's context analysis for seqlock_t. Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251219154418.3592607-12-elver@google.com
2026-01-05locking/mutex: Support Clang's context analysisMarco Elver
Add support for Clang's context analysis for mutex. Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251219154418.3592607-11-elver@google.com
2026-01-05locking/rwlock, spinlock: Support Clang's context analysisMarco Elver
Add support for Clang's context analysis for raw_spinlock_t, spinlock_t, and rwlock. This wholesale conversion is required because all three of them are interdependent. To avoid warnings in constructors, the initialization functions mark a lock as acquired when initialized before guarded variables. The test verifies that common patterns do not generate false positives. Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251219154418.3592607-9-elver@google.com
2026-01-05Documentation: Add documentation for Compiler-Based Context AnalysisMarco Elver
Adds documentation in Documentation/dev-tools/context-analysis.rst, and adds it to the index. Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20251219154418.3592607-5-elver@google.com
2026-01-05dt-bindings: cache: qcom,llcc: Remove duplicate llcc7_base for GlymurPankaj Patil
Drop redundant llcc7_base entry from Glymur LLCC reg-items Fixes: bd0b8028ce5f ("dt-bindings: cache: qcom,llcc: Document Glymur LLCC block") Signed-off-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260105130050.1062903-1-pankaj.patil@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-05media: dt-bindings: nxp,imx8-jpeg: Document optional SRAM supportMarek Vasut
Document optional phandle to mmio-sram, which can describe an SRAM region used for descriptor storage instead of regular DRAM region. Use of SRAM instead of DRAM for descriptor storage may improve bus access pattern and performance. Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-01-05docs: fix PPR for AMD EPYC broken linkHaiyue Wang
As 'AMD Documentation Hub' [1] announced: "All technical documentation, including for AMD EPYC™ processors ..., and more is now hosted on the AMD Technical Information Portal (TIP) [2]". By searching the No.55898, update the new URL. [1] https://www.amd.com/en/search/documentation/hub.html [2] https://docs.amd.com/ Signed-off-by: Haiyue Wang <haiyuewa@163.com> Acked-by: Bagas Sanjaya <bagasdotme@gmail.com> Link: https://patch.msgid.link/20251230133101.14362-1-haiyuewa@163.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-01-05docs: alienware-wmi: fix typoAkiyoshi Kurita
Fix a typo in the manual fan control description ("aproximate" -> "approximate"). Signed-off-by: Akiyoshi Kurita <weibu@redadmin.org> Reviewed-by: Bagas Sanjaya <bagasdotme@gmail.com> Reviewed-by: Kurt Borja <kuurtb@gmail.com> Link: https://patch.msgid.link/20251230213431.656106-1-weibu@redadmin.org Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-01-05spi: dt-bindings: at91: add microchip,lan9691-spiRobert Marko
Document Microchip LAN969x SPI compatible. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251229184004.571837-5-robert.marko@sartura.hr Signed-off-by: Mark Brown <broonie@kernel.org>
2026-01-05ASoC: dt-bindings: realtek,rt5575: add support for ALC5575Oder Chiou
Audio codec with I2S, I2C and SPI. Signed-off-by: Oder Chiou <oder_chiou@realtek.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/cad38383a8f4c7235158779c270fee7f61bf6cfe.1767148150.git.oder_chiou@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-01-05ASoC: dt-bindings: ES8389: Add property about power supplyZhang Yi
Add VDDA supply and VDDD supply Signed-off-by: Zhang Yi <zhangyi@everest-semi.com> Link: https://patch.msgid.link/20260105091548.4196-2-zhangyi@everest-semi.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-01-05Merge back a commit related to system sleep for 6.20Rafael J. Wysocki
2026-01-05dt-bindings: PCI: qcom,pcie-apq8084: Move APQ8084 to dedicated schemaKrzysztof Kozlowski
Move APQ8084 PCIe devices from qcom,pcie.yaml binding to a dedicated file to make reviewing and maintenance easier. New schema is equivalent to the old one with few changes: - Adding a required compatible, which is actually redundant. - Drop the really obvious comments next to clock/reg/reset-names items. After moving the qcom,pcie.yaml becames empty thus can be entirely removed. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251217-dt-bindings-pci-qcom-v2-12-873721599754@oss.qualcomm.com
2026-01-05dt-bindings: PCI: qcom,pcie-msm8996: Move MSM8996 to dedicated schemaKrzysztof Kozlowski
Move MSM8996 PCIe devices from qcom,pcie.yaml binding to a dedicated file to make reviewing and maintenance easier. New schema is equivalent to the old one with few changes: - Adding a required compatible, which is actually redundant. - Drop the really obvious comments next to clock/reg/reset-names items. - Expecting eight MSI interrupts and one global, instead of only one, which was incomplete hardware description. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251217-dt-bindings-pci-qcom-v2-11-873721599754@oss.qualcomm.com
2026-01-05dt-bindings: PCI: qcom,pcie-apq8064: Move APQ8064 to dedicated schemaKrzysztof Kozlowski
Move APQ8064 and IPQ8064 PCIe devices from qcom,pcie.yaml binding to a dedicated file to make reviewing and maintenance easier. New schema is equivalent to the old one with few changes: - Adding a required compatible, which is actually redundant. - Drop the really obvious comments next to clock/reg/reset-names items. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251217-dt-bindings-pci-qcom-v2-10-873721599754@oss.qualcomm.com
2026-01-05dt-bindings: PCI: qcom,pcie-ipq9574: Move IPQ9574 to dedicated schemaKrzysztof Kozlowski
Move IPQ9574 and compatible PCIe devices from qcom,pcie.yaml binding to a dedicated file to make reviewing and maintenance easier. New schema is equivalent to the old one with few changes: - Adding a required compatible, which is actually redundant. - Drop the really obvious comments next to clock/reg/reset-names items. - Make last "reg" entry "mhi" a required one, because all in-tree DTS were updated to include it. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251217-dt-bindings-pci-qcom-v2-9-873721599754@oss.qualcomm.com
2026-01-05dt-bindings: PCI: qcom,pcie-ipq4019: Move IPQ4019 to dedicated schemaKrzysztof Kozlowski
Move IPQ4019 PCIe devices from qcom,pcie.yaml binding to a dedicated file to make reviewing and maintenance easier. New schema is equivalent to the old one with few changes: - Adding a required compatible, which is actually redundant. - Drop the really obvious comments next to clock/reg/reset-names items. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251217-dt-bindings-pci-qcom-v2-8-873721599754@oss.qualcomm.com
2026-01-05dt-bindings: PCI: qcom,pcie-ipq8074: Move IPQ8074 to dedicated schemaKrzysztof Kozlowski
Move IPQ8074 PCIe devices from qcom,pcie.yaml binding to a dedicated file to make reviewing and maintenance easier. New schema is equivalent to the old one with few changes: - Adding a required compatible, which is actually redundant. - Drop the really obvious comments next to clock/reg/reset-names items. - Expecting eight MSI interrupts and one global, instead of only one, which was incomplete hardware description. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251217-dt-bindings-pci-qcom-v2-7-873721599754@oss.qualcomm.com
2026-01-05dt-bindings: PCI: qcom,pcie-ipq6018: Move IPQ6018 and IPQ8074 Gen3 to ↵Krzysztof Kozlowski
dedicated schema Move IPQ6018 and IPQ8074 Gen3 (which is the same as in IPQ6018) PCIe devices from qcom,pcie.yaml binding to a dedicated file to make reviewing and maintenance easier. New schema is equivalent to the old one with few changes: - Adding a required compatible, which is actually redundant. - Drop the really obvious comments next to clock/reg/reset-names items. - Disallow legacy/incomplete description with only one interrupt and expect exactly nine of them. - Do not require power domains on IPQ6018, because old binding already does not require them for IPQ8074 Gen3, devices are the same and in-tree DTS lacks power domains. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251217-dt-bindings-pci-qcom-v2-6-873721599754@oss.qualcomm.com
2026-01-05dt-bindings: PCI: qcom,pcie-ipq5018: Move IPQ5018 to dedicated schemaKrzysztof Kozlowski
Move IPQ5018 PCIe devices from qcom,pcie.yaml binding to a dedicated file to make reviewing and maintenance easier. New schema is equivalent to the old one with few changes: - Adding a required compatible, which is actually redundant. - Drop the really obvious comments next to clock/reg/reset-names items. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251217-dt-bindings-pci-qcom-v2-5-873721599754@oss.qualcomm.com
2026-01-05dt-bindings: PCI: qcom,pcie-qcs404: Move QCS404 to dedicated schemaKrzysztof Kozlowski
Move QCS404 PCIe devices from qcom,pcie.yaml binding to a dedicated file to make reviewing and maintenance easier. New schema is equivalent to the old one with few changes: - Adding a required compatible, which is actually redundant. - Drop the really obvious comments next to clock/reg/reset-names items. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251217-dt-bindings-pci-qcom-v2-4-873721599754@oss.qualcomm.com
generated by cgit v1.2.3 (git 2.25.1) at 2026-08-16 14:10:21 +0000