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2026-01-08dt-bindings: arm: mediatek: Add Ezurio Tungsten entriesGary Bisson
Add device tree bindings support for the Ezurio Tungsten 510 (MT8370) SMARC [1] / Ezurio Tungsten 700 (MT8390) SMARC [2] + Universal SMARC carrier board [3]. [1] https://www.ezurio.com/product/tungsten510-smarc [2] https://www.ezurio.com/product/tungsten700-smarc [3] https://www.ezurio.com/system-on-module/accessories/universal-smarc-carrier Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Gary Bisson <bisson.gary@gmail.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2026-01-08dt-bindings: vendor-prefixes: Add Ezurio LLCGary Bisson
Ezurio is the new name of Laird Connectivity after it acquired Boundary Devices. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Gary Bisson <bisson.gary@gmail.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2026-01-08arm64: dts: mediatek: mt8395-genio-common: Add HDMI sound output supportLouis-Alexis Eyraud
Add in the sound node a new dai-link for ETDM3_OUT_BE to add the sound output support through the HDMI TX connector. Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2026-01-08arm64: dts: mediatek: mt8395-genio-common: Enable HDMI outputLouis-Alexis Eyraud
Add a definition for the on-board HDMI connector, enable and add the relevant configuration for the HDMI PHY and controller, and define the pins used by those. Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2026-01-08arm64: dts: mediatek: mt8395-radxa-nio-12l: Add HDMI sound output supportLouis-Alexis Eyraud
Add in the sound node a new dai-link for ETDM3_OUT_BE to add the sound output support through the HDMI TX connector. Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2026-01-08arm64: dts: mediatek: mt8395-radxa-nio-12l: Enable HDMI outputAngeloGioacchino Del Regno
Add a definition for the on-board HDMI connector, enable and add the relevant configuration for the HDMI PHY and controller, and define the pins used by those. Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2026-01-08arm64: dts: mediatek: mt8390-genio-common: Add HDMI sound output supportLouis-Alexis Eyraud
Add in the sound node a new dai-link for ETDM3_OUT_BE to add the sound output support through the HDMI connector. Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2026-01-08arm64: dts: mediatek: mt8390-genio-common: Enable HDMI outputAngeloGioacchino Del Regno
Add a node for the HDMI-A connector found on this board, then configure the display pipeline and enable the required DPI1 interface, HDMI controller, its integrated DDC and the HDMI PHY to enable support for the HDMI output provided by these EVKs. Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2026-01-08arm64: dts: mediatek: mt8188: Add DPI1, HDMI, HDMI PHY/DDC nodesAngeloGioacchino Del Regno
Add all of the nodes that are required to enable HDMI output, including ones describing the HDMI PHY, Controller and DDC, and the Digital Parallel Interface instance that is internally connected to the HDMI Controller. All of the added nodes are disabled by default as usage is board dependent. Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2026-01-08arm64: dts: mediatek: mt8195: Add DPI1, HDMI, HDMI PHY/DDC nodesAngeloGioacchino Del Regno
Add all of the nodes that are required to enable HDMI output, including ones describing the HDMI PHY, Controller and DDC, and the Digital Parallel Interface instance that is internally connected to the HDMI Controller. All of the added nodes are disabled by default as usage is board dependent. Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2026-01-08arm64: dts: mediatek: mt7981b-openwrt-one: Enable wifiSjoerd Simons
Enable Dual-band WiFI 6 functionality on the Openwrt One Signed-off-by: Sjoerd Simons <sjoerd@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2026-01-08arm64: dts: mediatek: mt7981b: Add wifi memory regionSjoerd Simons
Add required memory region for the builtin wifi block. Signed-off-by: Sjoerd Simons <sjoerd@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2026-01-08arm64: dts: mediatek: mt7981b: Disable wifi by defaultSjoerd Simons
Disable the wifi block by default as it won't function properly without at least pin muxing. This doesn't enable wifi on any of the existing mt7981b devices as a required memory-region property is missing, causing the driver to fail probing anyway. Signed-off-by: Sjoerd Simons <sjoerd@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2026-01-08arm64: dts: mediatek: mt7981b-openwrt-one: Enable EthernetSjoerd Simons
Enable the Ethernet subsystem on OpenWrt One board with dual-MAC configuration: - GMAC0: Connected to external Airoha EN8811H 2.5GbE PHY via SGMII (2500base-x mode) for WAN connectivity with LED indicators - GMAC1: Connected to internal MT7981 1GbE PHY (GMII mode) for LAN Ethernet aliases are defined to provide consistent network interface naming (ethernet0 = LAN, ethernet1 = WAN). Signed-off-by: Sjoerd Simons <sjoerd@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2026-01-08arm64: dts: mediatek: mt7981b: Add Ethernet and WiFi offload supportSjoerd Simons
Add device tree nodes for the Ethernet subsystem on MT7981B SoC, including: - Ethernet MAC controller with dual GMAC support - Wireless Ethernet Dispatch (WED) - SGMII PHY controllers for high-speed Ethernet interfaces - Reserved memory regions for WiFi offload processor Signed-off-by: Sjoerd Simons <sjoerd@collabora.com> [Angelo: Removed useless address/size cells from main eth node] Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2026-01-08wifi: mac80211: collect station statistics earlier when disconnectBaochen Qiang
In __sta_info_destroy_part2(), station statistics are requested after the IEEE80211_STA_NONE -> IEEE80211_STA_NOTEXIST transition. This is problematic because the driver may be unable to handle the request due to the STA being in the NOTEXIST state (i.e. if the driver destroys the underlying data when transitioning to NOTEXIST). Move the statistics collection to before the state transition to avoid this issue. Signed-off-by: Baochen Qiang <baochen.qiang@oss.qualcomm.com> Link: https://patch.msgid.link/20251222-mac80211-move-station-stats-collection-earlier-v1-1-12cd4e42c633@oss.qualcomm.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-08wifi: mac80211: restore non-chanctx injection behaviourJohannes Berg
During the transition to use channel contexts throughout, the ability to do injection while in monitor mode concurrent with another interface was lost, since the (virtual) monitor won't have a chanctx assigned in this scenario. It's harder to fix drivers that actually transitioned to using channel contexts themselves, such as mt76, but it's easy to do those that are (still) just using the emulation. Do that. Cc: stable@vger.kernel.org Link: https://bugzilla.kernel.org/show_bug.cgi?id=218763 Reported-and-tested-by: Oscar Alfonso Diaz <oscar.alfonso.diaz@gmail.com> Fixes: 0a44dfc07074 ("wifi: mac80211: simplify non-chanctx drivers") Link: https://patch.msgid.link/20251216105242.18366-2-johannes@sipsolutions.net Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-08wifi: mac80211_hwsim: disable BHs for hwsim_radio_lockBenjamin Berg
The hwsim_radio_lock spinlock expects bottom-half to be disabled, fix the call in mac80211_hwsim_nan_stop to ensure BHs are disabled. Signed-off-by: Benjamin Berg <benjamin.berg@intel.com> Link: https://patch.msgid.link/20260107143805.ce7406511608.I688f8b19346e94c1f8de0cdadde072054d4b861c@changeid Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-08wifi: mac80211: don't iterate not running interfacesMiri Korenblit
for_each_chanctx_user_* was introdcued as a replacement for for_each_sdata_link, which visits also other chanctx users that are not link. for_each_sdata_link skips not running interfaces, do the same for for_each_chanctx_user_* Fixes: 1ce954c98b89 ("wifi: mac80211: add and use chanctx usage iteration") Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com> Link: https://patch.msgid.link/20260107143736.55c084e2a976.I38b7b904a135dadca339321923b501b2c2c5c8c0@changeid Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-08wifi: mac80211_hwsim: fix typo in frequency notificationBenjamin Berg
The NAN notification is for 5745 MHz which corresponds to channel 149 and not 5475 which is not actually a valid channel. This could result in a NULL pointer dereference in cfg80211_next_nan_dw_notif. Fixes: a37a6f54439b ("wifi: mac80211_hwsim: Add simulation support for NAN device") Signed-off-by: Benjamin Berg <benjamin.berg@intel.com> Reviewed-by: Ilan Peer <ilan.peer@intel.com> Reviewed-by: Miriam Rachel Korenblit <miriam.rachel.korenblit@intel.com> Link: https://patch.msgid.link/20260107143652.7dab2035836f.Iacbaf7bb94ed5c14a0928a625827e4137d8bfede@changeid Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-08wifi: avoid kernel-infoleak from struct iw_pointEric Dumazet
struct iw_point has a 32bit hole on 64bit arches. struct iw_point { void __user *pointer; /* Pointer to the data (in user space) */ __u16 length; /* number of fields or size in bytes */ __u16 flags; /* Optional params */ }; Make sure to zero the structure to avoid disclosing 32bits of kernel data to user space. Fixes: 87de87d5e47f ("wext: Dispatch and handle compat ioctls entirely in net/wireless/wext.c") Reported-by: syzbot+bfc7323743ca6dbcc3d3@syzkaller.appspotmail.com Closes: https://lore.kernel.org/netdev/695f83f3.050a0220.1c677c.0392.GAE@google.com/T/#u Signed-off-by: Eric Dumazet <edumazet@google.com> Cc: stable@vger.kernel.org Link: https://patch.msgid.link/20260108101927.857582-1-edumazet@google.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-08Merge tag 'ath-next-20260105' of ↵Johannes Berg
git://git.kernel.org/pub/scm/linux/kernel/git/ath/ath Jeff Johnson says: ================== ath.git patches for v6.20 Propagate the "Next Generation" of the ath12k driver to wireless-next. NOTE TO MAINTAINERS: There is a conflict between this tree and the MHI tree. This conflict has already been resolved by Stephen Rothwell in linux-next. Please refer to his resolution comments in: https://lore.kernel.org/all/20260105154243.7cd5d049@canb.auug.org.au/ ================== Link: https://patch.msgid.link/4ba3aecf-5194-48e3-a112-31da3a8646aa@oss.qualcomm.com/ Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-08wifi: wlcore: sdio: Use pm_ptr instead of #ifdef CONFIG_PMUwe Kleine-König
This increases build coverage and removes two ugly #ifdefs. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/20251217112033.3309281-4-u.kleine-koenig@baylibre.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-08powerpc/eeh: fix recursive pci_lock_rescan_remove locking in EEH event handlingNarayana Murty N
The recent commit 1010b4c012b0 ("powerpc/eeh: Make EEH driver device hotplug safe") restructured the EEH driver to improve synchronization with the PCI hotplug layer. However, it inadvertently moved pci_lock_rescan_remove() outside its intended scope in eeh_handle_normal_event(), leading to broken PCI error reporting and improper EEH event triggering. Specifically, eeh_handle_normal_event() acquired pci_lock_rescan_remove() before calling eeh_pe_bus_get(), but eeh_pe_bus_get() itself attempts to acquire the same lock internally, causing nested locking and disrupting normal EEH event handling paths. This patch adds a boolean parameter do_lock to _eeh_pe_bus_get(), with two public wrappers: eeh_pe_bus_get() with locking enabled. eeh_pe_bus_get_nolock() that skips locking. Callers that already hold pci_lock_rescan_remove() now use eeh_pe_bus_get_nolock() to avoid recursive lock acquisition. Additionally, pci_lock_rescan_remove() calls are restored to the correct position—after eeh_pe_bus_get() and immediately before iterating affected PEs and devices. This ensures EEH-triggered PCI removes occur under proper bus rescan locking without recursive lock contention. The eeh_pe_loc_get() function has been split into two functions: eeh_pe_loc_get(struct eeh_pe *pe) which retrieves the loc for given PE. eeh_pe_loc_get_bus(struct pci_bus *bus) which retrieves the location code for given bus. This resolves lockdep warnings such as: <snip> [ 84.964298] [ T928] ============================================ [ 84.964304] [ T928] WARNING: possible recursive locking detected [ 84.964311] [ T928] 6.18.0-rc3 #51 Not tainted [ 84.964315] [ T928] -------------------------------------------- [ 84.964320] [ T928] eehd/928 is trying to acquire lock: [ 84.964324] [ T928] c000000003b29d58 (pci_rescan_remove_lock){+.+.}-{3:3}, at: pci_lock_rescan_remove+0x28/0x40 [ 84.964342] [ T928] but task is already holding lock: [ 84.964347] [ T928] c000000003b29d58 (pci_rescan_remove_lock){+.+.}-{3:3}, at: pci_lock_rescan_remove+0x28/0x40 [ 84.964357] [ T928] other info that might help us debug this: [ 84.964363] [ T928] Possible unsafe locking scenario: [ 84.964367] [ T928] CPU0 [ 84.964370] [ T928] ---- [ 84.964373] [ T928] lock(pci_rescan_remove_lock); [ 84.964378] [ T928] lock(pci_rescan_remove_lock); [ 84.964383] [ T928] *** DEADLOCK *** [ 84.964388] [ T928] May be due to missing lock nesting notation [ 84.964393] [ T928] 1 lock held by eehd/928: [ 84.964397] [ T928] #0: c000000003b29d58 (pci_rescan_remove_lock){+.+.}-{3:3}, at: pci_lock_rescan_remove+0x28/0x40 [ 84.964408] [ T928] stack backtrace: [ 84.964414] [ T928] CPU: 2 UID: 0 PID: 928 Comm: eehd Not tainted 6.18.0-rc3 #51 VOLUNTARY [ 84.964417] [ T928] Hardware name: IBM,9080-HEX POWER10 (architected) 0x800200 0xf000006 of:IBM,FW1060.00 (NH1060_022) hv:phyp pSeries [ 84.964419] [ T928] Call Trace: [ 84.964420] [ T928] [c0000011a7157990] [c000000001705de4] dump_stack_lvl+0xc8/0x130 (unreliable) [ 84.964424] [ T928] [c0000011a71579d0] [c0000000002f66e0] print_deadlock_bug+0x430/0x440 [ 84.964428] [ T928] [c0000011a7157a70] [c0000000002fd0c0] __lock_acquire+0x1530/0x2d80 [ 84.964431] [ T928] [c0000011a7157ba0] [c0000000002fea54] lock_acquire+0x144/0x410 [ 84.964433] [ T928] [c0000011a7157cb0] [c0000011a7157cb0] __mutex_lock+0xf4/0x1050 [ 84.964436] [ T928] [c0000011a7157e00] [c000000000de21d8] pci_lock_rescan_remove+0x28/0x40 [ 84.964439] [ T928] [c0000011a7157e20] [c00000000004ed98] eeh_pe_bus_get+0x48/0xc0 [ 84.964442] [ T928] [c0000011a7157e50] [c000000000050434] eeh_handle_normal_event+0x64/0xa60 [ 84.964446] [ T928] [c0000011a7157f30] [c000000000051de8] eeh_event_handler+0xf8/0x190 [ 84.964450] [ T928] [c0000011a7157f90] [c0000000002747ac] kthread+0x16c/0x180 [ 84.964453] [ T928] [c0000011a7157fe0] [c00000000000ded8] start_kernel_thread+0x14/0x18 </snip> Fixes: 1010b4c012b0 ("powerpc/eeh: Make EEH driver device hotplug safe") Signed-off-by: Narayana Murty N <nnmlinux@linux.ibm.com> Reviewed-by: Sourabh Jain <sourabhjain@linux.ibm.com> Reviewed-by: Mahesh Salgaonkar <mahesh@linux.ibm.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20251210142559.8874-1-nnmlinux@linux.ibm.com
2026-01-08powerpc/pseries: Fix MSI-X allocation failure when quota is exceededNam Cao
Nilay reported that since commit daaa574aba6f ("powerpc/pseries/msi: Switch to msi_create_parent_irq_domain()"), the NVMe driver cannot enable MSI-X when the device's MSI-X table size is larger than the firmware's MSI quota for the device. This is because the commit changes how rtas_prepare_msi_irqs() is called: - Before, it is called when interrupts are allocated at the global interrupt domain with nvec_in being the number of allocated interrupts. rtas_prepare_msi_irqs() can return a positive number and the allocation will be retried. - Now, it is called at the creation of per-device interrupt domain with nvec_in being the number of interrupts that the device supports. If rtas_prepare_msi_irqs() returns positive, domain creation just fails. For Nilay's NVMe driver case, rtas_prepare_msi_irqs() returns a positive number (the quota). This causes per-device interrupt domain creation to fail and thus the NVMe driver cannot enable MSI-X. Rework to make this scenario works again: - pseries_msi_ops_prepare() only prepares as many interrupts as the quota permit. - pseries_irq_domain_alloc() fails if the device's quota is exceeded. Now, if the quota is exceeded, pseries_msi_ops_prepare() will only prepare as allowed by the quota. If device drivers attempt to allocate more interrupts than the quota permits, pseries_irq_domain_alloc() will return an error code and msi_handle_pci_fail() will allow device drivers a retry. Reported-by: Nilay Shroff <nilay@linux.ibm.com> Closes: https://lore.kernel.org/linuxppc-dev/6af2c4c2-97f6-4758-be33-256638ef39e5@linux.ibm.com/ Fixes: daaa574aba6f ("powerpc/pseries/msi: Switch to msi_create_parent_irq_domain()") Signed-off-by: Nam Cao <namcao@linutronix.de> Cc: stable@vger.kernel.org Tested-by: Nilay Shroff <nilay@linux.ibm.com> Acked-by: Nilay Shroff <nilay@linux.ibm.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20260107100230.1466093-1-namcao@linutronix.de
2026-01-08wifi: cfg80211: Fix use_for flag update on BSS refreshHuang Chenming
Userspace may fail to connect to certain BSS that were initially marked as unusable due to regulatory restrictions (use_for = 0, e.g., 6 GHz power type mismatch). Even after these restrictions are removed and the BSS becomes usable, connection attempts still fail. The issue occurs in cfg80211_update_known_bss() where the use_for flag is updated using bitwise AND (&=) instead of direct assignment. Once a BSS is marked with use_for = 0, the AND operation masks out any subsequent non-zero values, permanently keeping the flag at 0. This causes __cfg80211_get_bss(), invoked by nl80211_assoc_bss(), to fail the check "(bss->pub.use_for & use_for) != use_for", thereby blocking association. Replace the bitwise AND operation with direct assignment so the use_for flag accurately reflects the current BSS state. Fixes: d02a12b8e4bb ("wifi: cfg80211: add BSS usage reporting") Signed-off-by: Huang Chenming <chenming.huang@oss.qualcomm.com> Link: https://patch.msgid.link/20251209025733.2098456-1-chenming.huang@oss.qualcomm.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-08wifi: brcmfmac: rename function that frees vifRafał Miłecki
Since the commit cf124db566e6 ("net: Fix inconsistent teardown and release of private netdev state.") netdev isn't freed anymore in the brcmf_cfg80211_free_netdev(). Adjust this function name to match what it actually does (freeing vif). Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Arend van Spriel <arend.vanspriel@broadcom.com> Link: https://patch.msgid.link/20251215103817.29598-1-zajec5@gmail.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-08wifi: brcmfmac: fix/add kernel-doc commentsRandy Dunlap
Correct or add kernel-doc comments for: - an enum name typo - missing struct member comments in struct vif_saved_ie and struct brcmf_cfg80211_vif fixing these warnings: Warning: drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.h:195 Enum value 'BRCMF_VIF_STATUS_EAP_SUCCESS' not described in enum 'brcmf_vif_status' Warning: drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.h:195 Excess enum value '@BRCMF_VIF_STATUS_EAP_SUCCUSS' description in 'brcmf_vif_status' Warning: drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.h:220 struct member 'assoc_req_ie' not described in 'vif_saved_ie' Warning: drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.h:220 struct member 'assoc_req_ie_len' not described in 'vif_saved_ie' Warning: drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.h:255 struct member 'saved_ie' not described in 'brcmf_cfg80211_vif' Warning: drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.h:255 struct member 'is_11d' not described in 'brcmf_cfg80211_vif' kernel-doc warnings for missing struct member descriptions in struct brcmf_cfg80211_info and struct brcmf_cfg80211_profile are still present. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Arend van Spriel <arend.vanspriel@broadcom.com> Link: https://patch.msgid.link/20251129073803.1814384-1-rdunlap@infradead.org Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-08Merge branch 'net-phy-realtek-various-improvements-for-2-5ge-phys'Paolo Abeni
Daniel Golle says: ==================== net: phy: realtek: various improvements for 2.5GE PHYs This series improves the RealTek PHY driver, mostly for 2.5GE PHYs. It implements configuring SGMII and 2500Base-X in-band auto-negotiation and improves using the PHYs in Clause-22-only mode. Note that the rtl822x_serdes_write() function introduced by this series is going to be reused to configure polarities of SerDes RX and TX lanes once series "PHY polarity inversion via generic device tree properties" has been applied. Access to other registers on MDIO_MMD_VEND2 is important for more than just configuring autonegotiation, it is also used to setup ALDPS or to disable the PHY responding to the MDIO broadcast address 0. Both will be implemented by follow-up patches. The address translation function for registers on MDIO_MMD_VEND2 into paged registers can potentially also be used to describe other paged access in a more consistent way, but that mostly makes sense on PHYs which also support Clause-45, so this series doesn't convert all the existing paged access on RealTek's 1GE PHYs which do not support Clause-45. ==================== Link: https://patch.msgid.link/cover.1767630451.git.daniel@makrotopia.org Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-01-08net: phy: realtek: get rid of magic number in rtlgen_read_status()Daniel Golle
Use newly introduced helper macros RTL822X_VND2_TO_PAGE and RTL822X_VND2_TO_PAGE_REG to access RTL_VEND2_PHYSR register over Clause-22 paged access instead of using magic numbers. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Link: https://patch.msgid.link/a53d4577335fdda4d363db9bc4bf614fd3a56c9b.1767630451.git.daniel@makrotopia.org Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-01-08net: phy: realtek: use paged access for MDIO_MMD_VEND2 in C22 modeDaniel Golle
RTL822x cannot access MDIO_MMD_VEND2 via MII_MMD_CTRL/MII_MMD_DATA. A mapping to use paged access needs to be used instead. All other MMD devices can be accessed as usual. Implement phy_read_mmd and phy_write_mmd using paged access for MDIO_MMD_VEND2 in Clause-22 mode instead of relying on MII_MMD_CTRL/MII_MMD_DATA. This allows eg. rtl822x_config_aneg to work as expected in case the MDIO bus doesn't support Clause-45 access. Suggested-by: Bevan Weiss <bevan.weiss@gmail.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Link: https://patch.msgid.link/25aab7f02dac7c6022171455523e3db1435b0881.1767630451.git.daniel@makrotopia.org Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-01-08net: phy: move mmd_phy_read and mmd_phy_write to phylib.hDaniel Golle
Helper functions mmd_phy_read and mmd_phy_write are useful for PHYs which require custom MMD access functions for some but not all MMDs. Move mmd_phy_read and mmd_phy_write function prototypes from phylib-internal.h to phylib.h to make them available for PHY drivers. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/79169cd624a3572d426e42c7b13cd2654a35d0cb.1767630451.git.daniel@makrotopia.org Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-01-08net: phy: realtek: implement configuring in-band anDaniel Golle
Implement the inband_caps() and config_inband() PHY driver methods to allow configuring the use of in-band-status with SGMII and 2500Base-X on RTL8226 and RTL8221B 2.5GE PHYs. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Link: https://patch.msgid.link/82a78a06d67be19e856d646cf880b2021ea9d837.1767630451.git.daniel@makrotopia.org Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-01-08net: phy: realtek: fix whitespace in struct phy_driver initializersDaniel Golle
Consistently use tabs instead of spaces in struct phy_driver initializers. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Link: https://patch.msgid.link/42b0fac53c5c5646707ce3f3a6dacd2bc082a5b2.1767630451.git.daniel@makrotopia.org Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-01-08wifi: mac80211: Update csa_finalize to use link_idAditya Kumar Singh
With cfg80211_stop_link() adding support to stop a link in AP/P2P_GO mode, in failure cases only the corresponding link can be stopped, instead of stopping the whole interface. Hence, invoke cfg80211_stop_link() directly with the link_id set for AP/P2P_GO mode when CSA finalization fails. Signed-off-by: Aditya Kumar Singh <aditya.kumar.singh@oss.qualcomm.com> Signed-off-by: Manish Dharanenthiran <manish.dharanenthiran@oss.qualcomm.com> Link: https://patch.msgid.link/20251127-stop_link-v2-2-43745846c5fd@qti.qualcomm.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-08wifi: cfg80211: add cfg80211_stop_link() for per-link teardownManish Dharanenthiran
Currently, whenever cfg80211_stop_iface() is called, the entire iface is stopped. However, there could be a need in AP/P2P_GO mode, where one would like to stop a single link in MLO operation instead of the whole MLD interface. Hence, introduce cfg80211_stop_link() to allow drivers to tear down only a specified AP/P2P_GO link during MLO operation. Passing -1 preserves the existing behavior of stopping the whole interface. Make cfg80211_stop_iface() call this function by passing -1 to keep the default behavior the same, that is, to stop all links and use cfg80211_stop_link() with the desired link_id for AP/P2P_GO mode, to stop only that link. This brings no behavioral change for single-link/non-MLO interfaces, and enables drivers to stop an AP/P2P_GO link without disrupting other links on the same interface. Signed-off-by: Manish Dharanenthiran <manish.dharanenthiran@oss.qualcomm.com> Link: https://patch.msgid.link/20251127-stop_link-v2-1-43745846c5fd@qti.qualcomm.com [make cfg80211_stop_iface() inline] Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-01-08Merge branch 'net-dsa-microchip-adjust-ptp-handling-to-ease-ksz8463-integration'Paolo Abeni
Bastien Curutchet says: ==================== net: dsa: microchip: Adjust PTP handling to ease KSZ8463 integration This series aims to make the PTP handling a bit more generic to ease the addition of PTP support for the KSZ8463 in an upcoming series. It is not intented to change any behaviour in the driver here. Patches 1 & 2 focus on IRQ handling. Patches 3 to 9 focus on register access. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> ==================== Link: https://patch.msgid.link/20260105-ksz-rework-v1-0-a68df7f57375@bootlin.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-01-08net: dsa: microchip: Wrap timestamp reading in a functionBastien Curutchet (Schneider Electric)
Timestamps are directly accessed through a register read in the interrupt handler. KSZ8463's logic to access it will be a bit more complex because the same interrupt can be triggered by two different timestamps being ready. Wrap the timestamp's reading in a dedicated function to ease the KSZ8463's integration in upcoming patches. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260105-ksz-rework-v1-9-a68df7f57375@bootlin.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-01-08net: dsa: microchip: Use regs[] to access REG_PTP_MSG_CONF1Bastien Curutchet (Schneider Electric)
Accesses to the PTP_MSG_CONF1 register are done through a hardcoded address which doesn't match with the KSZ8463's register layout. Add a new entry for the PTP_MSG_CONF1 register in the regs[] tables. Use the regs[] table to retrieve the PTP_MSG_CONF1 register address when accessing it. Remove the macro defining the address to prevent further use. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260105-ksz-rework-v1-8-a68df7f57375@bootlin.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-01-08net: dsa: microchip: Use regs[] to access REG_PTP_SUBNANOSEC_RATEBastien Curutchet (Schneider Electric)
Accesses to the PTP_SUBNANOSEC_RATE register are done through a hardcoded address which doesn't match with the KSZ8463's register layout. Add a new entry for the PTP_SUBNANOSEC_RATE register in the regs[] tables. Use the regs[] table to retrieve the PTP_SUBNANOSEC_RATE register address when accessing it. Remove the macro defining the address to prevent further use. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260105-ksz-rework-v1-7-a68df7f57375@bootlin.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-01-08net: dsa: microchip: Use regs[] to access REG_PTP_RTC_SUB_NANOSECBastien Curutchet (Schneider Electric)
Accesses to the PTP_RTC_SUB_NANOSEC register are done through a hardcoded address which doesn't match with the KSZ8463's register layout. Add a new entry for the PTP_RTC_SUB_NANOSEC register in the regs[] tables. Use the regs[] table to retrieve the PTP_RTC_SUB_NANOSEC register address when accessing it. Remove the macro defining the address to prevent further use. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260105-ksz-rework-v1-6-a68df7f57375@bootlin.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-01-08net: dsa: microchip: Use regs[] to access REG_PTP_RTC_SECBastien Curutchet (Schneider Electric)
Accesses to the PTP_RTC_SEC register are done through a hardcoded address which doesn't match with the KSZ8463's register layout. Add a new entry for the PTP_RTC_SEC register in the regs[] tables. Use the regs[] table to retrieve the PTP_RTC_SEC register address when accessing it. Remove the macro defining the address to prevent further use. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260105-ksz-rework-v1-5-a68df7f57375@bootlin.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-01-08net: dsa: microchip: Use regs[] to access REG_PTP_RTC_NANOSECBastien Curutchet (Schneider Electric)
Accesses to the PTP_RTC_NANOSEC register are done through a hardcoded address which doesn't match with the KSZ8463's register layout. Add a new entry for the PTP_RTC_NANOSEC register in the regs[] tables. Use the regs[] table to retrieve the PTP_RTC_NANOSEC register address when accessing it. Remove the macro defining the address to prevent further use. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260105-ksz-rework-v1-4-a68df7f57375@bootlin.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-01-08net: dsa: microchip: Use regs[] to access REG_PTP_CLK_CTRLBastien Curutchet (Schneider Electric)
Accesses to the PTP_CLK_CTRL register are done through a hardcoded address which doesn't match with the KSZ8463's register layout. Add a new entry for the PTP_CLK_CTRL register in the regs[] tables. Use the regs[] table to retrieve the PTP_CLK_CTRL register address when accessing it. Remove the macro defining the address to prevent further use. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260105-ksz-rework-v1-3-a68df7f57375@bootlin.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-01-08net: dsa: microchip: Use dynamic irq offsetBastien Curutchet (Schneider Electric)
The PTP irq_chip operations use an hardcoded IRQ offset in the bit logic. This IRQ offset isn't the same on KSZ8463 than on others switches so it can't use the irq_chip operations. Convey the interrupt bit offset through a new attribute in struct ksz_irq Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260105-ksz-rework-v1-2-a68df7f57375@bootlin.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-01-08net: dsa: microchip: Initialize IRQ's mask outside common_setup()Bastien Curutchet (Schneider Electric)
The IRQ logic of the KSZ8463 differs from that of other KSZ switches. It doesn't have a 'mask' register but an 'enable' one instead. The common IRQ framework can still be used though as soon as we reverse the logic (using '1' to enable interrupts instead of '0') for KSZ8463 cases. Move the initialization of the kirq->masked outside of ksz_irq_common_setup() to keep this function truly common when IRQ support for the KSZ8463 is added. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260105-ksz-rework-v1-1-a68df7f57375@bootlin.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-01-08sched: Further restrict the preemption modesPeter Zijlstra
The introduction of PREEMPT_LAZY was for multiple reasons: - PREEMPT_RT suffered from over-scheduling, hurting performance compared to !PREEMPT_RT. - the introduction of (more) features that rely on preemption; like folio_zero_user() which can do large memset() without preemption checks. (Xen already had a horrible hack to deal with long running hypercalls) - the endless and uncontrolled sprinkling of cond_resched() -- mostly cargo cult or in response to poor to replicate workloads. By moving to a model that is fundamentally preemptable these things become managable and avoid needing to introduce more horrible hacks. Since this is a requirement; limit PREEMPT_NONE to architectures that do not support preemption at all. Further limit PREEMPT_VOLUNTARY to those architectures that do not yet have PREEMPT_LAZY support (with the eventual goal to make this the empty set and completely remove voluntary preemption and cond_resched() -- notably VOLUNTARY is already limited to !ARCH_NO_PREEMPT.) This leaves up-to-date architectures (arm64, loongarch, powerpc, riscv, s390, x86) with only two preemption models: full and lazy. While Lazy has been the recommended setting for a while, not all distributions have managed to make the switch yet. Force things along. Keep the patch minimal in case of hard to address regressions that might pop up. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Valentin Schneider <vschneid@redhat.com> Link: https://patch.msgid.link/20251219101502.GB1132199@noisy.programming.kicks-ass.net
2026-01-08sched: Reorder some fields in struct rqBlake Jones
This colocates some hot fields in "struct rq" to be on the same cache line as others that are often accessed at the same time or in similar ways. Using data from a Google-internal fleet-scale profiler, I found three distinct groups of hot fields in struct rq: - (1) The runqueue lock: __lock. - (2) Those accessed from hot code in pick_next_task_fair(): nr_running, nr_numa_running, nr_preferred_running, ttwu_pending, cpu_capacity, curr, idle. - (3) Those accessed from some other hot codepaths, e.g. update_curr(), update_rq_clock(), and scheduler_tick(): clock_task, clock_pelt, clock, lost_idle_time, clock_update_flags, clock_pelt_idle, clock_idle. The cycles spent on accessing these different groups of fields broke down roughly as follows: - 50% on group (1) (the runqueue lock, always read-write) - 39% on group (2) (load:store ratio around 38:1) - 8% on group (3) (load:store ratio around 5:1) - 3% on all the other fields Most of the fields in group (3) are already in a cache line grouping; this patch just adds "clock" and "clock_update_flags" to that group. The fields in group (2) are scattered across several cache lines; the main effect of this patch is to group them together, on a single line at the beginning of the structure. A few other less performance-critical fields (nr_switches, numa_migrate_on, has_blocked_load, nohz_csd, last_blocked_load_update_tick) were also reordered to reduce holes in the data structure. Since the runqueue lock is acquired from so many different contexts, and is basically always accessed using an atomic operation, putting it on either of the cache lines for groups (2) or (3) would slow down accesses to those fields dramatically, since those groups are read-mostly accesses. To test this, I wrote a focused load test that would put load on the pick_next_task_fair() path. A parent process would fork many child processes, and each child would nanosleep() for 1 msec many times in a loop. The load test was monitored with "perf", and I looked at the amount of cycles that were spent with sched_balance_rq() on the stack. The test was reliably spending ~5% of all of its cycles there. I ran it 100 times on a pair of 2-socket Intel Haswell machines (72 vCPUs per machine) - one running the tip of sched/core, the other running this change - using 360 child processes and 8192 1-msec sleeps per child. The mean cycle count dropped from 5.14B to 4.91B, or a *4.6% decrease* in relevant scheduler cycles. Given that this change reduces cache misses in a very hot kernel codepath, there's likely to be additional application performance improvement due to reduced cache conflicts from kernel data structures. On a Power11 system with 128-byte cache lines, my test showed a ~5% decrease in relevant scheduler cycles, along with a slight increase in user time - both positive indicators. This data comes from https://lore.kernel.org/lkml/affdc6b1-9980-44d1-89db-d90730c1e384@linux.ibm.com/ This is the case even though the additional "____cacheline_aligned" that puts the runqueue lock on the next cache line adds an additional 64 bytes of padding on those machines. This patch does not change the size of "struct rq" on machines with 64-byte cache lines. I also ran "hackbench" to try to test this change, but it didn't show conclusive results. Looking at a CPU cycle profile of the hackbench run, it was spending 95% of its cycles inside __alloc_skb(), __kfree_skb(), or kmem_cache_free() - almost all of which was spent updating memcg counters or contending on the list_lock in kmem_cache_node. And it spent less than 0.5% of its cycles inside either schedule() or try_to_wake_up(). So it's not surprising that it didn't show useful results here. The "__no_randomize_layout" was added to reflect the fact that performance of code that references this data structure is unusually sensitive to placement of its members. Signed-off-by: Blake Jones <blakejones@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Madadi Vineeth Reddy <vineethr@linux.ibm.com> Reviewed-by: Josh Don <joshdon@google.com> Tested-by: Madadi Vineeth Reddy <vineethr@linux.ibm.com> Link: https://patch.msgid.link/20251202023743.1524247-1-blakejones@google.com
2026-01-08sched/fair: Use cpumask_weight_and() in sched_balance_find_dst_group()Yury Norov (NVIDIA)
In the group_has_spare case, the function creates a temporary cpumask to just calculate weight of (p->cpus_ptr & sched_group_span(local)). We've got a dedicated helper for it. Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Vincent Guittot <vincent.guittot@linaro.org> Reviewed-by: K Prateek Nayak <kprateek.nayak@amd.com> Reviewed-by: Fernand Sieber <sieberf@amazon.com> Link: https://patch.msgid.link/20251207034247.402926-1-yury.norov@gmail.com
2026-01-08sched/fair: Simplify task_numa_find_cpu()Yury Norov (NVIDIA)
Use for_each_cpu_and() and drop some housekeeping code. Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: K Prateek Nayak <kprateek.nayak@amd.com> Reviewed-by: Phil Auld <pauld@redhat.com> Link: https://patch.msgid.link/20251207033037.399608-1-yury.norov@gmail.com
generated by cgit v1.2.3 (git 2.25.1) at 2026-10-03 01:48:04 +0000