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2025-09-01arm64: dts: qcom: Add support for Dell Inspiron 7441 / Latitude 7455Bryan O'Donoghue
Add device trees for both SKUs of the X1E80100 Thena laptop: - Dell Latitude 7455 - Dell Inspiron 14 Plus 7441 Works: - Wi-Fi (WCN7850 hw2.0) - Bluetooth - USB Type-C x2 (with DP alt mode) - USB Type-A - USB Fingerprint reader - eDP Display (with brightness) - NVMe - SDHC (microSD slot) - Keyboard - Touchpad - Touchscreen - Audio (4 Speakers, 2 DMICs, Combo Jack) - Battery Not included: - Camera Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Co-developed-by: Val Packett <val@packett.cool> Signed-off-by: Val Packett <val@packett.cool> Reviewed-by: Laurentiu Tudor <laurentiu.tudor1@dell.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20250716003139.18543-4-val@packett.cool Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01dt-bindings: arm: qcom: Add Dell Inspiron 14 Plus 7441Bryan O'Donoghue
Document the X1E80100-based Dell Inspiron 14 Plus 7441 laptop, codename: Thena. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Val Packett <val@packett.cool> Reviewed-by: Laurentiu Tudor <laurentiu.tudor1@dell.com> Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20250716003139.18543-2-val@packett.cool Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: sc8280xp-lenovo-thinkpad-x13: Set up 4-lane DPNeil Armstrong
Allow up to 4 lanes for the DisplayPort link from the PHYs to the controllers and allow mode-switch events to reach the QMP Combo PHYs. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> [konrad: reword] Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on Lenovo Thinkpad T14S Link: https://lore.kernel.org/r/20250807-topic-4ln_dp_respin-v4-6-43272d6eca92@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: msm8953: Add device tree for Billion Capture+Cristian Cozzolino
Billion Capture+ (flipkart,rimob) is a smartphone released in 2017, based on Snapdragon 625 (MSM8953) SoC. Add a device tree with initial support for: - GPIO keys - SDHCI (internal and external storage) - USB Device Mode - Regulators - Simple framebuffer Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250811-rimob-initial-devicetree-v4-3-b3194f14aa33@protonmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01dt-bindings: arm: qcom: Add Billion Capture+Cristian Cozzolino
Billion Capture+ (flipkart,rimob) is a smartphone based on Qualcomm Snapdragon 625 (MSM8953). Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> Link: https://lore.kernel.org/r/20250811-rimob-initial-devicetree-v4-2-b3194f14aa33@protonmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01dt-bindings: vendor-prefixes: Add FlipkartCristian Cozzolino
Add Flipkart to the vendor prefixes. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> Link: https://lore.kernel.org/r/20250811-rimob-initial-devicetree-v4-1-b3194f14aa33@protonmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: ipq5424: Add reserved memory for TF-AVignesh Viswanathan
IPQ5424 supports both TZ and TF-A as secure software options and various DDR sizes. In most cases, TF-A or TZ is loaded at the same memory location, but in the 256MB DDR configuration TF-A is loaded at a different region. So, add the reserved memory node for TF-A and keep it disabled by default. During bootup, U-Boot will detect which secure software is running and enable or disable the node accordingly. Signed-off-by: Vignesh Viswanathan <quic_viswanat@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250812-atf-reserved-mem-v2-1-1adb94a998c1@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: sc7180: Describe on-SoC USB-adjacent data pathsKonrad Dybcio
USB connector bindings describe a ports subnode, which describes how its High-/SuperSpeed data lines (as well as the SBU pins for Type-C) are connected. On Linux, skipping the graph results in the 'connect_type' sysfs attribute returning 'unknown', instead of 'hotplug' or similar. This in turn is parsed by some operating systems (such as CrOS), to e.g. make security policy decisions. Define ports {} for the DWC controller & the QMPPHY and connect them together for the SS lanes. Leave the DP endpoint unconnected for now, as both Aspire 1 and the Chromebooks (unmerged, see [1]) seem to have a non-trivial topology. Take the creative liberty to add a newline before its ports' subnodes though. [1] https://lore.kernel.org/linux-arm-msm/20240210070934.2549994-23-swboyd@chromium.org/ Suggested-by: Rob Herring (Arm) <robh@kernel.org> Closes: https://lore.kernel.org/linux-arm-msm/175462129176.394940.16810637795278334342.robh@kernel.org/ Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250812-topic-7180_qmpphy_ports-v2-1-7dc87e9a1f73@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: lemans: add GDSP fastrpc-compute-cb nodesLing Xu
Add GDSP0 and GDSP1 fastrpc compute-cb nodes for lemans SoC. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Ling Xu <quic_lxu5@quicinc.com> Reviewed-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250813030638.1075-3-quic_lxu5@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: sm8450: Fix address for usb controller nodeKrishna Kurapati
Correct the address in usb controller node to fix the following warning: Warning (simple_bus_reg): /soc@0/usb@a6f8800: simple-bus unit address format error, expected "a600000" Fixes: c5a87e3a6b3e ("arm64: dts: qcom: sm8450: Flatten usb controller node") Cc: stable@vger.kernel.org Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202508121834.953Mvah2-lkp@intel.com/ Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250813160914.2258033-1-krishna.kurapati@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: add initial support for Samsung Galaxy S20 FEEric Gonçalves
Add new device support for the Samsung Galaxy S20 FE 4G/5G (SM-G980/SM-G981B) phone What works: - SimpleFB - Pstore/ramoops Signed-off-by: Eric Gonçalves <ghatto404@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250815151426.32023-3-ghatto404@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01dt-bindings: arm: qcom: document r8q board bindingEric Gonçalves
Add binding for the Samsung Galaxy S20 FE 4G/5G (SM-G980/SM-G981B) board, codenamed R8Q, which is based on the Qualcomm Snapdragon 865 SoC. Signed-off-by: Eric Gonçalves <ghatto404@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250815151426.32023-2-ghatto404@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: Add Lenovo ThinkBook 16 G7 QOY device treeJens Glathe
Device tree for the Lenovo Thinkbook 16 G7 QOY The Laptop is a Snapdragon X1 / X1 Plus (Purwa) based device [1]. Supported features: - USB type-c and type-a ports - Keyboard - Touchpad (all that are described in the dsdt) - Touchscreen (described in the dsdt, no known SKUss) - Display including PWM backlight control - PCIe devices - nvme - SDHC card reader - ath12k WCN7850 Wifi and Bluetooth - ADSP and CDSP - GPIO keys (Lid switch) - Sound via internal speakers / DMIC / USB / headphone jack - DP Altmode with 2 lanes (as all of these still do) - Integrated fingerprint reader (FPC) - Integrated UVC camera - X1-45 GPU Not supported yet: - HDMI port. - EC and some fn hotkeys. Limited support yet: - SDHC card reader is based on the on-chip sdhc_2 controller, but the driver from the Snapdragon Dev Kit is only a partial match. It can do normal slow sd cards, but not UHS-I (SD104) and UHS-II. This work was done without any schematics or non-public knowledge of the device. So, it is based on the existing x1e device trees, dsdt analysis, using HWInfo ARM64, and pure guesswork. It has been confirmed, however, that the device really has 4 NXP PTN3222 eUSB2 repeaters, one of which doesn't have a reset GPIO (eusb5 @43). Co-developed-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Link: https://lore.kernel.org/r/20250822-tb16-dt-v12-3-bab6c2986351@oldschoolsolutions.biz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01dt-bindings: arm: qcom: Add Lenovo TB16 supportJens Glathe
Document the x1p-42-100/x1-26-100 variants of the Thinkbook 16 G7 QOY. [1]: https://psref.lenovo.com/syspool/Sys/PDF/ThinkBook/ThinkBook_16_G7_QOY/ThinkBook_16_G7_QOY_Spec.pdf Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Link: https://lore.kernel.org/r/20250822-tb16-dt-v12-1-bab6c2986351@oldschoolsolutions.biz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: x1e80100-qcp: Add missing pinctrl for eDP HPDStephan Gerhold
At the moment, we indirectly rely on the boot firmware to set up the pinctrl for the eDP HPD line coming from the internal display. If the boot firmware does not configure the display (e.g. because a different display is selected for output in the UEFI settings), then the display fails to come up and there are several errors in the kernel log: [drm:dpu_encoder_phys_vid_wait_for_commit_done:544] [dpu error]vblank timeout: 80020041 [drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110 [drm:dpu_encoder_frame_done_timeout:2715] [dpu error]enc40 frame done timeout ... Fix this by adding the missing pinctrl for gpio119 (func1/edp0_hot and bias-disable according to the ACPI DSDT), which is defined as &edp0_hpd_default template in x1e80100.dtsi. Fixes: f9a9c11471da ("arm64: dts: qcom: x1e80100-qcp: Enable more support") Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-x1e80100-add-edp-hpd-v2-10-6310176239a6@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: x1e80100-microsoft-romulus: Add missing pinctrl for eDP HPDStephan Gerhold
At the moment, we indirectly rely on the boot firmware to set up the pinctrl for the eDP HPD line coming from the internal display. If the boot firmware does not configure the display (e.g. because a different display is selected for output in the UEFI settings), then the display fails to come up and there are several errors in the kernel log: [drm:dpu_encoder_phys_vid_wait_for_commit_done:544] [dpu error]vblank timeout: 80020041 [drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110 [drm:dpu_encoder_frame_done_timeout:2715] [dpu error]enc40 frame done timeout ... Fix this by adding the missing pinctrl for gpio119 (func1/edp0_hot and bias-disable according to the ACPI DSDT), which is defined as &edp0_hpd_default template in x1e80100.dtsi. Fixes: 09d77be56093 ("arm64: dts: qcom: Add support for X1-based Surface Laptop 7 devices") Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-x1e80100-add-edp-hpd-v2-9-6310176239a6@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: Add missing pinctrl for eDP HPDStephan Gerhold
At the moment, we indirectly rely on the boot firmware to set up the pinctrl for the eDP HPD line coming from the internal display. If the boot firmware does not configure the display (e.g. because a different display is selected for output in the UEFI settings), then the display fails to come up and there are several errors in the kernel log: [drm:dpu_encoder_phys_vid_wait_for_commit_done:544] [dpu error]vblank timeout: 80020041 [drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110 [drm:dpu_encoder_frame_done_timeout:2715] [dpu error]enc40 frame done timeout ... Fix this by adding the missing pinctrl for gpio119 (func1/edp0_hot and bias-disable according to the ACPI DSDT), which is defined as &edp0_hpd_default template in x1e80100.dtsi. Fixes: 45247fe17db2 ("arm64: dts: qcom: x1e80100: add Lenovo Thinkpad Yoga slim 7x devicetree") Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-x1e80100-add-edp-hpd-v2-8-6310176239a6@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: x1e80100-hp-omnibook-x14: Add missing pinctrl for eDP HPDStephan Gerhold
At the moment, we indirectly rely on the boot firmware to set up the pinctrl for the eDP HPD line coming from the internal display. If the boot firmware does not configure the display (e.g. because a different display is selected for output in the UEFI settings), then the display fails to come up and there are several errors in the kernel log: [drm:dpu_encoder_phys_vid_wait_for_commit_done:544] [dpu error]vblank timeout: 80020041 [drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110 [drm:dpu_encoder_frame_done_timeout:2715] [dpu error]enc40 frame done timeout ... Fix this by adding the missing pinctrl for gpio119 (func1/edp0_hot and bias-disable according to the ACPI DSDT), which is defined as &edp0_hpd_default template in x1e80100.dtsi. Fixes: 6f18b8d4142c ("arm64: dts: qcom: x1e80100-hp-x14: dt for HP Omnibook X Laptop 14") Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-x1e80100-add-edp-hpd-v2-7-6310176239a6@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: x1e80100-dell-xps13-9345: Add missing pinctrl for eDP HPDStephan Gerhold
At the moment, we indirectly rely on the boot firmware to set up the pinctrl for the eDP HPD line coming from the internal display. If the boot firmware does not configure the display (e.g. because a different display is selected for output in the UEFI settings), then the display fails to come up and there are several errors in the kernel log: [drm:dpu_encoder_phys_vid_wait_for_commit_done:544] [dpu error]vblank timeout: 80020041 [drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110 [drm:dpu_encoder_frame_done_timeout:2715] [dpu error]enc40 frame done timeout ... Fix this by adding the missing pinctrl for gpio119 (func1/edp0_hot and bias-disable according to the ACPI DSDT), which is defined as &edp0_hpd_default template in x1e80100.dtsi. Fixes: f5b788d0e8cd ("arm64: dts: qcom: Add support for X1-based Dell XPS 13 9345") Tested-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> # 3K OLED Reviewed-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-x1e80100-add-edp-hpd-v2-6-6310176239a6@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: x1e80100-asus-vivobook-s15: Add missing pinctrl for eDP HPDStephan Gerhold
At the moment, we indirectly rely on the boot firmware to set up the pinctrl for the eDP HPD line coming from the internal display. If the boot firmware does not configure the display (e.g. because a different display is selected for output in the UEFI settings), then the display fails to come up and there are several errors in the kernel log: [drm:dpu_encoder_phys_vid_wait_for_commit_done:544] [dpu error]vblank timeout: 80020041 [drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110 [drm:dpu_encoder_frame_done_timeout:2715] [dpu error]enc40 frame done timeout ... Fix this by adding the missing pinctrl for gpio119 (func1/edp0_hot and bias-disable according to the ACPI DSDT), which is defined as &edp0_hpd_default template in x1e80100.dtsi. Fixes: d0e2f8f62dff ("arm64: dts: qcom: Add device tree for ASUS Vivobook S 15") Tested-by: Maud Spierings <maud_spierings@hotmail.com> Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-x1e80100-add-edp-hpd-v2-5-6310176239a6@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: x1e78100-lenovo-thinkpad-t14s: Add missing pinctrl for eDP HPDStephan Gerhold
At the moment, we indirectly rely on the boot firmware to set up the pinctrl for the eDP HPD line coming from the internal display. If the boot firmware does not configure the display (e.g. because a different display is selected for output in the UEFI settings), then the display fails to come up and there are several errors in the kernel log: [drm:dpu_encoder_phys_vid_wait_for_commit_done:544] [dpu error]vblank timeout: 80020041 [drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110 [drm:dpu_encoder_frame_done_timeout:2715] [dpu error]enc40 frame done timeout ... Fix this by adding the missing pinctrl for gpio119 (func1/edp0_hot and bias-disable according to the ACPI DSDT), which is defined as &edp0_hpd_default template in x1e80100.dtsi. Fixes: 7d1cbe2f4985 ("arm64: dts: qcom: Add X1E78100 ThinkPad T14s Gen 6") Tested-by: Christopher Obbard <christopher.obbard@linaro.org> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org> Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on Lenovo Thinkpad T14s OLED Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-x1e80100-add-edp-hpd-v2-4-6310176239a6@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: x1-crd: Add missing pinctrl for eDP HPDStephan Gerhold
At the moment, we indirectly rely on the boot firmware to set up the pinctrl for the eDP HPD line coming from the internal display. If the boot firmware does not configure the display (e.g. because a different display is selected for output in the UEFI settings), then the display fails to come up and there are several errors in the kernel log: [drm:dpu_encoder_phys_vid_wait_for_commit_done:544] [dpu error]vblank timeout: 80020041 [drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110 [drm:dpu_encoder_frame_done_timeout:2715] [dpu error]enc40 frame done timeout ... Fix this by adding the missing pinctrl for gpio119 (func1/edp0_hot and bias-disable according to the ACPI DSDT), which is defined as &edp0_hpd_default template in x1e80100.dtsi. Fixes: d7e03cce0400 ("arm64: dts: qcom: x1e80100-crd: Enable more support") Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-x1e80100-add-edp-hpd-v2-3-6310176239a6@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: x1-asus-zenbook-a14: Add missing pinctrl for eDP HPDStephan Gerhold
At the moment, we indirectly rely on the boot firmware to set up the pinctrl for the eDP HPD line coming from the internal display. If the boot firmware does not configure the display (e.g. because a different display is selected for output in the UEFI settings), then the display fails to come up and there are several errors in the kernel log: [drm:dpu_encoder_phys_vid_wait_for_commit_done:544] [dpu error]vblank timeout: 80020041 [drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110 [drm:dpu_encoder_frame_done_timeout:2715] [dpu error]enc40 frame done timeout ... Fix this by adding the missing pinctrl for gpio119 (func1/edp0_hot and bias-disable according to the ACPI DSDT), which is defined as &edp0_hpd_default template in x1e80100.dtsi. Fixes: 6516961352a1 ("arm64: dts: qcom: Add support for X1-based Asus Zenbook A14") Tested-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> # FHD OLED Reviewed-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com> Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-x1e80100-add-edp-hpd-v2-2-6310176239a6@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: x1e80100: Add pinctrl template for eDP0 HPDStephan Gerhold
At the moment, we indirectly rely on the boot firmware to set up the pinctrl for the eDP HPD line coming from the internal display. If the boot firmware does not configure the display (e.g. because a different display is selected for output in the UEFI settings), then the display fails to come up and there are several errors in the kernel log: [drm:dpu_encoder_phys_vid_wait_for_commit_done:544] [dpu error]vblank timeout: 80020041 [drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110 [drm:dpu_encoder_frame_done_timeout:2715] [dpu error]enc40 frame done timeout ... Add a new &edp0_hpd_default pinctrl template that can be used by boards to set up the eDP HPD pin correctly. All boards upstream so far need the same configuration; if a board needs a different configuration it can just avoid using this template and define a custom one in the board DT. Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250822-x1e80100-add-edp-hpd-v2-1-6310176239a6@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: x1e80100: Set up 4-lane DPNeil Armstrong
Allow up to 4 lanes for the DisplayPort link from the PHYs to the controllers now the mode-switch events can reach the QMP Combo PHYs. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-topic-x1e80100-4lanes-v3-9-5363acad9e32@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: sm8650: Set up 4-lane DPNeil Armstrong
Allow up to 4 lanes for the DisplayPort link from the PHY to the controller now the mode-switch events can reach the QMP Combo PHY. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-topic-x1e80100-4lanes-v3-8-5363acad9e32@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: sm8550: Set up 4-lane DPNeil Armstrong
Allow up to 4 lanes for the DisplayPort link from the PHY to the controller now the mode-switch events can reach the QMP Combo PHY. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-topic-x1e80100-4lanes-v3-7-5363acad9e32@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: x1e80100: move dp0/1/2 data-lanes to SoC dtsiNeil Armstrong
The connection between the QMP Combo PHY and the DisplayPort controller is fixed in SoC, so move the data-lanes properties in the SoC dtsi. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-topic-x1e80100-4lanes-v3-6-5363acad9e32@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: sm8650: move dp0 data-lanes to SoC dtsiNeil Armstrong
The connection between the QMP Combo PHY and the DisplayPort controller is fixed in SoC, so move the data-lanes property in the SoC dtsi. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-topic-x1e80100-4lanes-v3-5-5363acad9e32@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: sm8550: move dp0 data-lanes to SoC dtsiNeil Armstrong
The connection between the QMP Combo PHY and the DisplayPort controller is fixed in SoC, so move the data-lanes property in the SoC dtsi. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-topic-x1e80100-4lanes-v3-4-5363acad9e32@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: x1e80100: allow mode-switch events to reach the QMP Combo PHYsNeil Armstrong
Allow mode-switch events to reach the QMP Combo PHYs to support setting the QMP Combo PHY in DP 4Lanes Altmode. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-topic-x1e80100-4lanes-v3-3-5363acad9e32@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: sm8650: allow mode-switch events to reach the QMP Combo PHYNeil Armstrong
Allow mode-switch events to reach the QMP Combo PHY to support setting the QMP Combo PHY in DP 4Lanes Altmode. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-topic-x1e80100-4lanes-v3-2-5363acad9e32@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: sm8550: allow mode-switch events to reach the QMP Combo PHYNeil Armstrong
Allow mode-switch events to reach the QMP Combo PHY to support setting the QMP Combo PHY in DP 4Lanes Altmode. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250822-topic-x1e80100-4lanes-v3-1-5363acad9e32@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: sm8750: Add PCIe PHY and controller nodeKrishna Chaitanya Chundru
Add PCIe controller and PHY nodes which supports data rates of 8GT/s and x2 lane. Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250826-pakala-v3-2-721627bd5bb0@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: msm8976-longcheer-l9360: Add touch keysAndré Apitzsch
The phone has three capacitive buttons on the screen bezel. Enable them by adding the keycodes in the dt. Signed-off-by: André Apitzsch <git@apitzsch.eu> Link: https://lore.kernel.org/r/20250828-l9360_touch_keys-v1-1-1ce5a279c399@apitzsch.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: starqltechn: remove extra empty lineEric Gonçalves
Remove empty white line ine starqltechn device tree at the end of max77705_charger node. Signed-off-by: Eric Gonçalves <ghatto404@gmail.com> Link: https://lore.kernel.org/r/20250828204929.35402-1-ghatto404@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: msm8953: add spi_7Barnabás Czémán
Add spi_7 can be found in MSM8953 devices. Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20250830-msm8953-spi-fix-v1-3-89950eaf10fe@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: msm8953: correct SPI pinctrlsBarnabás Czémán
SPI pinctrls should handle 4 pins MOSI, MISO, CLK and CS. This change adding the missing pins for pinctrls and correcting CS pins according to downstream sources. Fixes: be69109e93c78 ("arm64: dts: qcom: msm8953: add SPI interfaces") Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20250830-msm8953-spi-fix-v1-2-89950eaf10fe@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: msm8953: fix SPI clocksBarnabás Czémán
Fix SPI clocks, accidentally I2C clocks was assigned for SPI interfaces. Fixes: be69109e93c78 ("arm64: dts: qcom: msm8953: add SPI interfaces") Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20250830-msm8953-spi-fix-v1-1-89950eaf10fe@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: sdm845-shift-axolotl: set chassis typeGuido Günther
It's a handset. Signed-off-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/3e04efc06a795a32b0080b2f23a138e139057b02.1756569434.git.agx@sigxcpu.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: sm8650: Additionally manage MXC power domain in camccJagadeesh Kona
Camcc requires both MMCX and MXC rails to be powered ON to configure the camera PLLs on SM8650 platform. Hence add MXC power domain to camcc node on SM8650. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250822-topic-sm8x50-upstream-pll-multi-pd-voting-dt-v2-6-28f35728a146@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: sm8550: Additionally manage MXC power domain in camccVladimir Zapolskiy
Camcc requires both MMCX and MXC rails to be powered ON to configure the camera PLLs on SM8550 platform. Hence add MXC power domain to camcc node on SM8550. Fixes: e271b59e39a6f ("arm64: dts: qcom: sm8550: Add camera clock controller") Reviewed-by: Taniya Das <quic_tdas@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250822-topic-sm8x50-upstream-pll-multi-pd-voting-dt-v2-5-28f35728a146@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: sm8450: Additionally manage MXC power domain in camccJagadeesh Kona
Camcc requires both MMCX and MXC rails to be powered ON to configure the camera PLLs on SM8450 platform. Hence add MXC power domain to camcc node on SM8450. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250822-topic-sm8x50-upstream-pll-multi-pd-voting-dt-v2-4-28f35728a146@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: sm8650: Additionally manage MXC power domain in videoccJagadeesh Kona
Videocc requires both MMCX and MXC rails to be powered ON to configure the video PLLs on SM8650 platform. Hence add MXC power domain to videocc node on SM8650. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250822-topic-sm8x50-upstream-pll-multi-pd-voting-dt-v2-3-28f35728a146@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: sm8550: Additionally manage MXC power domain in videoccJagadeesh Kona
Videocc requires both MMCX and MXC rails to be powered ON to configure the video PLLs on SM8550 platform. Hence add MXC power domain to videocc node on SM8550. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250822-topic-sm8x50-upstream-pll-multi-pd-voting-dt-v2-2-28f35728a146@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arm64: dts: qcom: sm8450: Additionally manage MXC power domain in videoccJagadeesh Kona
Videocc requires both MMCX and MXC rails to be powered ON to configure the video PLLs on SM8450 platform. Hence add MXC power domain to videocc node on SM8450. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250822-topic-sm8x50-upstream-pll-multi-pd-voting-dt-v2-1-28f35728a146@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01rust: pci: provide access to PCI Class and Class-related itemsJohn Hubbard
Allow callers to write Class::STORAGE_SCSI instead of bindings::PCI_CLASS_STORAGE_SCSI, for example. New APIs: Class::STORAGE_SCSI, Class::NETWORK_ETHERNET, etc. Class::from_raw() -- Only callable from pci module. Class::as_raw() ClassMask: Full, ClassSubclass Device::pci_class() Cc: Danilo Krummrich <dakr@kernel.org> Cc: Elle Rhumsaa <elle@weathered-steel.dev> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: John Hubbard <jhubbard@nvidia.com> Link: https://lore.kernel.org/r/20250829223632.144030-2-jhubbard@nvidia.com [ Minor doc-comment improvements, align Debug and Display. - Danilo ] Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2025-09-01ASoC: qcom: audioreach: convert to cpu endainess type before accessingSrinivas Kandagatla
Looks like some of the members of module config are accessed directly without converting their endainess to cpu type. Fix this by using le32_to_cpu() where required. Fixes: da9881d00153 ("ASoC: qcom: audioreach: add support for SMECNS module") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202508230830.Rkp7HHbG-lkp@intel.com Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Link: https://patch.msgid.link/20250825101247.152619-4-srinivas.kandagatla@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-09-01ASoC: qcom: topology: convert to cpu endainess type before accessingSrinivas Kandagatla
Looks like some of the members of module config are accessed directly without converting their endainess to cpu type. Fix this by using le32_to_cpu() where required. Fixes: c7ed4c2debfd ("ASoC: qcom: audioreach: add support for static calibration") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202508230741.heXmHeDC-lkp@intel.com Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Link: https://patch.msgid.link/20250825101247.152619-3-srinivas.kandagatla@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-09-01ASoC: qcom: audioreach: fix potential null pointer dereferenceSrinivas Kandagatla
It is possible that the topology parsing function audioreach_widget_load_module_common() could return NULL or an error pointer. Add missing NULL check so that we do not dereference it. Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Cc: Stable@vger.kernel.org Fixes: 36ad9bf1d93d ("ASoC: qdsp6: audioreach: add topology support") Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Link: https://patch.msgid.link/20250825101247.152619-2-srinivas.kandagatla@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit v1.3 (git 2.53.0) at 2026-11-15 11:33:23 +0000