summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2025-09-02drm/xe: Add clearing stats to GT debugfsMatthew Brost
It helpful to clear GT stats, run a test cases which is being profiled, and look at the results of the stats from the individual test case. Make stats entry writable and upon write clear the stats. v5: - Drop clear_stats debugfs entry (Lucas) v6: - Use xe_gt_stats_clear rather than helper (Michal) - Rework loop in xe_gt_stats_clear (Michal) Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Link: https://lore.kernel.org/r/20250829172232.1308004-2-matthew.brost@intel.com
2025-09-03ARM: dts: aspeed: clemente: add Meta Clemente BMCLeo Wang
Add linux device tree entry for Meta Clemente compute-tray BMC using AST2600 SoC. Signed-off-by: Leo Wang <leo.jt.wang@gmail.com> Link: https://patch.msgid.link/20250813-add-support-for-meta-clemente-bmc-v11-3-8970d41f88b0@fii-foxconn.com [arj: Fix node ordering and whitespace] Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-09-03ARM: dts: aspeed: Add NCSI3 and NCSI4 pinctrl nodesLeo Wang
Add pinctrl nodes for NCSI3 and NCSI4 to the AST2600 pinctrl description, enabling support for RMII3 and RMII4 interfaces. Signed-off-by: Leo Wang <leo.jt.wang@gmail.com> Link: https://patch.msgid.link/20250813-add-support-for-meta-clemente-bmc-v11-2-8970d41f88b0@fii-foxconn.com [arj: Remove 'clemente' from commit subject] Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-09-03dt-bindings: arm: aspeed: add Meta Clemente boardLeo Wang
Document the new compatibles used on Meta Clemente. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Leo Wang <leo.jt.wang@gmail.com> Link: https://patch.msgid.link/20250813-add-support-for-meta-clemente-bmc-v11-1-8970d41f88b0@fii-foxconn.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-09-03ARM: dts: aspeed: harma: add mp5990Peter Yin
Add support for the HSC MP5990 device on the Harma platform. This change updates the device tree to include the MP5990 HSC (Hot Swap Controller), allowing proper configuration and integration with the platform. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://patch.msgid.link/20250828074955.542711-4-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-09-03ARM: dts: aspeed: harma: revise gpio namePeter Yin
Update GPIO label definitions in the device tree to reflect the correct power and control signal names. This includes: - Rename "fcb0-activate" to "fcb1-activate" and "fcb2-activate" - Add labels for: - power-p3v3-standby - power-p1v8-good - power-pvdd33-s5 - power-pvdd18-s5 - power-asic-good - power-12v-memory-good - Replace unnamed GPIOs with appropriate labels such as: - irq-pvddcore0-ocp-alert - irq-pvddcore1-ocp-alert Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://patch.msgid.link/20250828074955.542711-3-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-09-03ARM: dts: aspeed: harma: add power monitor supportPeter Yin
Add INA238 device on I2C bus 4 for the PDB board power monitoring. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://patch.msgid.link/20250828074955.542711-2-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-09-02drm/xe: Extend Wa_22021007897 to Xe3 platformsTangudu Tilak Tirumalesh
WA 22021007897 should also be applied to Graphics Versions 30.00, 30.01 and 30.03. To make it simple, simply use the range [3000, 3003] that should be ok as there isn't a 3002 and if it's added, the WA list would need to be revisited anyway. Cc: Matt Atwood <matthew.s.atwood@intel.com> Cc: Gustavo Sousa <gustavo.sousa@intel.com> Signed-off-by: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com> Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com> Link: https://lore.kernel.org/r/20250827-wa-22021007897-v1-1-96922eb52af4@intel.com Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2025-09-02crypto: sha512 - Implement export_core() and import_core()Eric Biggers
Since commit 9d7a0ab1c753 ("crypto: ahash - Handle partial blocks in API"), the recently-added export_core() and import_core() methods in struct shash_alg have effectively become mandatory (even though it is not tested or enforced), since legacy drivers that need a fallback depend on them. Make crypto/sha512.c compatible with these legacy drivers by adding export_core() and import_core() methods to it. Reported-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reported-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com> Closes: https://lore.kernel.org/r/aLSnCc9Ws5L9y+8X@gcabiddu-mobl.ger.corp.intel.com Fixes: 4bc7f7b687a2 ("crypto: sha512 - Use same state format as legacy drivers") Tested-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Tested-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com> Link: https://lore.kernel.org/r/20250901165013.48649-4-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
2025-09-02crypto: sha256 - Implement export_core() and import_core()Eric Biggers
Since commit 9d7a0ab1c753 ("crypto: ahash - Handle partial blocks in API"), the recently-added export_core() and import_core() methods in struct shash_alg have effectively become mandatory (even though it is not tested or enforced), since legacy drivers that need a fallback depend on them. Make crypto/sha256.c compatible with these legacy drivers by adding export_core() and import_core() methods to it. Reported-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reported-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com> Closes: https://lore.kernel.org/r/aLSnCc9Ws5L9y+8X@gcabiddu-mobl.ger.corp.intel.com Fixes: 07f090959bba ("crypto: sha256 - Use same state format as legacy drivers") Tested-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Tested-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com> Link: https://lore.kernel.org/r/20250901165013.48649-3-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
2025-09-02crypto: sha1 - Implement export_core() and import_core()Eric Biggers
Since commit 9d7a0ab1c753 ("crypto: ahash - Handle partial blocks in API"), the recently-added export_core() and import_core() methods in struct shash_alg have effectively become mandatory (even though it is not tested or enforced), since legacy drivers that need a fallback depend on them. Make crypto/sha1.c compatible with these legacy drivers by adding export_core() and import_core() methods to it. Reported-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Reported-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com> Closes: https://lore.kernel.org/r/aLSnCc9Ws5L9y+8X@gcabiddu-mobl.ger.corp.intel.com Fixes: b10a74abcfc5 ("crypto: sha1 - Use same state format as legacy drivers") Tested-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Tested-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com> Link: https://lore.kernel.org/r/20250901165013.48649-2-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
2025-09-02smb: client: show negotiated cipher in DebugDataBharath SM
Print the negotiated encryption cipher type in DebugData Signed-off-by: Bharath SM <bharathsm@microsoft.com> Acked-by: Paulo Alcantara (Red Hat) <pc@manguebit.org> Signed-off-by: Steve French <stfrench@microsoft.com>
2025-09-02smb: client: add new tracepoint to trace lease break notificationBharath SM
Add smb3_lease_break_enter to trace lease break notifications, recording lease state, flags, epoch, and lease key. Align smb3_lease_not_found to use the same payload and print format. Signed-off-by: Bharath SM <bharathsm@microsoft.com> Acked-by: Paulo Alcantara (Red Hat) <pc@manguebit.org> Signed-off-by: Steve French <stfrench@microsoft.com>
2025-09-02smb: client: fix spellings in commentsBharath SM
correct spellings in comments Signed-off-by: Bharath SM <bharathsm@microsoft.com> Acked-by: Paulo Alcantara (Red Hat) <pc@manguebit.org> Signed-off-by: Steve French <stfrench@microsoft.com>
2025-09-02io_uring/uring_cmd: add io_uring_cmd_tw_t type aliasCaleb Sander Mateos
Introduce a function pointer type alias io_uring_cmd_tw_t for the uring_cmd task work callback. This avoids repeating the signature in several places. Also name both arguments to the callback to clarify what they represent. Signed-off-by: Caleb Sander Mateos <csander@purestorage.com> Reviewed-by: Keith Busch <kbusch@kernel.org> Link: https://lore.kernel.org/r/20250902160657.1726828-1-csander@purestorage.com Signed-off-by: Jens Axboe <axboe@kernel.dk>
2025-09-02io_uring/register: drop redundant submitter_task checkCaleb Sander Mateos
For IORING_SETUP_SINGLE_ISSUER io_ring_ctx's, io_register_resize_rings() checks that the current task is the ctx's submitter_task. However, its caller __io_uring_register() already checks this. Drop the redundant check in io_register_resize_rings(). Signed-off-by: Caleb Sander Mateos <csander@purestorage.com> Link: https://lore.kernel.org/r/20250902215108.1925105-1-csander@purestorage.com Signed-off-by: Jens Axboe <axboe@kernel.dk>
2025-09-02block: use int to store blk_stack_limits() return valueQianfeng Rong
Change the 'ret' variable in blk_stack_limits() from unsigned int to int, as it needs to store negative value -1. Storing the negative error codes in unsigned type, or performing equality comparisons (e.g., ret == -1), doesn't cause an issue at runtime [1] but can be confusing. Additionally, assigning negative error codes to unsigned type may trigger a GCC warning when the -Wsign-conversion flag is enabled. No effect on runtime. Link: https://lore.kernel.org/all/x3wogjf6vgpkisdhg3abzrx7v7zktmdnfmqeih5kosszmagqfs@oh3qxrgzkikf/ #1 Signed-off-by: Qianfeng Rong <rongqianfeng@vivo.com> Reviewed-by: John Garry <john.g.garry@oracle.com> Fixes: fe0b393f2c0a ("block: Correct handling of bottom device misaligment") Reviewed-by: Bart Van Assche <bvanassche@acm.org> Link: https://lore.kernel.org/r/20250902130930.68317-1-rongqianfeng@vivo.com Signed-off-by: Jens Axboe <axboe@kernel.dk>
2025-09-02Merge branch 'net-dsa-lantiq_gswip-prepare-for-supporting-maxlinear-gsw1xx'Jakub Kicinski
Daniel Golle says: ==================== net: dsa: lantiq_gswip: prepare for supporting MaxLinear GSW1xx Continue to prepare for supporting the newer standalone MaxLinear GSW1xx switch family by extending the existing lantiq_gswip driver to allow it to support MII interfaces and MDIO bus of the GSW1xx. This series has been preceded by an RFC series which covers everything needed to support the MaxLinear GSW1xx family of switches. Andrew Lunn had suggested to split it into a couple of smaller series and start with the changes which don't yet make actual functional changes or support new features. Everything has been compile and runtime tested on AVM Fritz!Box 7490 (GSWIP version 2.1, VR9 v1.2) Link: https://lore.kernel.org/netdev/aKDhFCNwjDDwRKsI@pidgin.makrotopia.org/ ==================== Link: https://patch.msgid.link/cover.1756520811.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-09-02net: dsa: lantiq_gswip: move MDIO bus registration to .setup()Daniel Golle
Instead of registering the switch MDIO bus in the probe() function, move the call to gswip_mdio() into the .setup() DSA switch op, so it can be reused independently of the probe() function. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Hauke Mehrtens <hauke@hauke-m.de> Link: https://patch.msgid.link/2650602042c0bfdc5664b88d59071ed4dca96c26.1756520811.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-09-02net: dsa: lantiq_gswip: support standard MDIO node nameDaniel Golle
Instead of matching against the child node's compatible string also support locating the node of the device tree node of the MDIO bus in the standard way by referencing the node name ("mdio"). Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Reviewed-by: Hauke Mehrtens <hauke@hauke-m.de> Link: https://patch.msgid.link/5a9a3d659ef0d8b7eca37fb69ec87ff5a3192820.1756520811.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-09-02net: dsa: lantiq_gswip: support offset of MII registersDaniel Golle
The MaxLinear GSW1xx family got a single (R)(G)MII port at index 5 but the registers MII_PCDU and MII_CFG are those of port 0. Allow applying an offset for the port index to access those registers. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Hauke Mehrtens <hauke@hauke-m.de> Link: https://patch.msgid.link/88145164c1f948e4ae9b04706f408359cf54223c.1756520811.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-09-02net: dsa: lantiq_gswip: ignore SerDes modes in phylink_mac_config()Daniel Golle
We can safely ignore SerDes interface modes 1000Base-X, 2500Base-X and SGMII in phylink_mac_config() as they are being taken care of by the PCS and the SGMII port anyway doesn't have MII_CFG and MII_PCDU registers and hence gswip_phylink_mac_config() is already a no-op apart from outputing a misleading error message. Return early in case of SerDes interface modes to avoid printing that error message. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Hauke Mehrtens <hauke@hauke-m.de> Link: https://patch.msgid.link/dcb066d6a02e6340314b5ff4f73937757a4f8eb3.1756520811.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-09-02net: dsa: lantiq_gswip: support model-specific mac_select_pcs()Daniel Golle
Call mac_select_pcs() function if provided in struct gswip_hwinfo. The MaxLinear GSW1xx series got one port wired to a SerDes PCS and PHY which can do 1000Base-X, 2500Base-X and SGMII. Support for the SerDes port will be provided using phylink_pcs, so provide a convenient way for mac_select_pcs() to differ based on the hardware model. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Hauke Mehrtens <hauke@hauke-m.de> Link: https://patch.msgid.link/7668666aa51e43e7f2a6cbcf36eb5a0a3020998f.1756520811.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-09-02net: dsa: lantiq_gswip: move to dedicated folderDaniel Golle
Move the lantiq_gswip driver to its own folder and update MAINTAINERS file accordingly. This is done ahead of extending the driver to support the MaxLinear GSW1xx series of standalone switch ICs, which includes adding a bunch of files. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Hauke Mehrtens <hauke@hauke-m.de> Link: https://patch.msgid.link/a5923dee9a174501b284dc473bdec9dd89c68de1.1756520811.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-09-02PCI: dw-rockchip: Switch to FIELD_PREP_WM16 macroNicolas Frattaroli
The era of hand-rolled HIWORD_UPDATE macros is over. Like many other Rockchip drivers, pcie-dw-rockchip brings with it its very own flavour of HIWORD_UPDATE. It's occasionally used without a constant mask, which complicates matters. HIWORD_UPDATE_BIT is a confusingly named addition, as it doesn't update the bit, it actually sets all bits in the value to 1. HIWORD_DISABLE_BIT is similarly confusing; it disables several bits at once by using the value as a mask and the inverse of value as the value, and the "disabling only these" effect comes from the hardware actually using the mask. The more obvious approach would've been HIWORD_UPDATE(val, 0) in my opinion. This is part of the motivation why this patch uses hw_bitfield.h's FIELD_PREP_WM16 instead, where possible. FIELD_PREP_WM16 requires a constant bit mask, which isn't possible where the irq number is used to generate a bit mask. For that purpose, we replace it with a more robust macro than what was there but that should also bring close to zero runtime overhead: we actually mask the IRQ number to make sure we're not writing garbage. For the remaining bits, there also are some caveats. For starters, the PCIE_CLIENT_ENABLE_LTSSM and PCIE_CLIENT_DISABLE_LTSSM were named in a manner that isn't quite truthful to what they do. Their modification actually spans not just the LTSSM bit but also another bit, flipping only the LTSSM one, but keeping the other (which according to the TRM has a reset value of 0) always enabled. This other bit is reserved as of the IP version RK3588 uses at least, and I have my doubts as to whether it was meant to be set, and whether it was meant to be set in that code path. Either way, it's confusing. Replace it with just writing either 1 or 0 to the LTSSM bit, using the new FIELD_PREP_WM16 macro from hw_bitfield.h, which grants us the benefit of better compile-time error checking. The change of no longer setting the reserved bit doesn't appear to change the behaviour on RK3568 in RC mode, where it's not marked as reserved. PCIE_CLIENT_RC_MODE/PCIE_CLIENT_EP_MODE was another field that wasn't super clear on what the bit field modification actually is. As far as I can tell, switching to RC mode doesn't actually write the correct value to the field if any of its bits have been set previously, as it only updates one bit of a 4 bit field. Replace it by actually writing the full values to the field, using the new FIELD_PREP_WM16 macro, which grants us the benefit of better compile-time error checking. This patch was tested on RK3588 (PCIe3 x4 controller), RK3576 (PCIe2 x1 controller) and RK3568 (PCIe x2 controller), all in RC mode. Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-09-02PCI: rockchip: Switch to FIELD_PREP_WM16* macrosNicolas Frattaroli
The era of hand-rolled HIWORD_UPDATE macros is over, at least for those drivers that use constant masks. The Rockchip PCI driver, like many other Rockchip drivers, has its very own definition of HIWORD_UPDATE. Remove it, and replace its usage with either FIELD_PREP_WM16, or two new header local macros for setting/clearing a bit with the high mask, which use FIELD_PREP_WM16_CONST internally. In the process, ENCODE_LANES needed to be adjusted, as FIELD_PREP_WM16* shifts the value for us. That this is equivalent was verified by first making all FIELD_PREP_WM16 instances FIELD_PREP_WM16_CONST, then doing a static_assert() comparing it to the old macro (and for those with parameters, static_asserting for the full range of possible values with the old encode macro). What we get out of this is compile time error checking to make sure the value actually fits in the mask, and that the mask fits in the register, and also generally less icky code that writes shifted values when it actually just meant to set and clear a handful of bits. Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-09-02net: stmmac: dwmac-rk: switch to FIELD_PREP_WM16 macroNicolas Frattaroli
The era of hand-rolled HIWORD_UPDATE macros is over, at least for those drivers that use constant masks. Like many other Rockchip drivers, dwmac-rk has its own HIWORD_UPDATE macro. Its semantics allow us to redefine it as a wrapper to the shared hw_bitfield.h FIELD_PREP_WM16 macros though. Replace the implementation of this driver's very own HIWORD_UPDATE macro with an instance of FIELD_PREP_WM16 from hw_bitfield.h. This keeps the diff easily reviewable, while giving us more compile-time error checking. The related GRF_BIT macro is left alone for now; any attempt to rework the code to not use its own solution here would likely end up harder to review and less pretty for the time being. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Acked-by: Jakub Kicinski <kuba@kernel.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-09-02ASoC: rockchip: i2s-tdm: switch to FIELD_PREP_WM16_CONST macroNicolas Frattaroli
The era of hand-rolled HIWORD_UPDATE macros is over, at least for those drivers that use constant masks. Replace the implementation of this driver's HIWORD_UPDATE macro with an instance of FIELD_PREP_WM16_CONST. The const variant is chosen here because some of the header defines are then used in initializers. This gives us some compile-time error checking, while keeping the diff very small and easy to review. Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-09-02drm/rockchip: dw_hdmi: switch to FIELD_PREP_WM16* macrosNicolas Frattaroli
The era of hand-rolled HIWORD_UPDATE macros is over, at least for those drivers that use constant masks. Remove this driver's very own HIWORD_UPDATE macro, and replace all instances of it with equivalent instantiations of FIELD_PREP_WM16 or FIELD_PREP_WM16_CONST, depending on whether it's in an initializer. This gives us better error checking, and a centrally agreed upon signature for this macro, to ease in code comprehension. Because FIELD_PREP_WM16/FIELD_PREP_WM16_CONST shifts the value to the mask (like FIELD_PREP et al do), a lot of macro instantiations get easier to read. This was tested on an RK3568 ODROID M1, as well as an RK3399 ROCKPro64. Reviewed-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Tested-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-09-02phy: rockchip-usb: switch to FIELD_PREP_WM16 macroNicolas Frattaroli
The era of hand-rolled HIWORD_UPDATE macros is over, at least for those drivers that use constant masks. Remove this driver's HIWORD_UPDATE macro, and replace all instances of it with (hopefully) equivalent FIELD_PREP_WM16 instances. To do this, a few of the defines are being adjusted, as FIELD_PREP_WM16 shifts up the value for us. This gets rid of the icky update(mask, mask) shenanigans. The benefit of using FIELD_PREP_WM16 is that it does more checking of the input, hopefully catching errors. In practice, a shared definition makes code more readable than several different flavours of the same macro, and the shifted value helps as well. I do not have the hardware that uses this particular driver, so it's compile-tested only as far as my own testing goes. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-09-02drm/rockchip: inno-hdmi: switch to FIELD_PREP_WM16 macroNicolas Frattaroli
The era of hand-rolled HIWORD_UPDATE macros is over, at least for those drivers that use constant masks. The inno-hdmi driver's own HIWORD_UPDATE macro is instantiated only twice. Remove it, and replace its uses with FIELD_PREP_WM16. Since FIELD_PREP_WM16 shifts the value for us, we replace using the mask as the value by simply using 1 instead. With the new FIELD_PREP_WM16 macro, we gain better error checking and a central shared definition. This has been compile-tested only as I lack hardware this old, but the change is trivial enough that I am fairly certain it's equivalent. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-09-02drm/rockchip: dw_hdmi_qp: switch to FIELD_PREP_WM16 macroNicolas Frattaroli
The era of hand-rolled HIWORD_UPDATE macros is over, at least for those drivers that use constant masks. Replace this driver's HIWORD_UPDATE with the FIELD_PREP_WM16 macro from hw_bitfield.h. While at it, disambiguate the GRF write to SOC_CON7 by splitting the definition into the individual bitflags. This is done because FIELD_PREP_WM16 shifts the value for us according to the mask, so writing the mask to itself to enable two bits is no longer something that can be done. It should also not be done anyway because it hides the true meaning of those two individual bit flags. HDMI output with this patch has been tested on both RK3588 and RK3576. On the former, with both present HDMI connectors. Reviewed-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Tested-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-09-02phy: rockchip-samsung-dcphy: switch to FIELD_PREP_WM16 macroNicolas Frattaroli
The era of hand-rolled HIWORD_UPDATE macros is over, at least for those drivers that use constant masks. phy-rockchip-samsung-dcphy is actually an exemplary example, where the similarities to FIELD_PREP were spotted and the driver local macro has the same semantics as the new FIELD_PREP_WM16 hw_bitfield.h macro. Still, get rid of FIELD_PREP_HIWORD now that a shared implementation exists, replacing the two instances of it with FIELD_PREP_WM16. This gives us slightly better error checking; the value is now checked to fit in 16 bits. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-09-02drm/rockchip: vop2: switch to FIELD_PREP_WM16 macroNicolas Frattaroli
The era of hand-rolled HIWORD_UPDATE macros is over, at least for those drivers that use constant masks. Remove VOP2's HIWORD_UPDATE macro from the vop2 header file, and replace all instances in rockchip_vop2_reg.c (the only user of this particular HIWORD_UPDATE definition) with equivalent FIELD_PREP_WM16 instances. This gives us better error checking. Reviewed-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Tested-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-09-02drm/rockchip: dsi: switch to FIELD_PREP_WM16* macrosNicolas Frattaroli
The era of hand-rolled HIWORD_UPDATE macros is over, at least for those drivers that use constant masks. Remove this driver's HIWORD_UPDATE macro, and replace instances of it with either FIELD_PREP_WM16 or FIELD_PREP_WM16_CONST, depending on whether they're in an initializer. This gives us better error checking, which already saved me some trouble during this refactor. The driver's HIWORD_UPDATE macro doesn't shift up the value, but expects a pre-shifted value. Meanwhile, FIELD_PREP_WM16 and FIELD_PREP_WM16_CONST will shift the value for us, based on the given mask. So a few things that used to be a HIWORD_UPDATE(VERY_LONG_FOO, VERY_LONG_FOO) are now a somewhat more pleasant FIELD_PREP_WM16(VERY_LONG_FOO, 1). There are some non-trivial refactors here. A few literals needed a UL suffix added to stop them from unintentionally overflowing as a signed long. To make sure all of these cases are caught, and not just the ones where the FIELD_PREP_WM16* macros use such a value as a mask, just mark every literal that's used as a mask as unsigned. Non-contiguous masks also have to be split into multiple FIELD_PREP_WM16* instances, as the macro's checks and shifting logic rely on contiguous masks. This is compile-tested only. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-09-02phy: rockchip-emmc: switch to FIELD_PREP_WM16 macroNicolas Frattaroli
The era of hand-rolled HIWORD_UPDATE macros is over, at least for those drivers that use constant masks. Replace the implementation of the rockchip eMMC PHY driver's HIWORD_UPDATE macro with hw_bitfield.h's FIELD_PREP_WM16. This makes the change more easily reviewable. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-09-02drm/rockchip: lvds: switch to FIELD_PREP_WM16 macroNicolas Frattaroli
The era of hand-rolled HIWORD_UPDATE macros is over, at least for those drivers that use constant masks. Remove rockchip_lvds.h's own HIWORD_UPDATE macro, and replace all instances of it with hw_bitfield.h's FIELD_PREP_WM16 macro, which gives us more error checking. For the slightly-less-trivial case of the 2-bit width instance, the results were checked during development to match all possible input values (0 to 3, inclusive). Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-09-02media: synopsys: hdmirx: replace macros with bitfield variantsNicolas Frattaroli
The era of hand-rolled HIWORD_UPDATE macros is over, at least for those drivers that use constant masks. Replace the UPDATE macro with bitfield.h's FIELD_PREP, to give us additional error checking. Also, replace the HIWORD_UPDATE macro at the same time with the new FIELD_PREP_WM16 macro in hw_bitfield.h, which also gives us additional error checking. The UPDATE/HIWORD_UPDATE macros are left as wrappers around the replacement macros, in order to not rock the boat too much, and keep the changes easy to review. Yury: drop extra parens around FIELD_PREPs (Dmitry) Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Acked-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-09-02net: dsa: mv88e6xxx: Fix fwnode reference leaks in mv88e6xxx_port_setup_ledsMiaoqian Lin
Fix multiple fwnode reference leaks: 1. The function calls fwnode_get_named_child_node() to get the "leds" node, but never calls fwnode_handle_put(leds) to release this reference. 2. Within the fwnode_for_each_child_node() loop, the early return paths that don't properly release the "led" fwnode reference. This fix follows the same pattern as commit d029edefed39 ("net dsa: qca8k: fix usages of device_get_named_child_node()") Fixes: 94a2a84f5e9e ("net: dsa: mv88e6xxx: Support LED control") Cc: stable@vger.kernel.org Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://patch.msgid.link/20250901073224.2273103-1-linmq006@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-09-02ipv6: Add sanity checks on ipv6_devconf.rpl_seg_enabledYue Haibing
In ipv6_rpl_srh_rcv() we use min(net->ipv6.devconf_all->rpl_seg_enabled, idev->cnf.rpl_seg_enabled) is intended to return 0 when either value is zero, but if one of the values is negative it will in fact return non-zero. Signed-off-by: Yue Haibing <yuehaibing@huawei.com> Link: https://patch.msgid.link/20250901123726.1972881-3-yuehaibing@huawei.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-09-02ipv6: annotate data-races around devconf->rpl_seg_enabledYue Haibing
devconf->rpl_seg_enabled can be changed concurrently from /proc/sys/net/ipv6/conf, annotate lockless reads on it. Signed-off-by: Yue Haibing <yuehaibing@huawei.com> Link: https://patch.msgid.link/20250901123726.1972881-2-yuehaibing@huawei.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-09-02soc: rockchip: grf: switch to FIELD_PREP_WM16_CONST macroNicolas Frattaroli
The era of hand-rolled HIWORD_UPDATE macros is over, at least for those drivers that use constant masks. Switch the rockchip grf driver to the FIELD_PREP_WM16_CONST macro, which brings with it more error checking while still being able to be used in initializers. All HIWORD_UPDATE instances and its definition are removed from the driver, as the conversion here is obvious, and static_asserts were used during development to make sure the ones greater than one bit in width were really equivalent. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-09-02mmc: dw_mmc-rockchip: switch to FIELD_PREP_WM16 macroNicolas Frattaroli
The era of hand-rolled HIWORD_UPDATE macros is over, at least for those drivers that use constant masks. Switch to the new FIELD_PREP_WM16 macro in hw_bitfield.h, which has error checking. Instead of redefining the driver's HIWORD_UPDATE macro in this case, replace the two only instances of it with the new macro, as I could test that they result in an equivalent value. Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-09-02bitmap: introduce hardware-specific bitfield operationsNicolas Frattaroli
Hardware of various vendors, but very notably Rockchip, often uses 32-bit registers where the upper 16-bit half of the register is a write-enable mask for the lower half. This type of hardware setup allows for more granular concurrent register write access. Over the years, many drivers have hand-rolled their own version of this macro, usually without any checks, often called something like HIWORD_UPDATE or FIELD_PREP_HIWORD, commonly with slightly different semantics between them. Clearly there is a demand for such a macro, and thus the demand should be satisfied in a common header file. As this is a convention that spans across multiple vendors, and similar conventions may also have cross-vendor adoption, it's best if it lives in a vendor-agnostic header file that can be expanded over time. Add hw_bitfield.h with two macros: FIELD_PREP_WM16, and FIELD_PREP_WM16_CONST. The latter is a version that can be used in initializers, like FIELD_PREP_CONST. Suggested-by: Yury Norov (NVIDIA) <yury.norov@gmail.com> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Acked-by: Jakub Kicinski <kuba@kernel.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-09-02Merge branch 'vxlan-fix-npds-when-using-nexthop-objects'Jakub Kicinski
Ido Schimmel says: ==================== vxlan: Fix NPDs when using nexthop objects With FDB nexthop groups, VXLAN FDB entries do not necessarily point to a remote destination but rather to an FDB nexthop group. This means that first_remote_{rcu,rtnl}() can return NULL and a few places in the driver were not ready for that, resulting in NULL pointer dereferences. Patches #1-#2 fix these NPDs. Note that vxlan_fdb_find_uc() still dereferences the remote returned by first_remote_rcu() without checking that it is not NULL, but this function is only invoked by a single driver which vetoes the creation of FDB nexthop groups. I will patch this in net-next to make the code less fragile. Patch #3 adds a selftests which exercises these code paths and tests basic Tx functionality with FDB nexthop groups. I verified that the test crashes the kernel without the first two patches. ==================== Link: https://patch.msgid.link/20250901065035.159644-1-idosch@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-09-02selftests: net: Add a selftest for VXLAN with FDB nexthop groupsIdo Schimmel
Add test cases for VXLAN with FDB nexthop groups, testing both IPv4 and IPv6. Test basic Tx functionality as well as some corner cases. Example output: # ./test_vxlan_nh.sh TEST: VXLAN FDB nexthop: IPv4 basic Tx [ OK ] TEST: VXLAN FDB nexthop: IPv6 basic Tx [ OK ] TEST: VXLAN FDB nexthop: learning [ OK ] TEST: VXLAN FDB nexthop: IPv4 proxy [ OK ] TEST: VXLAN FDB nexthop: IPv6 proxy [ OK ] Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Nikolay Aleksandrov <razor@blackwall.org> Link: https://patch.msgid.link/20250901065035.159644-4-idosch@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-09-02vxlan: Fix NPD in {arp,neigh}_reduce() when using nexthop objectsIdo Schimmel
When the "proxy" option is enabled on a VXLAN device, the device will suppress ARP requests and IPv6 Neighbor Solicitation messages if it is able to reply on behalf of the remote host. That is, if a matching and valid neighbor entry is configured on the VXLAN device whose MAC address is not behind the "any" remote (0.0.0.0 / ::). The code currently assumes that the FDB entry for the neighbor's MAC address points to a valid remote destination, but this is incorrect if the entry is associated with an FDB nexthop group. This can result in a NPD [1][3] which can be reproduced using [2][4]. Fix by checking that the remote destination exists before dereferencing it. [1] BUG: kernel NULL pointer dereference, address: 0000000000000000 [...] CPU: 4 UID: 0 PID: 365 Comm: arping Not tainted 6.17.0-rc2-virtme-g2a89cb21162c #2 PREEMPT(voluntary) Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.17.0-4.fc41 04/01/2014 RIP: 0010:vxlan_xmit+0xb58/0x15f0 [...] Call Trace: <TASK> dev_hard_start_xmit+0x5d/0x1c0 __dev_queue_xmit+0x246/0xfd0 packet_sendmsg+0x113a/0x1850 __sock_sendmsg+0x38/0x70 __sys_sendto+0x126/0x180 __x64_sys_sendto+0x24/0x30 do_syscall_64+0xa4/0x260 entry_SYSCALL_64_after_hwframe+0x4b/0x53 [2] #!/bin/bash ip address add 192.0.2.1/32 dev lo ip nexthop add id 1 via 192.0.2.2 fdb ip nexthop add id 10 group 1 fdb ip link add name vx0 up type vxlan id 10010 local 192.0.2.1 dstport 4789 proxy ip neigh add 192.0.2.3 lladdr 00:11:22:33:44:55 nud perm dev vx0 bridge fdb add 00:11:22:33:44:55 dev vx0 self static nhid 10 arping -b -c 1 -s 192.0.2.1 -I vx0 192.0.2.3 [3] BUG: kernel NULL pointer dereference, address: 0000000000000000 [...] CPU: 13 UID: 0 PID: 372 Comm: ndisc6 Not tainted 6.17.0-rc2-virtmne-g6ee90cb26014 #3 PREEMPT(voluntary) Hardware name: QEMU Standard PC (i440FX + PIIX, 1v996), BIOS 1.17.0-4.fc41 04/01/2x014 RIP: 0010:vxlan_xmit+0x803/0x1600 [...] Call Trace: <TASK> dev_hard_start_xmit+0x5d/0x1c0 __dev_queue_xmit+0x246/0xfd0 ip6_finish_output2+0x210/0x6c0 ip6_finish_output+0x1af/0x2b0 ip6_mr_output+0x92/0x3e0 ip6_send_skb+0x30/0x90 rawv6_sendmsg+0xe6e/0x12e0 __sock_sendmsg+0x38/0x70 __sys_sendto+0x126/0x180 __x64_sys_sendto+0x24/0x30 do_syscall_64+0xa4/0x260 entry_SYSCALL_64_after_hwframe+0x4b/0x53 RIP: 0033:0x7f383422ec77 [4] #!/bin/bash ip address add 2001:db8:1::1/128 dev lo ip nexthop add id 1 via 2001:db8:1::1 fdb ip nexthop add id 10 group 1 fdb ip link add name vx0 up type vxlan id 10010 local 2001:db8:1::1 dstport 4789 proxy ip neigh add 2001:db8:1::3 lladdr 00:11:22:33:44:55 nud perm dev vx0 bridge fdb add 00:11:22:33:44:55 dev vx0 self static nhid 10 ndisc6 -r 1 -s 2001:db8:1::1 -w 1 2001:db8:1::3 vx0 Fixes: 1274e1cc4226 ("vxlan: ecmp support for mac fdb entries") Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Nikolay Aleksandrov <razor@blackwall.org> Link: https://patch.msgid.link/20250901065035.159644-3-idosch@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-09-02vxlan: Fix NPD when refreshing an FDB entry with a nexthop objectIdo Schimmel
VXLAN FDB entries can point to either a remote destination or an FDB nexthop group. The latter is usually used in EVPN deployments where learning is disabled. However, when learning is enabled, an incoming packet might try to refresh an FDB entry that points to an FDB nexthop group and therefore does not have a remote. Such packets should be dropped, but they are only dropped after dereferencing the non-existent remote, resulting in a NPD [1] which can be reproduced using [2]. Fix by dropping such packets earlier. Remove the misleading comment from first_remote_rcu(). [1] BUG: kernel NULL pointer dereference, address: 0000000000000000 [...] CPU: 13 UID: 0 PID: 361 Comm: mausezahn Not tainted 6.17.0-rc1-virtme-g9f6b606b6b37 #1 PREEMPT(voluntary) Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.17.0-4.fc41 04/01/2014 RIP: 0010:vxlan_snoop+0x98/0x1e0 [...] Call Trace: <TASK> vxlan_encap_bypass+0x209/0x240 encap_bypass_if_local+0xb1/0x100 vxlan_xmit_one+0x1375/0x17e0 vxlan_xmit+0x6b4/0x15f0 dev_hard_start_xmit+0x5d/0x1c0 __dev_queue_xmit+0x246/0xfd0 packet_sendmsg+0x113a/0x1850 __sock_sendmsg+0x38/0x70 __sys_sendto+0x126/0x180 __x64_sys_sendto+0x24/0x30 do_syscall_64+0xa4/0x260 entry_SYSCALL_64_after_hwframe+0x4b/0x53 [2] #!/bin/bash ip address add 192.0.2.1/32 dev lo ip address add 192.0.2.2/32 dev lo ip nexthop add id 1 via 192.0.2.3 fdb ip nexthop add id 10 group 1 fdb ip link add name vx0 up type vxlan id 10010 local 192.0.2.1 dstport 12345 localbypass ip link add name vx1 up type vxlan id 10020 local 192.0.2.2 dstport 54321 learning bridge fdb add 00:11:22:33:44:55 dev vx0 self static dst 192.0.2.2 port 54321 vni 10020 bridge fdb add 00:aa:bb:cc:dd:ee dev vx1 self static nhid 10 mausezahn vx0 -a 00:aa:bb:cc:dd:ee -b 00:11:22:33:44:55 -c 1 -q Fixes: 1274e1cc4226 ("vxlan: ecmp support for mac fdb entries") Reported-by: Marlin Cremers <mcremers@cloudbear.nl> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Reviewed-by: Nikolay Aleksandrov <razor@blackwall.org> Link: https://patch.msgid.link/20250901065035.159644-2-idosch@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-09-02selftests: net: avoid memory leakZongmin Zhou
The buffer be used without free,fix it to avoid memory leak. Signed-off-by: Zongmin Zhou <zhouzongmin@kylinos.cn> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20250901054557.32811-1-min_halo@163.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-09-02net: macb: Validate the value of base_time properlyChandra Mohan Sundar
In macb_taprio_setup_replace(), the value of start_time is being compared against zero which would never be true since start_time is an unsigned value. Due to this there is a chance that an incorrect config base time value can be used for computation. Fix by checking the value of conf->base_time directly. This issue was reported by static coverity analyzer. Fixes: 89934dbf169e3 ("net: macb: Add TAPRIO traffic scheduling support") Signed-off-by: Chandra Mohan Sundar <chandramohan.explore@gmail.com> Reviewed-by: Vineeth Karumanchi <vineeth.karumanchi@amd.com> Link: https://patch.msgid.link/20250901162923.627765-1-chandramohan.explore@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>