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2025-09-05iommu/amd: Add support to remap/unmap IOMMU buffers for kdumpAshish Kalra
After a panic if SNP is enabled in the previous kernel then the kdump kernel boots with IOMMU SNP enforcement still enabled. IOMMU completion wait buffers (CWBs), command buffers and event buffer registers remain locked and exclusive to the previous kernel. Attempts to allocate and use new buffers in the kdump kernel fail, as hardware ignores writes to the locked MMIO registers as per AMD IOMMU spec Section 2.12.2.1. This results in repeated "Completion-Wait loop timed out" errors and a second kernel panic: "Kernel panic - not syncing: timer doesn't work through Interrupt-remapped IO-APIC" The list of MMIO registers locked and which ignore writes after failed SNP shutdown are mentioned in the AMD IOMMU specifications below: Section 2.12.2.1. https://docs.amd.com/v/u/en-US/48882_3.10_PUB Reuse the pages of the previous kernel for completion wait buffers, command buffers, event buffers and memremap them during kdump boot and essentially work with an already enabled IOMMU configuration and re-using the previous kernel’s data structures. Reusing of command buffers and event buffers is now done for kdump boot irrespective of SNP being enabled during kdump. Re-use of completion wait buffers is only done when SNP is enabled as the exclusion base register is used for the completion wait buffer (CWB) address only when SNP is enabled. Reviewed-by: Vasant Hegde <vasant.hegde@amd.com> Tested-by: Sairaj Kodilkar <sarunkod@amd.com> Signed-off-by: Ashish Kalra <ashish.kalra@amd.com> Link: https://lore.kernel.org/r/ff04b381a8fe774b175c23c1a336b28bc1396511.1756157913.git.ashish.kalra@amd.com Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2025-09-05drm/xe/migrate: Remove unneeded emit_pte() when copying CCS onlySanjay Yadav
In xe_migrate_copy(), when copy_only_ccs is true, we only need two emit_pte() calls one for the BO and one for the raw CCS storage. However, the current implementation issues three emit_pte() calls, resulting in an unnecessary PTE programming job. This fix removes the redundant emit_pte() call to avoid programming the same PTEs twice and reducing overhead during CCS-only migration. v2: Preserve correct behavior on DG2, which requires both CCS and page copies. Signed-off-by: Sanjay Yadav <sanjay.kumar.yadav@intel.com> Suggested-by: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Link: https://lore.kernel.org/r/20250904161423.2448727-1-sanjay.kumar.yadav@intel.com
2025-09-05iommu/apple-dart: Add 4-level page table supportHector Martin
The T8110 variant DART implementation on T602x SoCs indicates an IAS of 42, which requires an extra page table level. The extra level is optional, but let's implement it. Later it might be useful to restrict this based on the actual attached devices, since most won't need that much address space anyway. Signed-off-by: Hector Martin <marcan@marcan.st> Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Sven Peter <sven@kernel.org> Reviewed-by: Neal Gompa <neal@gompa.dev> Link: https://lore.kernel.org/r/20250821-apple-dart-4levels-v2-3-e39af79daa37@jannau.net Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2025-09-05iommu/io-pgtable-dart: Add 4-level page table supportHector Martin
DARTs on t602x SoCs are of the t8110 variant but have an IAS of 42, which means optional support for an extra page table level. Refactor the PTE management to support an arbitrary level count, and then calculate how many levels we need for any given configuration. Signed-off-by: Hector Martin <marcan@marcan.st> Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Sven Peter <sven@kernel.org> Reviewed-by: Neal Gompa <neal@gompa.dev> Link: https://lore.kernel.org/r/20250821-apple-dart-4levels-v2-2-e39af79daa37@jannau.net Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2025-09-05iommu/apple-dart: Make the hw register fields u32sHector Martin
The registers are 32-bit and the offsets definitely don't need 64 bits either, these should've been u32s. Signed-off-by: Hector Martin <marcan@marcan.st> Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Sven Peter <sven@kernel.org> Reviewed-by: Neal Gompa <neal@gompa.dev> Link: https://lore.kernel.org/r/20250821-apple-dart-4levels-v2-1-e39af79daa37@jannau.net Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2025-09-05iommu/amd: use str_plural() to simplify the codeXichao Zhao
Use the string choice helper function str_plural() to simplify the code. Signed-off-by: Xichao Zhao <zhao.xichao@vivo.com> Reviewed-by: Ankit Soni <Ankit.Soni@amd.com> Link: https://lore.kernel.org/r/20250818070556.458271-1-zhao.xichao@vivo.com Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2025-09-05drm/i915/display: Avoid divide by zeroJuha-Pekka Heikkila
skl_crtc_allocate_plane_ddb allow iter.data_rate to be zero which could cause divide by zero in skl_allocate_plane_ddb, check against that. Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Link: https://lore.kernel.org/r/20250905104626.1274147-3-juhapekka.heikkila@gmail.com
2025-09-05drm/i915/display: log fail from intel_sdvo_enable_hotplugJuha-Pekka Heikkila
Report in log if intel_sdvo_enable_hotplug failed Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Link: https://lore.kernel.org/r/20250905104626.1274147-2-juhapekka.heikkila@gmail.com
2025-09-05drm/i915/display: take out dead codeJuha-Pekka Heikkila
if __waitfor timeout, ret will have -ETIMEDOUT. Then if condition was met, and read_ret will have error that's handled. Then if ret was zero, read_ret was zero ksv_ready must have value. Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Link: https://lore.kernel.org/r/20250905104626.1274147-1-juhapekka.heikkila@gmail.com
2025-09-05dt-bindings: panel: lvds: Append edt,etml0700z8dha in panel-lvdsRaphael Gallais-Pou
List EDT ETML0700Z8DHA in the LVDS panel enumeration. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250829-drm-misc-next-v1-1-fedb48cf50dd@foss.st.com Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
2025-09-05drm/i915/dram: Print memory details even if something went wrongVille Syrjälä
Print the memory details even if the detection failed in some way but we continued the driver initialization anyway. It'll be easier to debug issues if we at least know what the final results were. And while at it also print the number of PSF GV points. Previously we only printed the QGV points. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-9-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2025-09-05drm/i915/dram: Don't call skl_get_dram_info()/skl_get_dram_type() on iclVille Syrjälä
Currently the icl codepaths first determine the memory type from the memory controller registers (via skl_get_dram_info()->skl_get_dram_type()) and then overwrite the results with icl_pcode_read_mem_global_info(). Get rid of the pointless (and potentially incorrect) skl_get_dram_type() stuff. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-8-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2025-09-05drm/i915/dram: Fix some spelling around the 16Gb DIMM w/aVille Syrjälä
Use consistent spelling when talking about the 16Gb DIMM w/a. Even currently language is a bit off as the w/a is actually about DIMMs with 16Gb DRAM devices on them, not the total capacity of the whole DIMM. But this language does more or less match how Bspec talks about this stuff. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-7-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2025-09-05drm/i915/dram: Move 16Gb DIMM detection fully to the skl/icl codepathsVille Syrjälä
We are incorrectly applying the 16Gb DIMM w/a (adding 1 extra usec to WM0 latency) on MTL+ even though the w/a is only needed for SKL/ICL. The current way of setting this is up is a bit of a disaster: 1. always set has_16gb_dimms=true for all platforms except BXT/GLK 2. has_16gb_dimms potentially gets overwritten with something else * BXT/GLK don't do anything since we never set has_16gb_dimms to begin with * skl_get_dram_info() overwrites has_16gb_dimms with the actual detection results for SKL/ICL/derivatives * gen12_get_dram_info() (correctly) resets has_16gb_dimms for TGL/ADL/derivatives * xelpdp_get_dram_info() doesn't do anything, leaving has_16gb_dimms incorrectly set for MTL+ Clean up the whole mess by only setting has_16gb_dimms in the SKL/ICL codepaths where we have the actual detection code for it. This avois applying the w/a incorrectly on MTL+. v2: Rewrite commit msg (Jani) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-6-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2025-09-05drm/i915/dram: s/wm_lv0.../has_16gb_dimms/Ville Syrjälä
The DRAM code shouldn't know anything about watermarks. Rename wm_lv_0_adjust_needed to has_16gb_dimms. How this gets used is up to the watermark code. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-5-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2025-09-05drm/i915/dram: Pack dram_info betterVille Syrjälä
struct dram_info has two holes in the middle. Shuffle things around to plug them. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2025-09-05drm/i915/dram: Use intel_dram_type_str() for pnvVille Syrjälä
Replace the hand rolled PNV memory type printk string stuff with intel_dram_type_str(). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-3-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2025-09-05drm/i915/dram: Populate PNV memory type accuratelyVille Syrjälä
If PNV doesn't have DDR3 then it has DDR2. Add the appropriate memory type for it. No functional change since we currently only care about the DDR3 vs. not difference. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2025-09-05drm/i915/hpd: Fix mtp_tc_hpd_enable_detection()Ville Syrjälä
Set the MTP TC hotplug bits in the correct register. Shouldn't matter really as this only gets used for eDP detection and there should be never eDP on TC ports on current hw. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250902153915.4423-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2025-09-05drm/xe: Fix broken kernel-doc for the struct xe_boMichal Wajdeczko
Use correct multi-line kernel-doc style if required. Some members were described only in the commit message. Some other members were described using wrong names. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Cc: Satyanarayana K V P <satyanarayana.k.v.p@intel.com> Reviewed-by: Satyanarayana K V P <satyanarayana.k.v.p@intel.com> Link: https://lore.kernel.org/r/20250904144026.7222-1-michal.wajdeczko@intel.com
2025-09-05drm/i915/display: Remove power state verification before HW readoutImre Deak
During system resume the display power state verification will print the "power well x state mismatch (refcount 0/enabled 1)" error message from the early resume sequence for a power well left enabled by BIOS. This power well was probably left enabled by BIOS inadvertently, since BIOS versions on current platforms do not leave any display output enabled while resuming from an Sx power state, hence the enabled display power well is unused. In theory however it is possible that BIOS leaves a display output enabled, in that case the enabled power well shouldn't be reported as an error. According to the above, remove the display power state verification from the early resume phase to avoid incorrectly reporting an enabled power well without a power reference as an error. Note: The refcount for any enabled and used power well (i.e. used for an enabled display output) will be acquired following the early resume sequence, after the HW state for display outputs (encoder/crtc etc.) is read out. Any power well enabled but not used (hence not holding a reference) will be disabled after the HW state readout. The display power state will be verified afterwards in intel_power_domains_enable(). Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/6012 Reviewed-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/20250903122152.2526050-1-imre.deak@intel.com
2025-09-05drm/sti: Remove redundant ternary operatorsLiao Yuanhong
For ternary operators in the form of "a ? true : false", if 'a' itself returns a boolean result, the ternary operator can be omitted. Remove redundant ternary operators to clean up the code. Signed-off-by: Liao Yuanhong <liaoyuanhong@vivo.com> Acked-by: Raphaël Gallais-Pou <rgallaispou@gmail.com> Link: https://lore.kernel.org/r/20250904112738.350652-1-liaoyuanhong@vivo.com Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
2025-09-05Merge tag 'md-6.17-20250905' of ↵Jens Axboe
https://git.kernel.org/pub/scm/linux/kernel/git/mdraid/linux into block-6.17 Pull MD fixes from Yu: "- fix data loss for writemostly in raid1, by Yu Kuai; - fix potentional data lost by skipping recovery, by Li Nan;" * tag 'md-6.17-20250905' of https://git.kernel.org/pub/scm/linux/kernel/git/mdraid/linux: md: prevent incorrect update of resync/recovery offset md/raid1: fix data lost for writemostly rdev
2025-09-05ASoC: replace use of system_unbound_wq with system_dfl_wqMarco Crivellari
Currently if a user enqueue a work item using schedule_delayed_work() the used wq is "system_wq" (per-cpu wq) while queue_delayed_work() use WORK_CPU_UNBOUND (used when a cpu is not specified). The same applies to schedule_work() that is using system_wq and queue_work(), that makes use again of WORK_CPU_UNBOUND. This lack of consistentcy cannot be addressed without refactoring the API. system_unbound_wq should be the default workqueue so as not to enforce locality constraints for random work whenever it's not required. Adding system_dfl_wq to encourage its use when unbound work should be used. queue_work() / queue_delayed_work() / mod_delayed_work() will now use the new unbound wq: whether the user still use the old wq a warn will be printed along with a wq redirect to the new one. The old system_unbound_wq will be kept for a few release cycles. Suggested-by: Tejun Heo <tj@kernel.org> Signed-off-by: Marco Crivellari <marco.crivellari@suse.com> Message-ID: <20250905091016.109428-2-marco.crivellari@suse.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2025-09-05ASoC: codecs: fs210x: Add NULL check in fs210x_register_snd_componentCharles Han
Add check for the return value of devm_kmemdup() to prevent potential null pointer dereference. Fixes: 756117701779 ("ASoC: codecs: Add FourSemi FS2104/5S audio amplifier driver") Signed-off-by: Charles Han <hanchunchao@inspur.com> Message-ID: <20250905091845.1559-1-hanchunchao@inspur.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2025-09-05drm/xe/kunit: Drop xe_wa_test_exitMichal Wajdeczko
Remove xe_wa_test_exit() as it could crach the KUnit kernel in case of hitting some asserts in xe_wa_test_init() as test->priv could not be pointing to expected data. | # xe_wa_gt: ASSERTION FAILED at drivers/gpu/drm/xe/tests/xe_wa_test.c:34 | Expected ret == 0, but | ret == -19 (0xffffffffffffffed) |Bus error - the host /dev/shm or /tmp mount likely just ran out of space |Kernel panic - not syncing: Kernel mode signal 7 Note that there is no need to call drm_kunit_helper_free_device() since our fake device allocated by drm_kunit_helper_alloc_device() will be cleaned up automatically. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://lore.kernel.org/r/20250829171922.572-7-michal.wajdeczko@intel.com
2025-09-05drm/xe/kunit: Promote fake platform parameter listMichal Wajdeczko
The list of all known representative platforms defined in xe_wa could be used in more places by other test suites. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://lore.kernel.org/r/20250829171922.572-6-michal.wajdeczko@intel.com
2025-09-05drm/xe/kunit: Drop custom struct platform_test_caseMichal Wajdeczko
Custom struct platform_test_case definition in xe_wa is now almost identical to generic struct xe_pci_fake_data defintiion except the .name member, which could be generated by xe_pci_fake_data_desc(). Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://lore.kernel.org/r/20250829171922.572-5-michal.wajdeczko@intel.com
2025-09-05drm/xe/kunit: Introduce xe_pci_fake_data_desc()Michal Wajdeczko
We already use struct xe_pci_fake_data to provide custom config of the fake PCI device and soon we will be using this struct also as direct parameter for the parameterized Xe KUnit tests. Add function to generate description based on that config data. For platform or subplatform name lookup pciidlist which already have definitions of all supported platforms. Examples: TIGERLAKE TIGERLAKE A0 TIGERLAKE SR-IOV PF ... PANTHERLAKE 30.00(Xe3_LPG) 30.00(Xe3_LPM) PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0 PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0 SR-IOV VF Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://lore.kernel.org/r/20250829171922.572-4-michal.wajdeczko@intel.com
2025-09-05drm/xe/kunit: Update struct xe_pci_fake_data step declarationsMichal Wajdeczko
The struct xe_pci_fake_data has fields that specify graphics and media stepping of the fake PCI device used during KUnit testing. Change definitions of those separate step fields and use existing struct xe_step_info definition that already have required fields. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://lore.kernel.org/r/20250829171922.572-3-michal.wajdeczko@intel.com
2025-09-05drm/xe: Allow to stub lookup for graphics and media IPMichal Wajdeczko
In upcoming patch we will want to replace lookup code during the test to relax the strict match that we use in production. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://lore.kernel.org/r/20250829171922.572-2-michal.wajdeczko@intel.com
2025-09-05drm/xe: improve dma-resv handling for backup objectMatthew Auld
Since the dma-resv is shared we don't need to reserve and add a fence slot fence twice, plus no need to loop through the dependencies. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Link: https://lore.kernel.org/r/20250829164715.720735-2-matthew.auld@intel.com
2025-09-05drm/xe/pt: unify xe_pt_svm_pre_commit with userptrMatthew Auld
We now use the same notifier lock for SVM and userptr, with that we can combine xe_pt_userptr_pre_commit and xe_pt_svm_pre_commit. v2: (Matt B) - Re-use xe_svm_notifier_lock/unlock for userptr. - Combine svm/userptr handling further down into op_check_svm_userptr. v3: - Only hide the ops if we lack DRM_GPUSVM, since we also need them for userptr. Suggested-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://lore.kernel.org/r/20250828142430.615826-18-matthew.auld@intel.com
2025-09-05drm/xe/userptr: replace xe_hmm with gpusvmMatthew Auld
Goal here is cut over to gpusvm and remove xe_hmm, relying instead on common code. The core facilities we need are get_pages(), unmap_pages() and free_pages() for a given useptr range, plus a vm level notifier lock, which is now provided by gpusvm. v2: - Reuse the same SVM vm struct we use for full SVM, that way we can use the same lock (Matt B & Himal) v3: - Re-use svm_init/fini for userptr. v4: - Allow building xe without userptr if we are missing DRM_GPUSVM config. (Matt B) - Always make .read_only match xe_vma_read_only() for the ctx. (Dafna) v5: - Fix missing conversion with CONFIG_DRM_XE_USERPTR_INVAL_INJECT v6: - Convert the new user in xe_vm_madise. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Cc: Dafna Hirschfeld <dafna.hirschfeld@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://lore.kernel.org/r/20250828142430.615826-17-matthew.auld@intel.com
2025-09-05drm/xe/vm: split userptr bits into separate fileMatthew Auld
This will simplify compiling out the bits that depend on DRM_GPUSVM in a later patch. Without this we end up littering the code with ifdef checks, plus it becomes hard to be sure that something won't blow at runtime due to something not being initialised, even though it passed the build. Should be no functional change here. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://lore.kernel.org/r/20250828142430.615826-16-matthew.auld@intel.com
2025-09-05drm/gpusvm: export drm_gpusvm_pages APIMatthew Auld
Export get/unmap/free pages API. We also need to tweak the SVM init to allow skipping much of the unneeded parts. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://lore.kernel.org/r/20250828142430.615826-15-matthew.auld@intel.com
2025-09-05drm/gpusvm: refactor core API to use pages structMatthew Auld
Refactor the core API of get/unmap/free pages to all operate on drm_gpusvm_pages. In the next patch we want to export a simplified core API without needing fully blown svm range etc. Suggested-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://lore.kernel.org/r/20250828142430.615826-14-matthew.auld@intel.com
2025-09-05drm/gpusvm: pull out drm_gpusvm_pages substructureMatthew Auld
Pull the pages stuff from the svm range into its own substructure, with the idea of having the main pages related routines, like get_pages(), unmap_pages() and free_pages() all operating on some lower level structures, which can then be re-used for stuff like userptr. v2: - Move seq into pages struct (Matt B) v3: - Small kernel-doc fixes Suggested-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://lore.kernel.org/r/20250828142430.615826-13-matthew.auld@intel.com
2025-09-05drm/gpusvm: use more selective dma dir in get_pages()Matthew Auld
If we are only reading the memory then from the device pov the direction can be DMA_TO_DEVICE. This aligns with the xe-userptr code. Using the most restrictive data direction to represent the access is normally a good idea. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://lore.kernel.org/r/20250828142430.615826-12-matthew.auld@intel.com
2025-09-05drm/gpusvm: fix hmm_pfn_to_map_order() usageMatthew Auld
Handle the case where the hmm range partially covers a huge page (like 2M), otherwise we can potentially end up doing something nasty like mapping memory which is outside the range, and maybe not even mapped by the mm. Fix is based on the xe userptr code, which in a future patch will directly use gpusvm, so needs alignment here. v2: - Add kernel-doc (Matt B) - s/fls/ilog2/ (Thomas) Reported-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Link: https://lore.kernel.org/r/20250828142430.615826-11-matthew.auld@intel.com
2025-09-05x86/mce: Remove __mcheck_cpu_init_early()Yazen Ghannam
The __mcheck_cpu_init_early() function was introduced so that some vendor-specific features are detected before the first MCA polling event done in __mcheck_cpu_init_generic(). Currently, __mcheck_cpu_init_early() is only used on AMD-based systems and additional code will be needed to support various system configurations. However, the current and future vendor-specific code should be done during vendor init. This keeps all the vendor code in a common location and simplifies the generic init flow. Move all the __mcheck_cpu_init_early() code into mce_amd_feature_init(). Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Nikolay Borisov <nik.borisov@suse.com> Tested-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/20250825-wip-mca-updates-v5-6-865768a2eef8@amd.com
2025-09-05x86/mce: Cleanup bank processing on initBorislav Petkov
Unify the bank preparation into __mcheck_cpu_init_clear_banks(), rename that function to what it does now - prepares banks. Do this so that generic and vendor banks init goes first so that settings done during that init can take effect before the first bank polling takes place. Move __mcheck_cpu_check_banks() into __mcheck_cpu_init_prepare_banks() as it already loops over the banks. The MCP_DONTLOG flag is no longer needed, since the MCA polling function is now called only if boot-time logging should be done. Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com> Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Tested-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/20250825-wip-mca-updates-v5-5-865768a2eef8@amd.com
2025-09-05x86/mce/amd: Put list_head in threshold_bankYazen Ghannam
The threshold_bank structure is a container for one or more threshold_block structures. Currently, the container has a single pointer to the 'first' threshold_block structure which then has a linked list of the remaining threshold_block structures. This results in an extra level of indirection where the 'first' block is checked before iterating over the remaining blocks. Remove the indirection by including the head of the block list in the threshold_bank structure which already acts as a container for all the bank's thresholding blocks. Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Tested-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/20250624-wip-mca-updates-v4-8-236dd74f645f@amd.com
2025-09-05x86/mce/amd: Remove smca_banks_mapYazen Ghannam
The MCx_MISC0[BlkPtr] field was used on legacy systems to hold a register offset for the next MCx_MISC* register. In this way, an implementation-specific number of registers can be discovered at runtime. The MCAX/SMCA register space simplifies this by always including the MCx_MISC[1-4] registers. The MCx_MISC0[BlkPtr] field is used to indicate (true/false) whether any MCx_MISC[1-4] registers are present. Currently, MCx_MISC0[BlkPtr] is checked early and cached to be used during sysfs init later. This is unnecessary as the MCx_MISC0 register is read again later anyway. Remove the smca_banks_map variable as it is effectively redundant, and use a direct register/bit check instead. [ bp: Zap smca_get_block_address() too. ] Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Tested-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/20250825-wip-mca-updates-v5-3-865768a2eef8@amd.com
2025-09-05x86/mce/amd: Remove return value for mce_threshold_{create,remove}_device()Yazen Ghannam
The return values are not checked, so set return type to 'void'. Also, move function declarations to internal.h, since these functions are only used within the MCE subsystem. Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Nikolay Borisov <nik.borisov@suse.com> Link: https://lore.kernel.org/20250624-wip-mca-updates-v4-6-236dd74f645f@amd.com
2025-09-05x86/mce/amd: Rename threshold restart functionYazen Ghannam
It operates per block rather than per bank. So rename it for clarity. No functional changes. Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/20250624-wip-mca-updates-v4-5-236dd74f645f@amd.com
2025-09-05drm/xe/xe2hpg: Add Wa_18041344222 for Xe2_HPGHarish Chegondi
Add Wa_18041344222 for Xe2_HPG that requires disabling the perf mode for subslice count for eustall sampling when the enabled slices are discontiguous. Bspec: 79483, 56024 Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: Harish Chegondi <harish.chegondi@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://lore.kernel.org/r/b6a631a13a9fb7360e89d679e0797fae42d5a09e.1756855529.git.harish.chegondi@intel.com Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2025-09-05drm/xe/mcr: Make xe_gt_mcr_get_dss_steering() input gt a constHarish Chegondi
Make gt, input parameter to xe_gt_mcr_get_dss_steering(), a constant. This would allow xe_gt_mcr_get_dss_steering() to be called from functions that have gt as const to struct xe_gt. Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: Harish Chegondi <harish.chegondi@intel.com> Link: https://lore.kernel.org/r/9dc621a90880f62ac8e2951afea7952277f7eb0e.1756855529.git.harish.chegondi@intel.com Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2025-09-05drm/panel: lvds: Remove unused members from main structureLiu Ying
Since commit 03fa454bb666 ("drm/panel: lvds: Simplify mode parsing"), the width and height members of struct panel_lvds are no longer used. Remove them. No functional change. Signed-off-by: Liu Ying <victor.liu@nxp.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com> Link: https://lore.kernel.org/r/20250829-panel-lvds-remove-width-height-v1-1-acecf0c84dc4@nxp.com
2025-09-05wifi: mwifiex: fix double free in mwifiex_send_rgpower_table()Dan Carpenter
The "hostcmd" is freed using cleanup.h, so calling kfree() will lead to a double free. Delete the kfree(). Fixes: 7b6f16a25806 ("wifi: mwifiex: add rgpower table loading support") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://patch.msgid.link/aLqZBh5_dSHUb4AE@stanley.mountain Signed-off-by: Johannes Berg <johannes.berg@intel.com>
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