summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2026-01-28vhost: move vdpa group bound check to vhost_vdpaEugenio Pérez
Remove duplication by consolidating these here. This reduces the posibility of a parent driver missing them. While we're at it, fix a bug in vdpa_sim where a valid ASID can be assigned to a group equal to ngroups, causing an out of bound write. Cc: stable@vger.kernel.org Fixes: bda324fd037a ("vdpasim: control virtqueue support") Acked-by: Jason Wang <jasowang@redhat.com> Signed-off-by: Eugenio Pérez <eperezma@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20260119143306.1818855-2-eperezma@redhat.com>
2026-01-28checkpatch: special-case cacheline group macrosMichael S. Tsirkin
Currently, cacheline group macros trigger checkpatch warnings. For example: $ ./scripts/checkpatch.pl -g ba7e025a6c84aed012421468d83639e5dae982b0 WARNING: Missing a blank line after declarations #58: FILE: drivers/gpio/gpio-virtio.c:32: + struct virtio_gpio_response res; + __dma_from_device_group_end(); $ ./scripts/checkpatch.pl -g 5d4cc87414c5d11345c4b11d61377d351b5c28a2 WARNING: Missing a blank line after declarations #267: FILE: include/net/sock.h:431: + int sk_rcvlowat; + __cacheline_group_end(sock_read_rx); But these are not actually statements - the following macros all expand to zero-length fields: __cacheline_group_begin() __cacheline_group_end() __cacheline_group_begin_aligned() __cacheline_group_end_aligned() __dma_from_device_group_begin() __dma_from_device_group_end() Add them to $declaration_macros so checkpatch recognizes this fact. Message-ID: <b345bb7e2d4e23672e3e5d1b283754dc11c7d8cd.1767647872.git.mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2026-01-28gpio: virtio: reorder fields to reduce struct paddingMichael S. Tsirkin
Reorder struct virtio_gpio_line fields to place the DMA buffers (req/res) last. This eliminates the padding from aligning struct size on ARCH_DMA_MINALIGN. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Message-ID: <f1221bbc120df6adaba9006710a517f1e84a10b2.1767601130.git.mst@redhat.com> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2026-01-28gpio: virtio: fix DMA alignmentMichael S. Tsirkin
The res and ires buffers in struct virtio_gpio_line and struct vgpio_irq_line respectively are used for DMA_FROM_DEVICE via virtqueue_add_sgs(). However, within these structs, even though these elements are tagged as ____cacheline_aligned, adjacent struct elements can share DMA cachelines on platforms where ARCH_DMA_MINALIGN > L1_CACHE_BYTES (e.g., arm64 with 128-byte DMA alignment but 64-byte cache lines). The existing ____cacheline_aligned annotation aligns to L1_CACHE_BYTES which is not always sufficient for DMA alignment. For example, with L1_CACHE_BYTES = 32 and ARCH_DMA_MINALIGN = 128 - irq_lines[0].ires at offset 128 - irq_lines[1].type at offset 192 both in same 128-byte DMA cacheline [128-256) When the device writes to irq_lines[0].ires and the CPU concurrently modifies one of irq_lines[1].type/disabled/masked/queued flags, corruption can occur on non-cache-coherent platforms. Fix by using __dma_from_device_group_begin()/end() annotations on the DMA buffers. Drop ____cacheline_aligned - it's not required to isolate request and response, and keeping them would increase the memory cost. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Message-ID: <ba7e025a6c84aed012421468d83639e5dae982b0.1767601130.git.mst@redhat.com> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2026-01-28vsock/virtio: reorder fields to reduce paddingMichael S. Tsirkin
Reorder struct virtio_vsock fields to place the DMA buffer (event_list) last. This eliminates the padding from aligning the struct size on ARCH_DMA_MINALIGN. Message-ID: <ce44f61af415521e00ab7492aa16d3d19f00bd5e.1769632071.git.mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2026-01-28clk: qcom: sm8750: Constify 'qcom_cc_desc' in SM8750 camccKrzysztof Kozlowski
'struct qcom_cc_desc' is passed to qcom_cc_map() and qcom_cc_really_probe() only as pointer to const, so make the memory const for safety. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260128154306.133047-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-28drm/amd/display: Clear HDMI HPD pending work only if it is enabledIvan Lipski
[Why&How] On amdgpu_dm_connector_destroy(), the driver attempts to cancel pending HDMI HPD work without checking if the HDMI HPD is enabled. Added a check that it is enabled before clearing it. Fixes: 6a681cd90345 ("drm/amd/display: Add an hdmi_hpd_debounce_delay_ms module") Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 17b2c526fd8026d8e0f4c0e7f94fc517e3901589)
2026-01-28compiler-context-analysis: Remove __assume_ctx_lock from initializersMarco Elver
Remove __assume_ctx_lock() from lock initializers. Implicitly asserting an active context during initialization caused false-positive double-lock errors when acquiring a lock immediately after its initialization. Moving forward, guarded member initialization must either: 1. Use guard(type_init)(&lock) or scoped_guard(type_init, ...). 2. Use context_unsafe() for simple initialization. Reported-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/all/57062131-e79e-42c2-aa0b-8f931cb8cac2@acm.org/ Link: https://patch.msgid.link/20260119094029.1344361-7-elver@google.com
2026-01-28tomoyo: Use scoped init guardMarco Elver
Convert lock initialization to scoped guarded initialization where lock-guarded members are initialized in the same scope. This ensures the context analysis treats the context as active during member initialization. This is required to avoid errors once implicit context assertion is removed. Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20260119094029.1344361-6-elver@google.com
2026-01-28crypto: Use scoped init guardMarco Elver
Convert lock initialization to scoped guarded initialization where lock-guarded members are initialized in the same scope. This ensures the context analysis treats the context as active during member initialization. This is required to avoid errors once implicit context assertion is removed. Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20260119094029.1344361-5-elver@google.com
2026-01-28kcov: Use scoped init guardMarco Elver
Convert lock initialization to scoped guarded initialization where lock-guarded members are initialized in the same scope. This ensures the context analysis treats the context as active during member initialization. This is required to avoid errors once implicit context assertion is removed. Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20260119094029.1344361-4-elver@google.com
2026-01-28compiler-context-analysis: Introduce scoped init guardsMarco Elver
Add scoped init guard definitions for common synchronization primitives supported by context analysis. The scoped init guards treat the context as active within initialization scope of the underlying context lock, given initialization implies exclusive access to the underlying object. This allows initialization of guarded members without disabling context analysis, while documenting initialization from subsequent usage. The documentation is updated with the new recommendation. Where scoped init guards are not provided or cannot be implemented (ww_mutex omitted for lack of multi-arg guard initializers), the alternative is to just disable context analysis where guarded members are initialized. Suggested-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/all/20251212095943.GM3911114@noisy.programming.kicks-ass.net/ Link: https://patch.msgid.link/20260119094029.1344361-3-elver@google.com
2026-01-28cleanup: Make __DEFINE_LOCK_GUARD handle commas in initializersMarco Elver
Initialization macros can expand to structure initializers containing commas, which when used as a "lock" function resulted in errors such as: >> include/linux/spinlock.h:582:56: error: too many arguments provided to function-like macro invocation 582 | DEFINE_LOCK_GUARD_1(raw_spinlock_init, raw_spinlock_t, raw_spin_lock_init(_T->lock), /* */) | ^ include/linux/spinlock.h:113:17: note: expanded from macro 'raw_spin_lock_init' 113 | do { *(lock) = __RAW_SPIN_LOCK_UNLOCKED(lock); } while (0) | ^ include/linux/spinlock_types_raw.h:70:19: note: expanded from macro '__RAW_SPIN_LOCK_UNLOCKED' 70 | (raw_spinlock_t) __RAW_SPIN_LOCK_INITIALIZER(lockname) | ^ include/linux/spinlock_types_raw.h:67:34: note: expanded from macro '__RAW_SPIN_LOCK_INITIALIZER' 67 | RAW_SPIN_DEP_MAP_INIT(lockname) } | ^ include/linux/cleanup.h:496:9: note: macro '__DEFINE_LOCK_GUARD_1' defined here 496 | #define __DEFINE_LOCK_GUARD_1(_name, _type, _lock) \ | ^ include/linux/spinlock.h:582:1: note: parentheses are required around macro argument containing braced initializer list 582 | DEFINE_LOCK_GUARD_1(raw_spinlock_init, raw_spinlock_t, raw_spin_lock_init(_T->lock), /* */) | ^ | ( include/linux/cleanup.h:558:60: note: expanded from macro 'DEFINE_LOCK_GUARD_1' 558 | __DEFINE_UNLOCK_GUARD(_name, _type, _unlock, __VA_ARGS__) \ | ^ Make __DEFINE_LOCK_GUARD_0 and __DEFINE_LOCK_GUARD_1 variadic so that __VA_ARGS__ captures everything. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://patch.msgid.link/20260119094029.1344361-2-elver@google.com
2026-01-28Merge branch 'ftrace-bpf-use-single-direct-ops-for-bpf-trampolines'Andrii Nakryiko
Jiri Olsa says: ==================== ftrace,bpf: Use single direct ops for bpf trampolines hi, while poking the multi-tracing interface I ended up with just one ftrace_ops object to attach all trampolines. This change allows to use less direct API calls during the attachment changes in the future code, so in effect speeding up the attachment. In current code we get a speed up from using just a single ftrace_ops object. - with current code: Performance counter stats for 'bpftrace -e fentry:vmlinux:ksys_* {} -c true': 6,364,157,902 cycles:k 828,728,902 cycles:u 1,064,803,824 instructions:u # 1.28 insn per cycle 23,797,500,067 instructions:k # 3.74 insn per cycle 4.416004987 seconds time elapsed 0.164121000 seconds user 1.289550000 seconds sys - with the fix: Performance counter stats for 'bpftrace -e fentry:vmlinux:ksys_* {} -c true': 6,535,857,905 cycles:k 810,809,429 cycles:u 1,064,594,027 instructions:u # 1.31 insn per cycle 23,962,552,894 instructions:k # 3.67 insn per cycle 1.666961239 seconds time elapsed 0.157412000 seconds user 1.283396000 seconds sys The speedup seems to be related to the fact that with single ftrace_ops object we don't call ftrace_shutdown anymore (we use ftrace_update_ops instead) and we skip the synchronize rcu calls (each ~100ms) at the end of that function. rfc: https://lore.kernel.org/bpf/20250729102813.1531457-1-jolsa@kernel.org/ v1: https://lore.kernel.org/bpf/20250923215147.1571952-1-jolsa@kernel.org/ v2: https://lore.kernel.org/bpf/20251113123750.2507435-1-jolsa@kernel.org/ v3: https://lore.kernel.org/bpf/20251120212402.466524-1-jolsa@kernel.org/ v4: https://lore.kernel.org/bpf/20251203082402.78816-1-jolsa@kernel.org/ v5: https://lore.kernel.org/bpf/20251215211402.353056-10-jolsa@kernel.org/ v6 changes: - rename add_hash_entry_direct to add_ftrace_hash_entry_direct [Steven] - factor hash_add/hash_sub [Steven] - add kerneldoc header for update_ftrace_direct_* functions [Steven] - few assorted smaller fixes [Steven] - added missing direct_ops wrappers for !CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS case [Steven] v5 changes: - do not export ftrace_hash object [Steven] - fix update_ftrace_direct_add new_filter_hash leak [ci] v4 changes: - rebased on top of bpf-next/master (with jmp attach changes) added patch 1 to deal with that - added extra checks for update_ftrace_direct_del/mod to address the ci bot review v3 changes: - rebased on top of bpf-next/master - fixed update_ftrace_direct_del cleanup path - added missing inline to update_ftrace_direct_* stubs v2 changes: - rebased on top fo bpf-next/master plus Song's livepatch fixes [1] - renamed the API functions [2] [Steven] - do not export the new api [Steven] - kept the original direct interface: I'm not sure if we want to melt both *_ftrace_direct and the new interface into single one. It's bit different in semantic (hence the name change as Steven suggested [2]) and I don't think the changes are not that big so we could easily keep both APIs. v1 changes: - make the change x86 specific, after discussing with Mark options for arm64 [Mark] thanks, jirka [1] https://lore.kernel.org/bpf/20251027175023.1521602-1-song@kernel.org/ [2] https://lore.kernel.org/bpf/20250924050415.4aefcb91@batman.local.home/ --- ==================== Link: https://patch.msgid.link/20251230145010.103439-1-jolsa@kernel.org Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
2026-01-28bpf,x86: Use single ftrace_ops for direct callsJiri Olsa
Using single ftrace_ops for direct calls update instead of allocating ftrace_ops object for each trampoline. With single ftrace_ops object we can use update_ftrace_direct_* api that allows multiple ip sites updates on single ftrace_ops object. Adding HAVE_SINGLE_FTRACE_DIRECT_OPS config option to be enabled on each arch that supports this. At the moment we can enable this only on x86 arch, because arm relies on ftrace_ops object representing just single trampoline image (stored in ftrace_ops::direct_call). Archs that do not support this will continue to use *_ftrace_direct api. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Acked-by: Andrii Nakryiko <andrii@kernel.org> Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org> Link: https://lore.kernel.org/bpf/20251230145010.103439-10-jolsa@kernel.org
2026-01-28ftrace: Factor ftrace_ops ops_func interfaceJiri Olsa
We are going to remove "ftrace_ops->private == bpf_trampoline" setup in following changes. Adding ip argument to ftrace_ops_func_t callback function, so we can use it to look up the trampoline. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org> Link: https://lore.kernel.org/bpf/20251230145010.103439-9-jolsa@kernel.org
2026-01-28bpf: Add trampoline ip hash tableJiri Olsa
Following changes need to lookup trampoline based on its ip address, adding hash table for that. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Link: https://lore.kernel.org/bpf/20251230145010.103439-8-jolsa@kernel.org
2026-01-28ftrace: Add update_ftrace_direct_mod functionJiri Olsa
Adding update_ftrace_direct_mod function that modifies all entries (ip -> direct) provided in hash argument to direct ftrace ops and updates its attachments. The difference to current modify_ftrace_direct is: - hash argument that allows to modify multiple ip -> direct entries at once This change will allow us to have simple ftrace_ops for all bpf direct interface users in following changes. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org> Link: https://lore.kernel.org/bpf/20251230145010.103439-7-jolsa@kernel.org
2026-01-28ftrace: Add update_ftrace_direct_del functionJiri Olsa
Adding update_ftrace_direct_del function that removes all entries (ip -> addr) provided in hash argument to direct ftrace ops and updates its attachments. The difference to current unregister_ftrace_direct is - hash argument that allows to unregister multiple ip -> direct entries at once - we can call update_ftrace_direct_del multiple times on the same ftrace_ops object, becase we do not need to unregister all entries at once, we can do it gradualy with the help of ftrace_update_ops function This change will allow us to have simple ftrace_ops for all bpf direct interface users in following changes. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org> Link: https://lore.kernel.org/bpf/20251230145010.103439-6-jolsa@kernel.org
2026-01-28ftrace: Add update_ftrace_direct_add functionJiri Olsa
Adding update_ftrace_direct_add function that adds all entries (ip -> addr) provided in hash argument to direct ftrace ops and updates its attachments. The difference to current register_ftrace_direct is - hash argument that allows to register multiple ip -> direct entries at once - we can call update_ftrace_direct_add multiple times on the same ftrace_ops object, becase after first registration with register_ftrace_function_nolock, it uses ftrace_update_ops to update the ftrace_ops object This change will allow us to have simple ftrace_ops for all bpf direct interface users in following changes. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org> Link: https://lore.kernel.org/bpf/20251230145010.103439-5-jolsa@kernel.org
2026-01-28ftrace: Export some of hash related functionsJiri Olsa
We are going to use these functions in following changes. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org> Link: https://lore.kernel.org/bpf/20251230145010.103439-4-jolsa@kernel.org
2026-01-28ftrace: Make alloc_and_copy_ftrace_hash direct friendlyJiri Olsa
Make alloc_and_copy_ftrace_hash to copy also direct address for each hash entry. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org> Link: https://lore.kernel.org/bpf/20251230145010.103439-3-jolsa@kernel.org
2026-01-28ftrace,bpf: Remove FTRACE_OPS_FL_JMP ftrace_ops flagJiri Olsa
At the moment the we allow the jmp attach only for ftrace_ops that has FTRACE_OPS_FL_JMP set. This conflicts with following changes where we use single ftrace_ops object for all direct call sites, so all could be be attached via just call or jmp. We already limit the jmp attach support with config option and bit (LSB) set on the trampoline address. It turns out that's actually enough to limit the jmp attach for architecture and only for chosen addresses (with LSB bit set). Each user of register_ftrace_direct or modify_ftrace_direct can set the trampoline bit (LSB) to indicate it has to be attached by jmp. The bpf trampoline generation code uses trampoline flags to generate jmp-attach specific code and ftrace inner code uses the trampoline bit (LSB) to handle return from jmp attachment, so there's no harm to remove the FTRACE_OPS_FL_JMP bit. The fexit/fmodret performance stays the same (did not drop), current code: fentry : 77.904 ± 0.546M/s fexit : 62.430 ± 0.554M/s fmodret : 66.503 ± 0.902M/s with this change: fentry : 80.472 ± 0.061M/s fexit : 63.995 ± 0.127M/s fmodret : 67.362 ± 0.175M/s Fixes: 25e4e3565d45 ("ftrace: Introduce FTRACE_OPS_FL_JMP") Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Acked-by: Andrii Nakryiko <andrii@kernel.org> Reviewed-by: Steven Rostedt (Google) <rostedt@goodmis.org> Link: https://lore.kernel.org/bpf/20251230145010.103439-2-jolsa@kernel.org
2026-01-28ASoC: soc-core: add lockdep_assert_held() at snd_soc_unregister_dai()Kuninori Morimoto
snd_soc_register_dai() has lockdep_assert_held() (A), but snd_soc_unregister_dai() doesn't have lockdep_assert_held() (B). void snd_soc_unregister_dai(...) { (B) dev_dbg(...); list_del(...); } struct snd_soc_dai *snd_soc_register_dai(...) { ... (A) lockdep_assert_held(&client_mutex); ... } Both functions should be called with client_mutex lock. Add missing lockdep_assert_held() at snd_soc_unregister_dai(). Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://patch.msgid.link/87jyx21nu4.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-01-28Merge tag 'nvme-6.19-2026-01-28' of git://git.infradead.org/nvme into block-6.19Jens Axboe
Pull NVMe fixes from Keith: "- TCP target completion race condition fix (Ming) - DMA descriptor cleanup fix (Roger)" * tag 'nvme-6.19-2026-01-28' of git://git.infradead.org/nvme: nvme-pci: DMA unmap the correct regions in nvme_free_sgls nvmet: fix race in nvmet_bio_done() leading to NULL pointer dereference
2026-01-28HID: sony: Use pm_ptr instead of #ifdef CONFIG_PMBastien Nocera
This increases build coverage and allows to drop an #ifdef. Signed-off-by: Bastien Nocera <hadess@hadess.net> Signed-off-by: Jiri Kosina <jkosina@suse.com>
2026-01-28HID: wacom: Use pm_ptr instead of #ifdef CONFIG_PMBastien Nocera
This increases build coverage and allows to drop an #ifdef. Signed-off-by: Bastien Nocera <hadess@hadess.net> Signed-off-by: Jiri Kosina <jkosina@suse.com>
2026-01-28HID: uclogic: Use pm_ptr instead of #ifdef CONFIG_PMBastien Nocera
This increases build coverage and allows to drop an #ifdef. Signed-off-by: Bastien Nocera <hadess@hadess.net> Signed-off-by: Jiri Kosina <jkosina@suse.com>
2026-01-28HID: hid-sensor-hub: Use pm_ptr instead of #ifdef CONFIG_PMBastien Nocera
This increases build coverage and allows to drop an #ifdef. Signed-off-by: Bastien Nocera <hadess@hadess.net> Signed-off-by: Jiri Kosina <jkosina@suse.com>
2026-01-28HID: picolcd_core: Use pm_ptr instead of #ifdef CONFIG_PMBastien Nocera
This increases build coverage and allows to drop an #ifdef. Signed-off-by: Bastien Nocera <hadess@hadess.net> Signed-off-by: Jiri Kosina <jkosina@suse.com>
2026-01-28HID: nintendo: Use pm_ptr instead of #ifdef CONFIG_PMBastien Nocera
This increases build coverage and allows to drop an #ifdef. Signed-off-by: Bastien Nocera <hadess@hadess.net> Signed-off-by: Jiri Kosina <jkosina@suse.com>
2026-01-28HID: logitech-dj: Use pm_ptr instead of #ifdef CONFIG_PMBastien Nocera
This increases build coverage and allows to drop an #ifdef. Signed-off-by: Bastien Nocera <hadess@hadess.net> Signed-off-by: Jiri Kosina <jkosina@suse.com>
2026-01-28HID: lenovo: Use pm_ptr instead of #ifdef CONFIG_PMBastien Nocera
This increases build coverage and allows to drop an #ifdef. Signed-off-by: Bastien Nocera <hadess@hadess.net> Signed-off-by: Jiri Kosina <jkosina@suse.com>
2026-01-28HID: asus: Use pm_ptr instead of #ifdef CONFIG_PMBastien Nocera
This increases build coverage and allows to drop an #ifdef. Signed-off-by: Bastien Nocera <hadess@hadess.net> Signed-off-by: Jiri Kosina <jkosina@suse.com>
2026-01-28HID: appletb-kbd: Use pm_ptr instead of #ifdef CONFIG_PMBastien Nocera
This increases build coverage and allows to drop an #ifdef. Signed-off-by: Bastien Nocera <hadess@hadess.net> Signed-off-by: Jiri Kosina <jkosina@suse.com>
2026-01-28HID: hid-alps: Use pm_ptr instead of #ifdef CONFIG_PMBastien Nocera
This increases build coverage and allows to drop an #ifdef. Signed-off-by: Bastien Nocera <hadess@hadess.net> Signed-off-by: Jiri Kosina <jkosina@suse.com>
2026-01-28cpufreq: CPPC: Add generic helpers for sysfs show/storeSumit Gupta
Add generic helper functions for u64 sysfs attributes that follow the common pattern of calling CPPC get/set APIs: - cppc_cpufreq_sysfs_show_u64(): reads value and handles -EOPNOTSUPP - cppc_cpufreq_sysfs_store_u64(): parses input and calls set function Add CPPC_CPUFREQ_ATTR_RW_U64() macro to generate show/store functions using these helpers, reducing boilerplate for simple attributes. Convert auto_act_window and energy_performance_preference_val to use the new macro. No functional changes. Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Reviewed-by: Lifeng Zheng <zhenglifeng1@huawei.com> [ rjw: Retained empty code line after a conditional ] Link: https://patch.msgid.link/20260120145623.2959636-2-sumitg@nvidia.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2026-01-28Merge tag 'qcom-arm32-for-6.20-2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt More Qualcomm Arm32 DeviceTree updated for v6.20 MSM8226 is switched to generic RPMPD_ indices, to allow dropping the duplicate platform-specific constants. On MSM8960 two additional GSBIs and I2C controllers are introduced. Accelerometer, Magnetometer, NFC and Light/Proximity sensors are then enabled on the Samsung Galaxy Express. * tag 'qcom-arm32-for-6.20-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: switch to RPMPD_* indices ARM: dts: qcom: msm8960: expressatt: Add Accelerometer ARM: dts: qcom: msm8960: expressatt: Add Magnetometer ARM: dts: qcom: msm8960: expressatt: Add NFC ARM: dts: qcom: msm8960: expressatt: Add Light/Proximity Sensor ARM: dts: qcom: msm8960: Add GSBI2 & GSBI7 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-28Merge tag 'qcom-arm64-for-6.20-2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt More Qualcomm Arm64 DeviceTree updates for v6.20 Enable ADSP FastRPC and add missing GPU memory regions on Agatti. Also add the missing GPU regions on SM6115. Describe the application subsystem watchdog on Hamoa and enable this in the EL2 configurations. Add the camera control interface (CCI) I2C controller on MSM8953, and describe the camera regulators and the camera EEPROM on Fairphone FP3. Specify clock frequency for the i2c4 bus on OnePlus 6, to silence the warnings about missing frequency definition. Add FastRPC and associated heap memory, as well as Coresight, on SM8750 Switch a variety of platforms to use the generic RPMPD_ constants, instead of target-specific duplicated, to allow us to drop these from the header files. Drop the invalid opp-shared on the QUP OPP table for Talos. * tag 'qcom-arm64-for-6.20-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: dts: qcom: sm6115: Add CX_MEM/DBGC GPU regions arm64: dts: qcom: agatti: Add CX_MEM/DBGC GPU regions arm64: dts: qcom: sm8750: add ADSP fastrpc-compute-cb nodes arm64: dts: qcom: sm8750: add memory node for adsp fastrpc arm64: dts: qcom: switch to RPMPD_* indices arm64: dts: qcom: oneplus-enchilada: Specify i2c4 clock frequency arm64: dts: qcom: sm6350: Add clocks for aggre1 & aggre2 NoC arm64: dts: qcom: agatti: enable FastRPC on the ADSP arm64: qcom: dts: sm8750: add coresight nodes arm64: dts: qcom: talos: Drop opp-shared from QUP OPP table arm64: dts: qcom: x1-el2: Enable the APSS watchdog arm64: dts: qcom: hamoa: Add the APSS watchdog dt-bindings: watchdog: Document X1E80100 compatible arm64: dts: qcom: sdm632-fairphone-fp3: Enable CCI and add EEPROM arm64: dts: qcom: sdm632-fairphone-fp3: Add camera fixed regulators arm64: dts: qcom: msm8953: Add CCI nodes arm64: dts: qcom: msm8953: Re-sort tlmm pinctrl states Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-28Merge tag 'v6.20-rockchip-dts64-2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt New boards: Anberic RG-DS game console, Radxa CM3J module + baseboard for the Rpi CM4 IO board, QNAP TS133 from the RK3568 NAS series. 2 display outputs for the Lion board (old RK3368), TPS65185 pmic for the PineNote and fixes for the PCIe ranges on both RK356x and RK3588. These came quite late, so I wanted to give them the time till 6.20-rc1 and have them migrate to stable-kernels afterwards. The rest is small stuff on a number of boards wrt gpios and compatibles. * tag 'v6.20-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (25 commits) arm64: dts: rockchip: Fix rk3588 PCIe range mappings arm64: dts: rockchip: Fix rk356x PCIe range mappings arm64: dts: rockchip: Add Anbernic RG-DS dt-bindings: input: touchscreen: goodix: Add "panel" property dt-bindings: arm: rockchip: Add Anbernic RG-DS arm64: dts: rockchip: Explicitly request UFS reset pin on RK3576 arm64: dts: rockchip: Add TPS65185 for PineNote arm64: dts: rockchip: Do not enable hdmi_sound node on Pinebook Pro arm64: dts: rockchip: Fix imx258 variant on pinephone pro arm64: dts: rockchip: Add the Video-Demo overlay for Lion Haikou arm64: dts: rockchip: Enable pwm1 on rk3368-lion-haikou arm64: dts: rockchip: Enable HDMI output on RK3368-Lion-Haikou arm64: dts: rockchip: Add HDMI node to RK3368 arm64: dts: rockchip: Use phandle for i2c_lvds_blc on rk3368-lion haikou arm64: dts: rockchip: Fix SD card support for RK3576 Nanopi R76s arm64: dts: rockchip: Fix SD card support for RK3576 EVB1 arm64: dts: rockchip: Add Radxa CM3J on RPi CM4 IO Board arm64: dts: rockchip: Add Radxa CM3J dt-bindings: arm: rockchip: Add Radxa CM3J on RPi CM4 IO Board arm64: dts: rockchip: Make eeprom read-only for Radxa ROCK 3C/5A/5C ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-28Merge tag 'v6.20-rockchip-dts32-2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt Removal of the obsolete mshc aliases from RK3036. * tag 'v6.20-rockchip-dts32-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: rk3036: remove mshc aliases Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-28Merge tag 'cix-dt-binding-v6.20-rc1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/cix into soc/dt - Add OrangePi 6 Plus board * tag 'cix-dt-binding-v6.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/cix: dt-bindings: arm: cix: add OrangePi 6 Plus board Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-28Merge tag 'at91-dt-6.20' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt Microchip AT91 device tree updates for v6.20 This update includes: - update the SAMA7D65 flexcom nodes to add the missing i2c, spi, and usart child nodes; the flexcom child nodes were also updated with DMA properties - add basic support for the PCB8385 board, based on LAN966X SoC - drop usb_a9g20-dab-mmx.dtsi as it is not used anywhere in the tree * tag 'at91-dt-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: microchip: Drop usb_a9g20-dab-mmx.dtsi ARM: dts: Add support for pcb8385 dt-bindings: arm: at91: add lan966 pcb8385 board ARM: dts: microchip: sama7d65: add missing flexcom nodes ARM: dts: microchip: sama7d65: add fifo-size to usart ARM: dts: microchip: sama7d65: add dma properties to usart6 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-28Merge tag 'cix-dt-v6.20-rc1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/cix into soc/dt - add OrangePi 6 Plus board - one small improvement * tag 'cix-dt-v6.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/cix: arm64: dts: cix: Add OrangePi 6 Plus board support arm64: dts: cix: Use lowercase hex Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-28Merge tag 'mvebu-dt64-6.20-1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt mvebu dt64 for 6.20 (part 1) Add support for Armada 7020 Express Type 7 CPU module board by Marvell, including: - COM Express CPU module and carrier board (Marvell DB-98CX85x0) - DDR4 memory, 1Gbit OOB Ethernet, 10G KR Ethernet, NAND/SPI flash, PCIe, SATA, USB, and UART interfaces Add SoC-specific compatibles for SafeXcel crypto engine on Armada 37xx and CP11x Fix regulator type from "regulator-gpio" to "regulator-fixed" where no GPIO control is present Add missing GPIO properties for "nxp,pca9536" on cn9131-cf-solidwan Fix and clean up pinctrl-names properties and typos Add missing "#phy-cells" to "usb-nop-xceiv" nodes MAINTAINERS: Add Falcon DB to the list of maintained Marvell Armada dts files * tag 'mvebu-dt64-6.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: MAINTAINERS: Add Falcon DB arm64: dts: a7k: add COM Express boards arm64: dts: marvell: Add SoC specific compatibles to SafeXcel crypto arm64: dts: marvell: change regulator-gpio to regulator-fixed arm64: dts: marvell: cn9131-cf-solidwan: Add missing GPIO properties on "nxp,pca9536" arm64: dts: marvell: Fix stray and typo "pinctrl-names" properties arm64: dts: marvell: Add missing "#phy-cells" to "usb-nop-xceiv" Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-28Merge tag 'mtk-dts64-for-v6.20' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt MediaTek ARM64 Device Tree updates This adds support for new boards and variants based on different already supported MediaTek SoCs, and improves support for current boards. In particular: - New machines: - Ezurio Tungsten 510 (MediaTek Genio 510 SoC) - Ezurio Tungsten 700 (MediaTek Genio 700 SoC) ...improvements for already supported SoCs and machines: - MT7981b gains support for PCI-Express, USB, Ethernet and for the "GED" WiFi HW offload - OpenWRT One board gains support for the same - MT8188/8195/8390/8395 gains support for the DPI1 interface and HDMI output from the SoC's HDMI Tx controller along with its HDMI PHY and DDC IPs, usable on a selection of boards that expose a HDMI connector, namely: - All MT8390 Genio EVK based boards - All MT8395 Genio EVK based boards - Radxa NIO-12L (MT8395) ...and dtbs_check warning fixes for many of the MTK devicetrees, including MT6795, MT7981, MT7986, MT7988, MT8173, MT8183, MT8186, MT8188, MT8192, and a dts coding style fix for Airoha EN7581-EVB. This also includes a fix for the new devicetree overlay warnings, adding dtbs with applied overlays for all of the devices having at least one overlay. * tag 'mtk-dts64-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: (47 commits) arm64: dts: mediatek: mt8192: Rename mt8192-afe-pcm to audio-controller dt-bindings: arm: mediatek: audsys: Support mt8192-audsys variant arm64: dts: mediatek: mt7988a: Fix PCI-Express T-PHY node address arm64: dts: mediatek: mt8186-evb: Add vproc fixed regulator arm64: dts: mediatek: mt7981b-openwrt-one: Add address/size cells to eth arm64: dts: mediatek: mt8183-kukui: Clean up IT6505 regulator supply arm64: dts: mediatek: mt7986a: Change compatible for SafeXcel crypto arm64: dts: mediatek: mt8173-evb: Add interrupts to DA9211 regulator arm64: dts: mediatek: mt6795-xperia-m5: Rename PMIC leds node arm64: dts: mediatek: mt6795: Fix issues in SCPSYS node arm64: dts: mediatek: mt6331: Fix VCAM IO regulator name arm64: dts: mediatek: mt6795-xperia-m5: Add UHS pins for MMC1 and 2 arm64: dts: mediatek: mt8192-asurada: Remove unused clock-stretch-ns arm64: dts: mediatek: mt8173-elm: Remove regulators from thermal node arm64: dts: mediatek: mt8173-elm: Fix dsi0 ports warning arm64: dts: mediatek: mt8173-elm: Fix bluetooth node name and reorder arm64: dts: mediatek: mt8183-pumpkin: Fix pinmux node names arm64: dts: mediatek: mt8183-jacuzzi-pico6: Fix typo in pinmux node arm64: dts: mediatek: mt7981b-openwrt-one: Remove useless cells from flash@0 arm64: dts: mediatek: mt8183-evb: Fix dtbs_check warnings ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-28Merge tag 'omap-for-v6.20/dt-signed' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap into soc/dt ARM: dts: OMAP updates for v6.20 * tag 'omap-for-v6.20/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap: ARM: dts: omap: dra7: Remove bogus #syscon-cells property ARM: dts: ti/omap: omap*: fix watchdog node names ARM: dts: ti: Drop unused .dtsi ARM: dts: Drop am335x-base0033 devicetree ARM: dts: tps65910: Add gpio & interrupt properties ARM: dts: omap: enable panic-indicator option ARM: dts: ti/omap: omap4-epson-embt2ws: add powerbutton Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-28Merge tag 'sunxi-dt-for-6.20' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt Allwinner device tree changes for 6.20 Not many changes this cycle. - The A523 family of SoCs gained support for SPI controllers. - Some cleanup of old ARM device tree files to fix DT binding validation errors. - D1 and A100 SoCs gained support for their LED controller. This was from a couple years ago. The driver made it in, but the DT patches were missed. - D1 and T113 SoCs gained support for the internal thermal sensor. * tag 'sunxi-dt-for-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: riscv: dts: allwinner: d1: Add CPU thermal sensor and zone ARM: dts: allwinner: Replace status "failed" with "fail" riscv: dts: allwinner: d1: Add RGB LEDs to boards riscv: dts: allwinner: d1: Add LED controller node arm64: dts: allwinner: a100: Add LED controller node ARM: dts: allwinner: sun5i-a13-utoo-p66: delete "power-gpios" property arm64: dts: allwinner: t527: orangepi-4a: Enable SPI-NOR flash arm64: dts: allwinner: sun55i: Add SPI controllers Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-28Merge tag 'amlogic-arm-dt-for-v6.20' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt Amlogic ARM DT for v6.20: - drop iio-hwmon in favour of generic-adc-thermal * tag 'amlogic-arm-dt-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: ARM: dts: meson: drop iio-hwmon in favour of generic-adc-thermal Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-01-28Merge tag 'amlogic-arm64-dt-for-v6.20' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt Amlogic ARM64 DT for v6.20: - Cleanups: - Use lowercase hex - Use hyphen in node names - move CPU OPP table and clock assignment to SoC.dtsi - drop useless assigned-clock-parents - MMC clock fixup across multiple families - Add type-c controller on Radxa Zero 2 and enable NPU - New board: - Khadas VIM1s based on Amlogic S4 * tag 'amlogic-arm64-dt-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: arm64: dts: amlogic: meson-s4-s905y4-khadas-vim1s: enable SDIO interface arm64: dts: amlogic: add the type-c controller on Radxa Zero 2 arm64: dts: amlogic: meson-sm1-odroid: Eliminate Odroid HC4 power glitches during boot. arm64: dts: amlogic: meson-s4-s905y4-khadas-vim1s: enable eMMC storage arm64: dts: meson-s4-s905y4-khadas-vim1s: add initial device tree arm64: dts: meson-s4-aq222: update compatible string with s805x2 dt-bindings: arm: amlogic: introduce specific compatibles for S4 family arm64: dts: amlogic: Enable the npu node on Radxa Zero 2 arm64: dts: amlogic: g12: assign the MMC A signal clock arm64: dts: amlogic: g12: assign the MMC B and C signal clocks arm64: dts: amlogic: gx: assign the MMC signal clocks arm64: dts: amlogic: axg: assign the MMC signal clocks arm64: dts: amlogic: a1: align the mmc clock setup arm64: dts: amlogic: c3: assign the MMC signal clocks arm64: dts: amlogic: s4: fix mmc clock assignment arm64: dts: amlogic: s4: assign mmc b clock to 24MHz arm64: dts: amlogic: drop useless assigned-clock-parents arm64: dts: amlogic: move CPU OPP table and clock assignment to SoC.dtsi arm64: dts: amlogic: Use lowercase hex arm64: dts: amlogic: Use hyphen in node names Signed-off-by: Arnd Bergmann <arnd@arndb.de>