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2025-10-27arm64: dts: ls1046a-qds: describe the FPGA based GPIO controllerIoana Ciornei
The QIXIS FPGA node is extended so that it describes the GPIO controller responsible for all the status presence lines on both SFP+ cages as well as the IO SLOTs present on the board. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-27arm64: dts: lx2160a-rdb: describe the QIXIS FPGA and two child GPIO controllersIoana Ciornei
Describe the FPGA present on the LX2160ARDB board as a simple-mfd I2C device. The FPGA presents registers that deal with power-on-reset timing, muxing, SFP cage monitoring and control etc. Also add the two GPIO controllers responsible for monitoring and controlling the SFP+ cages used for MAC5 and MAC6. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-27dt-bindings: fsl,fpga-qixis: describe the gpio child node found on LS1046AQDSIoana Ciornei
Extend the list of accepted child nodes with the QIXIS FPGA based GPIO controller and explicitly list its compatible string fsl,ls1046aqds-fpga-gpio-stat-pres2 as the only one accepted. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-27dt-bindings: fsl,fpga-qixis-i2c: add support for LX2160ARDB FPGAIoana Ciornei
Extend the list of supported compatible strings with fsl,lx2160ardb-fpga. Since the register map exposed by the LX2160ARDB's FPGA also contains two GPIO controllers, accept the necessary GPIO pattern property. At the same time, add the #address-cells and #size-cells properties as valid ones so that the child nodes of the fsl,lx2160ardb-fpga node are addressable. This is necessary because when defining child devices such as the GPIO controller described in the added example, the child device needs a the reg property to properly identify its register location in the parent I2C device address space. Impose this restriction for the new compatible through an if-statement. The feature set exposed by these QIXIS FPGA devices is highly dependent on the board type, meaning that even though the FPGA found on the LX2160AQDS board (fsl,lx2160aqds-fpga) works in the same way in terms of access over I2C as the one found on the LX2160ARDB (fsl,lx2160ardb-fpga added here), the register map inside the device space is different since there are different on-board devices to be controlled. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-27arm64: dts: add Protonic PRT8ML boardJonas Rebmann
Add devicetree for the Protonic PRT8ML. The board is similar to the Protonic PRT8MM but i.MX8MP based. Some features have been removed as the drivers haven't been mainlined yet or other issues where encountered: - Stepper motors to be controlled using motion control subsystem - MIPI/DSI to eDP USB alt-mode - Onboard T1 ethernet (10BASE-T1L+PoDL, 100BASE-T1+PoDL, 1000BASE-T1) Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Jonas Rebmann <jre@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-27dt-bindings: arm: fsl: Add Protonic PRT8MLJonas Rebmann
Add DT compatible string for Protonic PRT8ML board. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Jonas Rebmann <jre@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-27arm64: dts: imx8-ss-img: Avoid gpio0_mipi_csi GPIOs being deferredJoão Paulo Gonçalves
The gpio0_mipi_csi DT nodes are enabled by default, but they are dependent on the irqsteer_csi nodes, which are not enabled. This causes the gpio0_mipi_csi GPIOs to be probe deferred. Since these GPIOs can be used independently of the CSI controller, enable irqsteer_csi by default too to prevent them from being deferred and to ensure they work out of the box. Fixes: 2217f8243714 ("arm64: dts: imx8: add capture controller for i.MX8's img subsystem") Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-27arm64: dts: imx8mp: add cpuidle cooling device to the alert trip pointMartin Kepplinger-Novaković
Idle-inject up to 50% of all cpu's time in order to help cpufreq to keep the temperature below the trip points. Signed-off-by: Martin Kepplinger-Novaković <martink@posteo.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-27arm64: dts: imx8mp: add idle cooling devices to cpu coreMartin Kepplinger-Novaković
The thermal framework can use the cpu-idle-states as described for imx8mp as an alternative or in parallel to cpufreq. Add the DT node to the cpu so the cooling devices will be present and the thermal zone descriptions can use them. Signed-off-by: Martin Kepplinger-Novaković <martink@posteo.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-27arm: imx_v6_v7_defconfig: enable ext4 directlyAndreas Kemnade
In former times, ext4 was enabled implicitely by enabling ext3 but with the ext3 fs gone, it does not get enabled, which lets devices fail to mount root on non-initrd based boots with an ext4 root. Fixes: d6ace46c82fd ("ext4: remove obsolete EXT3 config options") Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-27ARM: dts: imx53: enable PMIC RTC on imx53-qsrbAlexander Kurz
The RTC inside mc34708 is supported by RTC_DRV_MC13XXX since v3.6-rc1. Enable the PMIC RTC on the imx53-qsrb. Without a battery the RTC may be powered via the micro-USB connector when main 5V power is not available. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-27arm64: dts: ti: k3-am62p: Fix memory ranges for GPURandolph Sapp
Update the memory region listed in the k3-am62p.dtsi for the BXS-4-64 GPU to match the Main Memory Map described in the TRM [1]. [1] https://www.ti.com/lit/ug/spruj83b/spruj83b.pdf Fixes: 29075cc09f43 ("arm64: dts: ti: Introduce AM62P5 family of SoCs") Signed-off-by: Randolph Sapp <rs@ti.com> Reviewed-by: Michael Walle <mwalle@kernel.org> Link: https://patch.msgid.link/20250919193341.707660-2-rs@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-10-26crypto: x86/aes-gcm - optimize long AAD processing with AVX512Eric Biggers
Improve the performance of aes_gcm_aad_update_vaes_avx512() on large AAD (additional authenticated data) lengths by 4-8 times by making it use up to 512-bit vectors and a 4-vector-wide loop. Previously, it used only 256-bit vectors and a 1-vector-wide loop. Originally, I assumed that the case of large AADLEN was unimportant. Later, when reviewing the users of BoringSSL's AES-GCM code, I found that some callers use BoringSSL's AES-GCM API to just compute GMAC, authenticating lots of data but not en/decrypting any. Thus, I included a similar optimization in the BoringSSL port of this code. I believe it's wise to include this optimization in the kernel port too for similar reasons, and to align it more closely with the BoringSSL port. Another reason this function originally used 256-bit vectors was so that separate *_avx10_256 and *_avx10_512 versions of it wouldn't be needed. However, that's no longer applicable. To avoid a slight performance regression in the common case of AADLEN <= 16, also add a fast path for that case which uses 128-bit vectors. In fact, this case actually gets slightly faster too, since it saves a couple instructions over the original 256-bit code. Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20251002023117.37504-9-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
2025-10-26crypto: x86/aes-gcm - optimize AVX512 precomputation of H^2 from H^1Eric Biggers
Squaring in GF(2^128) requires fewer instructions than a generic multiplication in GF(2^128). Take advantage of this when computing H^2 from H^1 in aes_gcm_precompute_vaes_avx512(). Note that aes_gcm_precompute_vaes_avx2() already uses this optimization. Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20251002023117.37504-8-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
2025-10-26crypto: x86/aes-gcm - revise some comments in AVX512 codeEric Biggers
- Fix some references to field names in struct aes_gcm_key_vaes_avx512. - Remove the mention of the counter having to start at 2. The assembly code doesn't actually assume that it does. Note that these changes improve consistency with aes-gcm-vaes-avx2.S. Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20251002023117.37504-7-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
2025-10-26crypto: x86/aes-gcm - reorder AVX512 precompute and aad_update functionsEric Biggers
Now that the _aes_gcm_precompute macro is instantiated only once, replace it directly with a function definition. Also, move aes_gcm_aad_update_vaes_avx512() to a different location in the file so that it's consistent with aes-gcm-vaes-avx2.S and also the BoringSSL port of this code. No functional changes. Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20251002023117.37504-6-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
2025-10-26crypto: x86/aes-gcm - clean up AVX512 code to assume 512-bit vectorsEric Biggers
aes-gcm-vaes-avx512.S (originally aes-gcm-avx10-x86_64.S) was designed to support multiple maximum vector lengths, while still utilizing AVX512 / AVX10 features such as the increased number of vector registers. However, the support for multiple maximum vector lengths turned out to not be useful. Support for maximum vector lengths other than 512 bits was removed from the AVX10 specification, which leaves "avoiding overly-eager downclocking" as the only remaining use case for limiting AVX512 / AVX10 code to 256-bit vectors. But this issue has gone away in new CPUs, and the separate VAES+AVX2 code which I ended up having to write anyway provides nearly as good 256-bit support. Therefore, clean up this code to not be written in terms of a generic vector length, but rather just assume 512-bit vectors. Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20251002023117.37504-5-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
2025-10-26crypto: x86/aes-gcm - rename avx10 and avx10_512 to avx512Eric Biggers
With the "avx10_256" code removed and the AVX10 specification having been changed to basically just be a re-packaged AVX512, the "avx10_512" name no longer makes sense. Replace it with "avx512". While doing this, also add the "vaes_" prefix in places that didn't already have it. The result is that the two VAES optimized implementations are consistently called vaes_avx2 and vaes_avx512. (Also drop the "-x86_64" part of the assembly filename, to keep it from getting too long. There's no 32-bit version of this code, and the fact that it's 64-bit is unremarkable; it's the norm for new code.) Note: although aes_gcm_aad_update_vaes_avx512() (previously called aes_gcm_aad_update_vaes_avx10()) uses at most 256-bit vectors, it still depends on the AVX512 CPU feature. So its new name is still accurate. Also, a later commit will make it sometimes use 512-bit vectors anyway. Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20251002023117.37504-4-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
2025-10-26crypto: x86/aes-gcm - remove VAES+AVX10/256 optimized codeEric Biggers
Remove the VAES+AVX10/256 optimized implementation of AES-GCM. It's no longer expected to be useful for future CPUs, since Intel changed the AVX10 specification to require 512-bit vectors. In addition, it's no longer very useful to serve as the 256-bit fallback for older Intel CPUs (Ice Lake and Tiger Lake) that downclock too eagerly when 512-bit vectors are used. This is because I ended up writing another 256-bit implementation anyway, using VAES+AVX2. The VAES+AVX2 implementation is almost as fast as the VAES+AVX10/256 one, as shown by the following tables. So, let's just use it instead. Table 1: AES-256-GCM encryption throughput change, CPU vs. message length in bytes: | 16384 | 4096 | 4095 | 1420 | 512 | 500 | ----------------------+-------+-------+-------+-------+-------+-------+ Intel Ice Lake Server | -2% | -1% | 0% | -2% | -2% | 3% | | 300 | 200 | 64 | 63 | 16 | ----------------------+-------+-------+-------+-------+-------+ Intel Ice Lake Server | 1% | 0% | 4% | 2% | -6% | Table 2: AES-256-GCM decryption throughput change, CPU vs. message length in bytes: | 16384 | 4096 | 4095 | 1420 | 512 | 500 | ----------------------+-------+-------+-------+-------+-------+-------+ Intel Ice Lake Server | -1% | -1% | 1% | -2% | 0% | 2% | | 300 | 200 | 64 | 63 | 16 | ----------------------+-------+-------+-------+-------+-------+ Intel Ice Lake Server | -1% | 4% | 1% | 0% | -5% | Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20251002023117.37504-3-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
2025-10-26crypto: x86/aes-gcm - add VAES+AVX2 optimized codeEric Biggers
Add an implementation of AES-GCM that uses 256-bit vectors and the following CPU features: Vector AES (VAES), Vector Carryless Multiplication (VPCLMULQDQ), and AVX2. It doesn't require AVX512. So unlike the existing VAES+AVX512 code, it works on CPUs that support VAES but not AVX512, specifically: - AMD Zen 3, both client and server - Intel Alder Lake, Raptor Lake, Meteor Lake, Arrow Lake, and Lunar Lake. (These are client CPUs.) - Intel Sierra Forest. (This is a server CPU.) On these CPUs, this VAES+AVX2 code is much faster than the existing AES-NI code. The AES-NI code uses only 128-bit vectors. These CPUs are widely deployed, making VAES+AVX2 code worthwhile even though hopefully future x86_64 CPUs will uniformly support AVX512. This implementation will also serve as the fallback 256-bit implementation for older Intel CPUs (Ice Lake and Tiger Lake) that support AVX512 but downclock too eagerly when 512-bit vectors are used. Currently, the VAES+AVX10/256 implementation serves that purpose. A later commit will remove that and just use the VAES+AVX2 one. (Note that AES-XTS and AES-CTR already successfully use this approach.) I originally wrote this AES-GCM implementation for BoringSSL. It's been in BoringSSL for a while now, including in Chromium. This is a port of it to the Linux kernel. The main changes in the Linux version include: - Port from "perlasm" to a standard .S file. - Align all assembly functions with what aesni-intel_glue.c expects, including adding support for lengths not a multiple of 16 bytes. - Rework the en/decryption of the final 1 to 127 bytes. This commit increases AES-256-GCM throughput on AMD Milan (Zen 3) by up to 74%, as shown by the following tables: Table 1: AES-256-GCM encryption throughput change, CPU vs. message length in bytes: | 16384 | 4096 | 4095 | 1420 | 512 | 500 | ----------------------+-------+-------+-------+-------+-------+-------+ AMD Milan (Zen 3) | 67% | 59% | 61% | 39% | 23% | 27% | | 300 | 200 | 64 | 63 | 16 | ----------------------+-------+-------+-------+-------+-------+ AMD Milan (Zen 3) | 14% | 12% | 7% | 7% | 0% | Table 2: AES-256-GCM decryption throughput change, CPU vs. message length in bytes: | 16384 | 4096 | 4095 | 1420 | 512 | 500 | ----------------------+-------+-------+-------+-------+-------+-------+ AMD Milan (Zen 3) | 74% | 65% | 65% | 44% | 23% | 26% | | 300 | 200 | 64 | 63 | 16 | ----------------------+-------+-------+-------+-------+-------+ AMD Milan (Zen 3) | 12% | 11% | 3% | 2% | -3% | Acked-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20251002023117.37504-2-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
2025-10-26smb: server: let smb_direct_cm_handler() call ib_drain_qp() after ↵Stefan Metzmacher
smb_direct_disconnect_rdma_work() All handlers triggered by ib_drain_qp() should already see the broken connection. smb_direct_cm_handler() is called under a mutex of the rdma_cm, we should make sure ib_drain_qp() and all rdma layer logic completes and unlocks the mutex. It means free_transport() will also already see the connection as SMBDIRECT_SOCKET_DISCONNECTED, so we need to call crdma_[un]lock_handler(sc->rdma.cm_id) around ib_drain_qp(), rdma_destroy_qp(), ib_free_cq() and ib_dealloc_pd(). Otherwise we free resources while the ib_drain_qp() within smb_direct_cm_handler() is still running. We have to unlock before rdma_destroy_id() as it locks again. Fixes: 141fa9824c0f ("ksmbd: call ib_drain_qp when disconnected") Fixes: 4c564f03e23b ("smb: server: make use of common smbdirect_socket") Cc: Namjae Jeon <linkinjeon@kernel.org> Cc: Steve French <smfrench@gmail.com> Cc: Tom Talpey <tom@talpey.com> Cc: linux-cifs@vger.kernel.org Cc: samba-technical@lists.samba.org Signed-off-by: Stefan Metzmacher <metze@samba.org> Acked-by: Namjae Jeon <linkinjeon@kernel.org> Signed-off-by: Steve French <stfrench@microsoft.com>
2025-10-26smb: server: call smb_direct_post_recv_credits() when the negotiation is doneStefan Metzmacher
We now activate sc->recv_io.posted.refill_work and sc->idle.immediate_work only after a successful negotiation, before sending the negotiation response. It means the queue_work(sc->workqueue, &sc->recv_io.posted.refill_work) in put_recvmsg() of the negotiate request, is a no-op now. It also means our explicit smb_direct_post_recv_credits() will have queue_work(sc->workqueue, &sc->idle.immediate_work) as no-op. This should make sure we don't have races and post any immediate data_transfer message that tries to grant credits to the peer, before we send the negotiation response, as that will grant the initial credits to the peer. Fixes: 0626e6641f6b ("cifsd: add server handler for central processing and tranport layers") Fixes: 1cde0a74a7a8 ("smb: server: don't use delayed_work for post_recv_credits_work") Cc: Namjae Jeon <linkinjeon@kernel.org> Cc: Steve French <smfrench@gmail.com> Cc: Tom Talpey <tom@talpey.com> Cc: linux-cifs@vger.kernel.org Cc: samba-technical@lists.samba.org Signed-off-by: Stefan Metzmacher <metze@samba.org> Acked-by: Namjae Jeon <linkinjeon@kernel.org> Signed-off-by: Steve French <stfrench@microsoft.com>
2025-10-26ksmbd: transport_ipc: validate payload size before reading handleQianchang Zhao
handle_response() dereferences the payload as a 4-byte handle without verifying that the declared payload size is at least 4 bytes. A malformed or truncated message from ksmbd.mountd can lead to a 4-byte read past the declared payload size. Validate the size before dereferencing. This is a minimal fix to guard the initial handle read. Fixes: 0626e6641f6b ("cifsd: add server handler for central processing and tranport layers") Cc: stable@vger.kernel.org Reported-by: Qianchang Zhao <pioooooooooip@gmail.com> Signed-off-by: Qianchang Zhao <pioooooooooip@gmail.com> Acked-by: Namjae Jeon <linkinjeon@kernel.org> Signed-off-by: Steve French <stfrench@microsoft.com>
2025-10-27ARM: dts: imx6q-evi: fix rtc compatibleAlexandre Belloni
The correct compatible is nxp,pcf2123 Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-27arm64: dts: imx8mm-phygate-tauri-l: Update pad ctl for USB OC pinTeresa Remmet
Disable Hysteresis Enable Field in pad ctl register for USB OC pin as this is more appropriate for the signal form in our case. Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-27arm64: dts: imx8mm-phyboard-polis-rdk: Add USB1 OC pin configurationTeresa Remmet
Add USB1 OC pin configuration for proper over-current detection. Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-27arm64: dts: freescale: add initial support for i.MX 95 Verdin Evaluation Kit ↵Marek Vasut
(EVK) Add initial support for i.MX 95 Verdin Evaluation Kit (EVK), which used to be the Titan EVK. Currently supported is lpuart1 as console, SDHC1/2/3 as storage, WM8904 Audio, USB3.0 and ENETC ethernet RGMII Gigabit port. Note that the SoM used in this EVK is a derivative SoM from Verdin line of SoMs, an actual i.MX95 Verdin SoM is under development. [1] https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx95-evaluation-kit Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Tested-by: João Paulo Gonçalves <joao.goncalves@toradex.com> # i.MX95 Verdin EVK Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-27dt-bindings: arm: imx: document i.MX 95 Verdin Evaluation Kit (EVK)Marek Vasut
Document support for i.MX 95 Verdin Evaluation Kit (EVK), which used to be the Titan EVK. Note that the SoM used in this EVK is a derivative SoM from Verdin line of SoMs, an actual i.MX95 Verdin SoM is under development. [1] https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx95-evaluation-kit Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-10-26cifs: fix typo in enable_gcm_256 module parameterSteve French
Fix typo in description of enable_gcm_256 module parameter Suggested-by: Thomas Spear <speeddymon@gmail.com> Signed-off-by: Steve French <stfrench@microsoft.com>
2025-10-26Linux 6.18-rc3v6.18-rc3Linus Torvalds
2025-10-26Merge tag 'char-misc-6.18-rc3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver fixes from Greg KH: "Here are some small char/misc/android driver fixes for 6.18-rc3 for reported issues. Included in here are: - rust binder fixes for reported issues - mei device id addition - mei driver fixes - comedi bugfix - most usb driver bugfixes - fastrpc memory leak fix All of these have been in linux-next for a while with no reported issues" * tag 'char-misc-6.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: most: usb: hdm_probe: Fix calling put_device() before device initialization most: usb: Fix use-after-free in hdm_disconnect binder: remove "invalid inc weak" check mei: txe: fix initialization order comedi: fix divide-by-zero in comedi_buf_munge() mei: late_bind: Fix -Wincompatible-function-pointer-types-strict misc: fastrpc: Fix dma_buf object leak in fastrpc_map_lookup mei: me: add wildcat lake P DID misc: amd-sbi: Clarify that this is a BMC driver nvmem: rcar-efuse: add missing MODULE_DEVICE_TABLE binder: Fix missing kernel-doc entries in binder.c rust_binder: report freeze notification only when fully frozen rust_binder: don't delete FreezeListener if there are pending duplicates rust_binder: freeze_notif_done should resend if wrong state rust_binder: remove warning about orphan mappings rust_binder: clean `clippy::mem_replace_with_default` warning
2025-10-26Merge tag 'staging-6.18-rc3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging driver fixes from Greg KH: "Here are some small staging driver fixes for the gpib subsystem to resolve some reported issues. Included in here are: - memory leak fixes - error code fixes - proper protocol fixes All of these have been in linux-next for almost 2 weeks now with no reported issues" * tag 'staging-6.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: staging: gpib: Fix device reference leak in fmh_gpib driver staging: gpib: Return -EINTR on device clear staging: gpib: Fix sending clear and trigger events staging: gpib: Fix no EOI on 1 and 2 byte writes
2025-10-26Merge tag 'tty-6.18-rc3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty Pull tty/serial driver fixes from Greg KH: "Here are some small tty and serial driver fixes for reported issues. Included in here are: - sh-sci serial driver fixes - 8250_dw and _mtk driver fixes - sc16is7xx driver bugfix - new 8250_exar device ids added All of these have been in linux-next this past week with no reported issues" * tag 'tty-6.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: serial: 8250_mtk: Enable baud clock and manage in runtime PM serial: 8250_dw: handle reset control deassert error dt-bindings: serial: sh-sci: Fix r8a78000 interrupts serial: sc16is7xx: remove useless enable of enhanced features serial: 8250_exar: add support for Advantech 2 port card with Device ID 0x0018 tty: serial: sh-sci: fix RSCI FIFO overrun handling
2025-10-26Merge tag 'usb-6.18-rc3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB driver fixes from Greg KH: "Here are some small USB driver fixes and new device ids for 6.18-rc3. Included in here are: - new option serial driver device ids added - dt bindings fixes for numerous platforms - xhci bugfixes for many reported regressions - usbio dependency bugfix - dwc3 driver fix - raw-gadget bugfix All of these have been in linux-next this week with no reported issues" * tag 'usb-6.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: USB: serial: option: add Telit FN920C04 ECM compositions USB: serial: option: add Quectel RG255C tcpm: switch check for role_sw device with fw_node usb/core/quirks: Add Huawei ME906S to wakeup quirk usb: raw-gadget: do not limit transfer length USB: serial: option: add UNISOC UIS7720 xhci: dbc: enable back DbC in resume if it was enabled before suspend xhci: dbc: fix bogus 1024 byte prefix if ttyDBC read races with stall event usb: xhci-pci: Fix USB2-only root hub registration dt-bindings: usb: qcom,snps-dwc3: Fix bindings for X1E80100 usb: misc: Add x86 dependency for Intel USBIO driver dt-bindings: usb: switch: split out ports definition usb: dwc3: Don't call clk_bulk_disable_unprepare() twice dt-bindings: usb: dwc3-imx8mp: dma-range is required only for imx8mp
2025-10-26Merge tag 'x86_urgent_for_v6.18_rc3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Borislav Petkov: - Remove dead code leftovers after a recent mitigations cleanup which fail a Clang build - Make sure a Retbleed mitigation message is printed only when necessary - Correct the last Zen1 microcode revision for which Entrysign sha256 check is needed - Fix a NULL ptr deref when mounting the resctrl fs on a system which supports assignable counters but where L3 total and local bandwidth monitoring has been disabled at boot * tag 'x86_urgent_for_v6.18_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/bugs: Remove dead code which might prevent from building x86/bugs: Qualify RETBLEED_INTEL_MSG x86/microcode: Fix Entrysign revision check for Zen1/Naples x86,fs/resctrl: Fix NULL pointer dereference with events force-disabled in mbm_event mode
2025-10-26rust: simplify read_poll_timeout's example codeFUJITA Tomonori
- Drop unnecessary Result's '<()>' - Use '?' instead of match Signed-off-by: FUJITA Tomonori <fujita.tomonori@gmail.com> Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2025-10-26Merge tag 'irq_urgent_for_v6.18_rc3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fixes from Borislav Petkov: - Restore the original buslock locking in a couple of places in the irq core subsystem after a rework * tag 'irq_urgent_for_v6.18_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: genirq/manage: Add buslock back in to enable_irq() genirq/manage: Add buslock back in to __disable_irq_nosync() genirq/chip: Add buslock back in to irq_set_handler()
2025-10-26Merge tag 'objtool_urgent_for_v6.18_rc3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull objtool fixes from Borislav Petkov: - Fix x32 build due to wrong format specifier on that sub-arch - Add one more Rust noreturn function to objtool's list * tag 'objtool_urgent_for_v6.18_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: objtool: Fix failure when being compiled on x32 system objtool/rust: add one more `noreturn` Rust function
2025-10-26Merge tag 'sched_urgent_for_v6.18_rc3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull scheduler fix from Borislav Petkov: - Make sure a CFS runqueue on a throttled hierarchy has its PELT clock throttled otherwise task movement and manipulation would lead to dangling cfs_rq references and an eventual crash * tag 'sched_urgent_for_v6.18_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: sched/fair: Start a cfs_rq on throttled hierarchy with PELT clock throttled
2025-10-26Merge tag 'timers_urgent_for_v6.18_rc3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer fix from Borislav Petkov: - Do not create more than eight (max supported) AUX clocks sysfs hierarchies * tag 'timers_urgent_for_v6.18_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: timekeeping: Fix aux clocks sysfs initialization loop bound
2025-10-26drm/gem-atomic: Reset plane state to NULL if allocation failedThomas Zimmermann
Unconditionally reset plane->state to NULL if the allocation of the shadow plane state fails. Avoids an invalid address in the field. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patch.msgid.link/20251017091919.58770-1-tzimmermann@suse.de
2025-10-26drm/sysfb: Do not dereference NULL pointer in plane resetThomas Zimmermann
The plane state in __drm_gem_reset_shadow_plane() can be NULL. Do not deref that pointer, but forward NULL to the other plane-reset helpers. Clears plane->state to NULL. v2: - fix typo in commit description (Javier) Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Fixes: b71565022031 ("drm/gem: Export implementation of shadow-plane helpers") Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/dri-devel/aPIDAsHIUHp_qSW4@stanley.mountain/ Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: Melissa Wen <melissa.srw@gmail.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: David Airlie <airlied@gmail.com> Cc: Simona Vetter <simona@ffwll.ch> Cc: dri-devel@lists.freedesktop.org Cc: <stable@vger.kernel.org> # v5.15+ Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patch.msgid.link/20251017091407.58488-1-tzimmermann@suse.de
2025-10-26dt-bindings: PCI: Update the email address for Manivannan SadhasivamManivannan Sadhasivam
My linaro email id is no longer active. So switch to kernel.org one. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Link: https://patch.msgid.link/20251010-pci-binding-v1-1-947c004b5699@oss.qualcomm.com Acked-by: Rob Herring (Arm) <robh@kernel.org>
2025-10-26PCI: endpoint: pci-epf-test: Fix sleeping function being called from atomic ↵Bhanu Seshu Kumar Valluri
context When Root Complex (RC) triggers a Doorbell interrupt to Endpoint (EP), it triggers the below warning in the EP: BUG: sleeping function called from invalid context at kernel/locking/mutex.c:271 Call trace: __might_resched+0x130/0x158 __might_sleep+0x70/0x88 mutex_lock+0x2c/0x80 pci_epc_get_msi+0x78/0xd8 pci_epf_test_raise_irq.isra.0+0x74/0x138 pci_epf_test_doorbell_handler+0x34/0x50 The BUG arises because the EP's pci_epf_test_doorbell_handler() which is running in the hard IRQ context is making an indirect call to pci_epc_get_msi(), which uses mutex inside. To fix the issue, convert the hard IRQ handler to a threaded IRQ handler to allow it to call functions that can sleep during bottom half execution. Also, register the threaded IRQ handler with IRQF_ONESHOT to keep the interrupt line disabled until the threaded IRQ handler completes execution. Fixes: eff0c286aa91 ("PCI: endpoint: pci-epf-test: Add doorbell test support") Signed-off-by: Bhanu Seshu Kumar Valluri <bhanuseshukumar@gmail.com> [mani: reworded description a bit] Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Niklas Cassel <cassel@kernel.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20251014024109.42287-1-bhanuseshukumar@gmail.com
2025-10-26dt-bindings: PCI: amlogic,axg-pcie: Fix select schemaRob Herring (Arm)
The amlogic,axg-pcie binding was never enabled as the 'select' schema expects a single compatible value, but the binding has a fallback compatible. Fix the 'select' by adding a 'contains'. With this, several errors in the clock and reset properties are exposed. Some of the names aren't defined in the common DWC schema and the order of clocks entries doesn't match .dts files. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251024011122.26001-1-robh@kernel.org
2025-10-25perf auxtrace: Add auxtrace_synth_id_range_start() helpertanze
To avoid hardcoding the offset value for synthetic event IDs in multiple auxtrace modules (arm-spe, cs-etm, intel-pt, etc.), and to improve code reusability, this patch unifies the handling of the ID offset via a dedicated helper function. Signed-off-by: tanze <tanze@kylinos.cn> Reviewed-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Leo Yan <leo.yan@arm.com> Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2025-10-25perf stat: Add/fix bperf cgroup max events workaroundsIan Rogers
Commit b8308511f6e0 bumped the max events to 1024 but this results in BPF verifier issues if the number of command line events is too large. Workaround this by: 1) moving the constants to a header file to share between BPF and perf C code, 2) testing that the maximum number of events doesn't cause BPF verifier issues in debug builds, 3) lower the max events from 1024 to 128, 4) in perf stat, if there are more events than the BPF counters can support then disable BPF counter usage. The rodata setup is factored into its own function to avoid duplicating it in the testing code. Signed-off-by: Ian Rogers <irogers@google.com> Fixes: b8308511f6e0 ("perf stat bperf cgroup: Increase MAX_EVENTS from 32 to 1024") Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2025-10-25kbuild: install-extmod-build: Fix when given dir outside the build dirJames Le Cuirot
Commit b5e395653546 ("kbuild: install-extmod-build: Fix build when specifying KBUILD_OUTPUT") tried to address the "build" variable expecting a relative path by using `realpath --relative-base=.`, but this only works when the given directory is below the current directory. `realpath --relative-to=.` will return a relative path in all cases. Fixes: b5e395653546 ("kbuild: install-extmod-build: Fix build when specifying KBUILD_OUTPUT") Signed-off-by: James Le Cuirot <chewi@gentoo.org> Reviewed-by: Nicolas Schier <nsc@kernel.org> Link: https://patch.msgid.link/20251016091417.9985-1-chewi@gentoo.org Signed-off-by: Nathan Chancellor <nathan@kernel.org>
2025-10-25Merge tag 'driver-core-6.18-rc3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-core Pull driver core fixes from Danilo Krummrich: - In Device::parent(), do not make any assumptions on the device context of the parent device - Check visibility before changing ownership of a sysfs attribute group - In topology_parse_cpu_capacity(), replace an incorrect usage of PTR_ERR_OR_ZERO() with IS_ERR_OR_NULL() - In devcoredump, fix a circular locking dependency between struct devcd_entry::mutex and kernfs - Do not warn about a pending fw_devlink sync state * tag 'driver-core-6.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-core: arch_topology: Fix incorrect error check in topology_parse_cpu_capacity() rust: device: fix device context of Device::parent() sysfs: check visibility before changing group attribute ownership devcoredump: Fix circular locking dependency with devcd->mutex. driver core: fw_devlink: Don't warn about sync_state() pending
2025-10-25Merge tag 'firewire-fixes-6.18-rc3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394 Pull firewire fixes from Takashi Sakamoto: "A small collection of FireWire fixes. This includes corrections to sparse and API documentation" * tag 'firewire-fixes-6.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394: firewire: init_ohci1394_dma: add missing function parameter documentation firewire: core: fix __must_hold() annotation