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2025-11-02interconnect: qcom: x1e80100: convert to dynamic IDsDmitry Baryshkov
Stop using fixed and IDs and covert the platform to use dynamic IDs for the interconnect. This gives more flexibility and also allows us to drop the .num_links member, saving from possible errors related to it being not set or set incorrectly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251031-rework-icc-v3-7-0575304c9624@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-11-02interconnect: qcom: sm8250: convert to dynamic IDsDmitry Baryshkov
Stop using fixed and IDs and covert the platform to use dynamic IDs for the interconnect. This gives more flexibility and also allows us to drop the .num_links member, saving from possible errors related to it being not set or set incorrectly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251031-rework-icc-v3-6-0575304c9624@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-11-02interconnect: qcom: sdm845: convert to dynamic IDsDmitry Baryshkov
Stop using fixed and IDs and covert the platform to use dynamic IDs for the interconnect. This gives more flexibility and also allows us to drop the .num_links member, saving from possible errors related to it being not set or set incorrectly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251031-rework-icc-v3-5-0575304c9624@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-11-02interconnect: qcom: sc8280xp: convert to dynamic IDsDmitry Baryshkov
Stop using fixed and IDs and covert the platform to use dynamic IDs for the interconnect. This gives more flexibility and also allows us to drop the .num_links member, saving from possible errors related to it being not set or set incorrectly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251031-rework-icc-v3-4-0575304c9624@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-11-02interconnect: qcom: sc8180x: convert to dynamic IDsDmitry Baryshkov
Stop using fixed and IDs and covert the platform to use dynamic IDs for the interconnect. This gives more flexibility and also allows us to drop the .num_links member, saving from possible errors related to it being not set or set incorrectly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251031-rework-icc-v3-3-0575304c9624@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-11-02interconnect: qcom: sc7280: convert to dynamic IDsDmitry Baryshkov
Stop using fixed and IDs and covert the platform to use dynamic IDs for the interconnect. This gives more flexibility and also allows us to drop the .num_links member, saving from possible errors related to it being not set or set incorrectly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251031-rework-icc-v3-2-0575304c9624@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-11-02interconnect: qcom: icc-rpmh: convert link_nodes to dynamic arrayDmitry Baryshkov
Declaring link_nodes as a double-pointer results in a syntax sugar in the interconnect driver to typecast the array. Change the type of link_nodes field to the array to remove the need for the extra typecast. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251031-rework-icc-v3-1-0575304c9624@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-11-02tools/nolibc: clean up outdated comments in generic arch.hWilly Tarreau
Along the code reorganizations, the file has been keeping the original comments about argv and envp which are no longer relevant to this file anymore. Let's just drop them. Acked-by: Thomas Weißschuh <linux@weissschuh.net> Signed-off-by: Willy Tarreau <w@1wt.eu>
2025-11-02Linux 6.18-rc4v6.18-rc4Linus Torvalds
2025-11-02hwmon: (sy7636a) Fix sensor descriptionAndreas Kemnade
The temperature is not from the die itself but from an NTC. That was verified with an IR camera. Fix that. Signed-off-by: Andreas Kemnade <akemnade@kernel.org> Link: https://lore.kernel.org/r/20251027202847.119707-1-akemnade@kernel.org Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-11-02hwmon: (aht10) Add support for dht20Akhilesh Patil
Add support for dht20 temperature and humidity sensor from Aosong. Modify aht10 driver to handle different init command for dht20 sensor by adding init_cmd entry in the driver data. dht20 sensor is compatible with aht10 hwmon driver with this change. Tested on TI am62x SK board with dht20 sensor connected at i2c-2 port. Signed-off-by: Akhilesh Patil <akhilesh@ee.iitb.ac.in> Link: https://lore.kernel.org/r/2025112-94320-906858@bhairav-test.ee.iitb.ac.in Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-11-02hwmon: (asus-ec-sensors) add ROG STRIX X870-F GAMING WIFIEugene Shalygin
Add support for the ROG STRIX X870-F GAMING WIFI board. Testing done by the board owner [1]. [1] https://github.com/zeule/asus-ec-sensors/issues/83 Signed-off-by: Eugene Shalygin <eugene.shalygin@gmail.com> Link: https://lore.kernel.org/r/20251102114038.283396-1-eugene.shalygin@gmail.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-11-02docs/hwmon: Update maxim-ic.com links to analog.comAnkan Biswas
In 2021, Maxim Integrated was acquired by Analog Devices. maxim-ic.com & maximintegrated.com links redirect to analog.com. Update maxim-ic.com & maximintegrated.com links to analog.com links. Signed-off-by: Ankan Biswas <spyjetfayed@gmail.com> Link: https://lore.kernel.org/r/20251017163501.11285-1-spyjetfayed@gmail.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-11-02docs/hwmon: Add missing datasheet links for Maxim chipsAnkan Biswas
In 2021, Maxim Integrated was acquired by Analog Devices. maxim-ic.com & maximintegrated.com links redirect to analog.com. Missing datasheets now available at Analog Devices added. Signed-off-by: Ankan Biswas <spyjetfayed@gmail.com> Link: https://lore.kernel.org/r/20251017161422.4404-1-spyjetfayed@gmail.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-11-02docs/hwmon: Fix broken maxim-ic.com links to analog.comAnkan Biswas
In 2021, Maxim Integrated was acquired by Analog Devices. maxim-ic.com & maximintegrated.com links redirect to analog.com. Broken redirects fixed to their proper analog.com links. Fixes warnings in 'make linkcheckdocs'. Signed-off-by: Ankan Biswas <spyjetfayed@gmail.com> Link: https://lore.kernel.org/r/20251017154755.32105-1-spyjetfayed@gmail.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-11-02ARM: dts: qcom: msm8226-samsung-ms013g: add simple-framebufferRaymond Hackley
Add simple-framebuffer, necessary power-domains and clocks for ms013g. Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com> Link: https://lore.kernel.org/r/20251011185750.743615-1-raymondhackley@protonmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-02arm64: dts: qcom: qcm6490-fairphone-fp5: Add UW cam actuatorGriffin Kroah-Hartman
Add a node for the Dongwoon DW9800K actuator, used for focus of the ultra-wide camera sensor. Tested-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Griffin Kroah-Hartman <griffin.kroah@fairphone.com> Link: https://lore.kernel.org/r/20251016-dw9800-driver-v3-4-d7058f72ead4@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-02arm64: dts: qcom: qcm6490-fairphone-fp5: Enable CCI pull-upGriffin Kroah-Hartman
Enable vreg_l6p, which is the voltage source for the pull-up resistor of the CCI busses. This ensures that I2C communication works as expected. Reviewed-by: Bryan O'Donoghue <bod@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Griffin Kroah-Hartman <griffin.kroah@fairphone.com> Link: https://lore.kernel.org/r/20251016-dw9800-driver-v3-3-d7058f72ead4@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-02ARM: dts: qcom: msm8960: rename msmgpio node to tlmmAntony Kurniawan Soemardi
Rename the GPIO controller node from "msmgpio" to "tlmm" to match the convention used by other Qualcomm SoCs. Suggested-by: Shinjo Park <peremen@gmail.com> Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-msm8960-reorder-v2-5-26c478366d21@smankusors.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-02ARM: dts: qcom: msm8960: add I2C nodes for gsbi1 and gsbi8Antony Kurniawan Soemardi
These are present on msm8960 and are required for devices such as the Casio G'zOne, which has NFC wired to gsbi1 and audio amplifier wired to gsbi8. The nodes are added disabled by default. Co-developed-by: Shinjo Park <peremen@gmail.com> Signed-off-by: Shinjo Park <peremen@gmail.com> Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-msm8960-reorder-v2-4-26c478366d21@smankusors.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-02ARM: dts: qcom: msm8960: add I2C nodes for gsbi10 and gsbi12Antony Kurniawan Soemardi
These are present on msm8960 and are required for devices such as the Sony Xperia SP, which has NFC wired to gsbi10 and various motion sensors wired to gsbi12. The nodes are added disabled by default. Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-msm8960-reorder-v2-3-26c478366d21@smankusors.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-02ARM: dts: qcom: msm8960: inline qcom-msm8960-pins.dtsiAntony Kurniawan Soemardi
Inline qcom-msm8960-pins.dtsi into the main SoC dtsi. Most Qualcomm SoCs embed their TLMM definitions directly, with only msm8960 and apq8064 using a separate pins file. After this change, only apq8064 remains split. This is a cosmetic change only, with no functional impact. Tested-by: Rudraksha Gupta <guptarud@gmail.com> Tested-by: Shinjo Park <peremen@gmail.com> Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-msm8960-reorder-v2-2-26c478366d21@smankusors.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-02ARM: dts: qcom: msm8960: reorder nodes and propertiesAntony Kurniawan Soemardi
Reorder the nodes in qcom-msm8960.dtsi by unit address and sort properties, as recommended in the Devicetree style guide. This is a cosmetic change only, with no functional impact. Tested-by: Rudraksha Gupta <guptarud@gmail.com> Tested-by: Shinjo Park <peremen@gmail.com> Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250921-msm8960-reorder-v2-1-26c478366d21@smankusors.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-02arm64: dts: qcom: sm8750: Add USB support for SM8750 QRD platformWesley Cheng
Enable USB support on SM8750 QRD variant. Add the PMIC glink node with connector to enable role switch support. Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> [Konrad: Provided diff to flatten USB node on MTP] Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Co-developed-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251101174437.1267998-4-krishna.kurapati@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-02arm64: dts: qcom: sm8750: Add USB support for SM8750 MTP platformWesley Cheng
Enable USB support on SM8750 MTP variant. Add the PMIC glink node with connector to enable role switch support. Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> [Konrad: Provided diff to flatten USB node on MTP] Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Co-developed-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251101174437.1267998-3-krishna.kurapati@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-02arm64: dts: qcom: sm8750: Add USB support to SM8750 SoCsWesley Cheng
SM8750 chipset contains a single DWC3 USB3 controller (rev. 200a), SS QMP PHY (rev. v8) and M31 eUSB2 PHY. The major difference for SM8750 is the transition to using the M31 eUSB2 PHY compared to previous SoCs. Enable USB support on SM8750 MTP and QRD variants. SM8750 has a QMP combo PHY for the SSUSB path, and a M31 eUSB2 PHY for the HSUSB path. Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> [Konrad: Provided diff to flattened USB node] Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251101174437.1267998-2-krishna.kurapati@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-02tools/nolibc: make the "headers" target install all supported archsWilly Tarreau
The efforts we go through by installing a single arch are counter productive when the base directory already supports them all, and the arch-specific files are really small. Let's make the "headers" target simply install headers for all supported archs and stop trying to build a hybrid "arch.h" file on the fly, to instead keep the generic one. Now the same nolibc headers installation will be usable with any arch-specific uapi installation. Signed-off-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Thomas Weißschuh <linux@weissschuh.net>
2025-11-02tools/nolibc: add the more portable inttypes.hWilly Tarreau
It's often recommended to only use inttypes.h instead of stdint.h for portability reasons since the former is always present when the latter is present, but not conversely, and the former includes the latter. Due to this some simple programs fail to build when including inttypes.h. Let's add one that simply includes nolibc.h to better support these programs. Signed-off-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Thomas Weißschuh <linux@weissschuh.net>
2025-11-02clk: microchip: mpfs: use regmap for clocksConor Dooley
Convert the PolarFire SoC clock driver to use regmaps instead of iomem addresses as a preparatory work for supporting the new binding for this device that will only provide the second of the two register regions, and will require the use of syscon regmap to access the "cfg" and "periph" clocks currently supported by the driver. This is effectively a revert of commit 4da2404bb003 ("clk: microchip: mpfs: convert cfg_clk to clk_divider") and commit d815569783e6 ("clk: microchip: mpfs: convert periph_clk to clk_gate") as it resurrects the ops structures removed in those commits, with the readl()s and writel()s replaced by regmap_read()s and regmap_writes()s. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/20251029-surfboard-refocus-ca9b135ab123@spud Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-11-02dt-bindings: clk: microchip: mpfs: remove first reg regionConor Dooley
The first reg region in this binding is not exclusively for clocks, as evidenced by the dual role of this device as a reset controller at present. The first region is however better described by a simple-mfd syscon, but this would have require a significant re-write of the devicetree for the platform, so the easy way out was chosen when reset support was first introduced. The region doesn't just contain clock and reset registers, it also contains pinctrl and interrupt controller functionality, so drop the region from the clock binding so that it can be described instead by a simple-mfd syscon rather than propagate this incorrect description of the hardware to the new pic64gx SoC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20251029-unwatched-family-e47cb29ea815@spud Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-11-02random: remove unused get_random_var_wait functionsEric Biggers
None of these functions are used, so remove them. This renders the two bugs moot: - get_random_u64_wait() used the wrong pointer type, making it provide only 32 bits. - The '#undef' directive used the wrong identifier, leaving the helper macro defined. Signed-off-by: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
2025-11-02tools/nolibc: provide the portable sys/select.hWilly Tarreau
Modern programs tend to include sys/select.h to get FD_SET() and FD_CLR() definitions as well as struct fd_set, but in our case it didn't exist. The definitions were moved from types.h to sys/select.h, which is now included from nolibc.h, and the sys_select() definition moved there as well from sys.h. Signed-off-by: Willy Tarreau <w@1wt.eu> [Thomas: adapt to current -next branch] Signed-off-by: Thomas Weißschuh <linux@weissschuh.net>
2025-11-02RDMA/irdma: CQ size and shadow update changes for GEN3Jay Bhat
CQ shadow area should not be updated at the end of a page (once every 64th CQ entry), except when CQ has no more CQEs. SW must also increase the requested CQ size by 1 and make sure the CQ is not exactly one page in size. This is to address a quirk in the hardware. Signed-off-by: Jay Bhat <jay.bhat@intel.com> Signed-off-by: Tatyana Nikolova <tatyana.e.nikolova@intel.com> Link: https://patch.msgid.link/20251031021726.1003-4-tatyana.e.nikolova@intel.com Signed-off-by: Leon Romanovsky <leon@kernel.org>
2025-11-02RDMA/irdma: Silently consume unsignaled completionsJay Bhat
In case we get an unsignaled error completion, we silently consume the CQE by pretending the QP does not exist. Without this, bookkeeping for signaled completions does not work correctly. Signed-off-by: Jay Bhat <jay.bhat@intel.com> Signed-off-by: Tatyana Nikolova <tatyana.e.nikolova@intel.com> Link: https://patch.msgid.link/20251031021726.1003-5-tatyana.e.nikolova@intel.com Signed-off-by: Leon Romanovsky <leon@kernel.org>
2025-11-02RDMA/irdma: Initialize cqp_cmds_info to prevent resource leaksJay Bhat
Failure to initialize info.create field to false in certain cases was resulting in incorrect status code going to rdma-core when dereg_mr failed during reset. To fix this, memset entire cqp_request->info in irdma_alloc_and_get_cqp_request() function, so that this is not spread all over the code. Signed-off-by: Bhat, Jay <jay.bhat@intel.com> Reviewed-by: Jacob Moroni <jmoroni@google.com> Signed-off-by: Krzysztof Czurylo <krzysztof.czurylo@intel.com> Signed-off-by: Tatyana Nikolova <tatyana.e.nikolova@intel.com> Link: https://patch.msgid.link/20251031021726.1003-2-tatyana.e.nikolova@intel.com Signed-off-by: Leon Romanovsky <leon@kernel.org>
2025-11-02RDMA/irdma: Enforce local fence for LOCAL_INV WRsJacob Moroni
Enforce local fence for LOCAL_INV WRs to avoid spurious FASTREG_VALID_MKEY async events during heavy invalidation/registration activity. Signed-off-by: Jacob Moroni <jmoroni@google.com> Signed-off-by: Tatyana Nikolova <tatyana.e.nikolova@intel.com> Link: https://patch.msgid.link/20251031021726.1003-3-tatyana.e.nikolova@intel.com Signed-off-by: Leon Romanovsky <leon@kernel.org>
2025-11-02MAINTAINERS: Update irdma maintainersKrzysztof Czurylo
Adds Krzysztof Czurylo as co-maintainer for irdma driver. Signed-off-by: Krzysztof Czurylo <krzysztof.czurylo@intel.com> Signed-off-by: Tatyana Nikolova <tatyana.e.nikolova@intel.com> Signed-off-by: Leon Romanovsky <leon@kernel.org>
2025-11-02RDMA/irdma: Fix vf_id size to u16 to avoid overflowJay Bhat
Correctly size the vf_id to u16 to avoid overflow. Signed-off-by: Jay Bhat <jay.bhat@intel.com> Signed-off-by: Tatyana Nikolova <tatyana.e.nikolova@intel.com> Link: https://patch.msgid.link/20251031021726.1003-6-tatyana.e.nikolova@intel.com Signed-off-by: Leon Romanovsky <leon@kernel.org>
2025-11-02tools/nolibc: add missing memchr() to string.hWilly Tarreau
Surprisingly we forgot to add this common one. It was added with a per-arch guard allowing to later implement it in arch-specific asm code like was done for a few other ones. The test verifies that we don't search past the indicated length. Signed-off-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Thomas Weißschuh <linux@weissschuh.net>
2025-11-02tools/nolibc: fix misleading help message regarding installation pathWilly Tarreau
The help message says the headers are going to be installed into tools/include/nolibc but this is only the default if $OUTPUT is not set, so better clarify this (the current value of $OUTPUT is already shown). Signed-off-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Thomas Weißschuh <linux@weissschuh.net>
2025-11-02ALSA: line6: add support for POD HD Pro XBaltazár Radics
It uses the same protocol as other POD HD models so it just needed proper config. Signed-off-by: Baltazár Radics <baltazar.radics@gmail.com> Link: https://patch.msgid.link/20251031183514.40926-1-baltazar.radics@gmail.com Signed-off-by: Takashi Iwai <tiwai@suse.de>
2025-11-02riscv: sophgo: dts: enable PCIe for SG2042_EVB_V2.0Chen Wang
Enable PCIe controllers for Sophgo SG2042_EVB_V2.0 board, which uses SG2042 SoC. Signed-off-by: Han Gao <rabenda.cn@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/50a753f9b8cbd5a90b5b2df737f87fc77a9b33a7.1760929111.git.unicorn_wang@outlook.com Tested-by: Han Gao <rabenda.cn@gmail.com> Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-11-02riscv: sophgo: dts: enable PCIe for SG2042_EVB_V1.XChen Wang
Enable PCIe controllers for Sophgo SG2042_EVB_V1.X board, which uses SG2042 SoC. Signed-off-by: Han Gao <rabenda.cn@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/1ad96631cc9d9d7403a2bed5585d856fa101a2ef.1760929111.git.unicorn_wang@outlook.com Tested-by: Han Gao <rabenda.cn@gmail.com> Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-11-02riscv: sophgo: dts: enable PCIe for PioneerBoxChen Wang
Enable PCIe controllers for PioneerBox, which uses SG2042 SoC. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/ec474c5eefb79626dd6a4d65454da9109aaf2f4d.1760929111.git.unicorn_wang@outlook.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-11-02riscv: sophgo: dts: add PCIe controllers for SG2042Chen Wang
Add PCIe controller nodes in DTS for Sophgo SG2042. Default they are disabled. Acked-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Han Gao <rabenda.cn@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Link: https://lore.kernel.org/r/b34d819cd763482e0ecbc5c5ea721f0101d1f844.1760929111.git.unicorn_wang@outlook.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-11-01genirq/manage: Reduce priority of forced secondary interrupt handlerLukas Wunner
Crystal reports that the PCIe Advanced Error Reporting driver gets stuck in an infinite loop on PREEMPT_RT: Both the primary interrupt handler aer_irq() as well as the secondary handler aer_isr() are forced into threads with identical priority. Crystal writes that on the ARM system in question, the primary handler has to clear an error in the Root Error Status register... "before the next error happens, or else the hardware will set the Multiple ERR_COR Received bit. If that bit is set, then aer_isr() can't rely on the Error Source Identification register, so it scans through all devices looking for errors -- and for some reason, on this system, accessing the AER registers (or any Config Space above 0x400, even though there are capabilities located there) generates an Unsupported Request Error (but returns valid data). Since this happens more than once, without aer_irq() preempting, it causes another multi error and we get stuck in a loop." The issue does not show on non-PREEMPT_RT because the primary handler runs in hardirq context and thus can preempt the threaded secondary handler, clear the Root Error Status register and prevent the secondary handler from getting stuck. Emulate the same behavior on PREEMPT_RT by assigning a lower default priority to the secondary handler if the primary handler is forced into a thread. Reported-by: Crystal Wood <crwood@redhat.com> Signed-off-by: Lukas Wunner <lukas@wunner.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Crystal Wood <crwood@redhat.com> Reviewed-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Link: https://patch.msgid.link/f6dcdb41be2694886b8dbf4fe7b3ab89e9d5114c.1761569303.git.lukas@wunner.de Closes: https://lore.kernel.org/r/20250902224441.368483-1-crwood@redhat.com/
2025-11-01timers/migration: Remove dead code handling idle CPU checking for remote timersFrederic Weisbecker
Idle migrators don't walk the whole tree in order to find out if there are timers to migrate because they recorded the next deadline to be verified within a single check in tmigr_requires_handle_remote(). Remove the related dead code and data. Signed-off-by: Frederic Weisbecker <frederic@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://patch.msgid.link/20251024132536.39841-7-frederic@kernel.org
2025-11-01timers/migration: Remove unused "cpu" parameter from tmigr_get_group()Frederic Weisbecker
Signed-off-by: Frederic Weisbecker <frederic@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://patch.msgid.link/20251024132536.39841-6-frederic@kernel.org
2025-11-01timers/migration: Assert that hotplug preparing CPU is part of stable active ↵Frederic Weisbecker
hierarchy The CPU doing the prepare work for a remote target must be online from the tree point of view and its hierarchy must be active, otherwise propagating its active state up to the new root branch would be either incorrect or racy. Assert those conditions with more sanity checks. Signed-off-by: Frederic Weisbecker <frederic@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://patch.msgid.link/20251024132536.39841-5-frederic@kernel.org
2025-11-01timers/migration: Fix imbalanced NUMA treesFrederic Weisbecker
When a CPU from a new node boots, the old root may happen to be connected to the new root even if their node mismatch, as depicted in the following scenario: 1) CPU 0 boots and creates the first group for node 0. [GRP0:0] node 0 | CPU 0 2) CPU 1 from node 1 boots and creates a new top that corresponds to node 1, but it also connects the old root from node 0 to the new root from node 1 by mistake. [GRP1:0] node 1 / \ / \ [GRP0:0] [GRP0:1] node 0 node 1 | | CPU 0 CPU 1 3) This eventually leads to an imbalanced tree where some node 0 CPUs migrate node 1 timers (and vice versa) way before reaching the crossnode groups, resulting in more frequent remote memory accesses than expected. [GRP2:0] NUMA_NO_NODE / \ [GRP1:0] [GRP1:1] node 1 node 0 / \ | / \ [...] [GRP0:0] [GRP0:1] node 0 node 1 | | CPU 0... CPU 1... A balanced tree should only contain groups having children that belong to the same node: [GRP2:0] NUMA_NO_NODE / \ [GRP1:0] [GRP1:0] node 0 node 1 / \ / \ / \ / \ [GRP0:0] [...] [...] [GRP0:1] node 0 node 1 | | CPU 0... CPU 1... In order to fix this, the hierarchy must be unfolded up to the crossnode level as soon as a node mismatch is detected. For example the stage 2 above should lead to this layout: [GRP2:0] NUMA_NO_NODE / \ [GRP1:0] [GRP1:1] node 0 node 1 / \ / \ [GRP0:0] [GRP0:1] node 0 node 1 | | CPU 0 CPU 1 This means that not only GRP1:0 must be created but also GRP1:1 and GRP2:0 in order to prepare a balanced tree for next CPUs to boot. Fixes: 7ee988770326 ("timers: Implement the hierarchical pull model") Signed-off-by: Frederic Weisbecker <frederic@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://patch.msgid.link/20251024132536.39841-4-frederic@kernel.org
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