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path: root/drivers/gpu/drm/xe/xe_vm.c
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Diffstat (limited to 'drivers/gpu/drm/xe/xe_vm.c')
-rw-r--r--drivers/gpu/drm/xe/xe_vm.c251
1 files changed, 203 insertions, 48 deletions
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 095bb197e8b0..dd6d99d7fca8 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -33,7 +33,6 @@
#include "xe_preempt_fence.h"
#include "xe_pt.h"
#include "xe_pxp.h"
-#include "xe_res_cursor.h"
#include "xe_sriov_vf.h"
#include "xe_svm.h"
#include "xe_sync.h"
@@ -957,14 +956,37 @@ free_ops:
return fence;
}
+static void xe_vma_mem_attr_fini(struct xe_vma_mem_attr *attr)
+{
+ drm_pagemap_put(attr->preferred_loc.dpagemap);
+}
+
static void xe_vma_free(struct xe_vma *vma)
{
+ xe_vma_mem_attr_fini(&vma->attr);
+
if (xe_vma_is_userptr(vma))
kfree(to_userptr_vma(vma));
else
kfree(vma);
}
+/**
+ * xe_vma_mem_attr_copy() - copy an xe_vma_mem_attr structure.
+ * @to: Destination.
+ * @from: Source.
+ *
+ * Copies an xe_vma_mem_attr structure taking care to get reference
+ * counting of individual members right.
+ */
+void xe_vma_mem_attr_copy(struct xe_vma_mem_attr *to, struct xe_vma_mem_attr *from)
+{
+ xe_vma_mem_attr_fini(to);
+ *to = *from;
+ if (to->preferred_loc.dpagemap)
+ drm_pagemap_get(to->preferred_loc.dpagemap);
+}
+
static struct xe_vma *xe_vma_create(struct xe_vm *vm,
struct xe_bo *bo,
u64 bo_offset_or_userptr,
@@ -1015,14 +1037,13 @@ static struct xe_vma *xe_vma_create(struct xe_vm *vm,
if (vm->xe->info.has_atomic_enable_pte_bit)
vma->gpuva.flags |= XE_VMA_ATOMIC_PTE_BIT;
- vma->attr = *attr;
-
+ xe_vma_mem_attr_copy(&vma->attr, attr);
if (bo) {
struct drm_gpuvm_bo *vm_bo;
xe_bo_assert_held(bo);
- vm_bo = drm_gpuvm_bo_obtain(vma->gpuva.vm, &bo->ttm.base);
+ vm_bo = drm_gpuvm_bo_obtain_locked(vma->gpuva.vm, &bo->ttm.base);
if (IS_ERR(vm_bo)) {
xe_vma_free(vma);
return ERR_CAST(vm_bo);
@@ -1509,9 +1530,9 @@ struct xe_vm *xe_vm_create(struct xe_device *xe, u32 flags, struct xe_file *xef)
INIT_LIST_HEAD(&vm->preempt.exec_queues);
if (flags & XE_VM_FLAG_FAULT_MODE)
- vm->preempt.min_run_period_ms = 0;
+ vm->preempt.min_run_period_ms = xe->min_run_period_pf_ms;
else
- vm->preempt.min_run_period_ms = 5;
+ vm->preempt.min_run_period_ms = xe->min_run_period_lr_ms;
for_each_tile(tile, xe, id)
xe_range_fence_tree_init(&vm->rftree[id]);
@@ -2187,7 +2208,7 @@ static void print_op(struct xe_device *xe, struct drm_gpuva_op *op)
(ULL)xe_vma_start(vma), (ULL)xe_vma_size(vma));
break;
default:
- drm_warn(&xe->drm, "NOT POSSIBLE");
+ drm_warn(&xe->drm, "NOT POSSIBLE\n");
}
}
#else
@@ -2236,6 +2257,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_vma_ops *vops,
struct drm_gpuva_ops *ops;
struct drm_gpuva_op *__op;
struct drm_gpuvm_bo *vm_bo;
+ u64 range_start = addr;
u64 range_end = addr + range;
int err;
@@ -2248,10 +2270,16 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_vma_ops *vops,
switch (operation) {
case DRM_XE_VM_BIND_OP_MAP:
+ if (flags & DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR) {
+ xe_vm_find_cpu_addr_mirror_vma_range(vm, &range_start, &range_end);
+ vops->flags |= XE_VMA_OPS_FLAG_ALLOW_SVM_UNMAP;
+ }
+
+ fallthrough;
case DRM_XE_VM_BIND_OP_MAP_USERPTR: {
struct drm_gpuvm_map_req map_req = {
- .map.va.addr = addr,
- .map.va.range = range,
+ .map.va.addr = range_start,
+ .map.va.range = range_end - range_start,
.map.gem.obj = obj,
.map.gem.offset = bo_offset_or_userptr,
};
@@ -2272,7 +2300,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_vma_ops *vops,
if (err)
return ERR_PTR(err);
- vm_bo = drm_gpuvm_bo_obtain(&vm->gpuvm, obj);
+ vm_bo = drm_gpuvm_bo_obtain_locked(&vm->gpuvm, obj);
if (IS_ERR(vm_bo)) {
xe_bo_unlock(bo);
return ERR_CAST(vm_bo);
@@ -2283,7 +2311,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_vma_ops *vops,
xe_bo_unlock(bo);
break;
default:
- drm_warn(&vm->xe->drm, "NOT POSSIBLE");
+ drm_warn(&vm->xe->drm, "NOT POSSIBLE\n");
ops = ERR_PTR(-EINVAL);
}
if (IS_ERR(ops))
@@ -2313,7 +2341,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_vma_ops *vops,
struct xe_tile *tile;
struct xe_svm_range *svm_range;
struct drm_gpusvm_ctx ctx = {};
- struct drm_pagemap *dpagemap;
+ struct drm_pagemap *dpagemap = NULL;
u8 id, tile_mask = 0;
u32 i;
@@ -2331,23 +2359,17 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_vma_ops *vops,
xa_init_flags(&op->prefetch_range.range, XA_FLAGS_ALLOC);
op->prefetch_range.ranges_count = 0;
- tile = NULL;
if (prefetch_region == DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC) {
dpagemap = xe_vma_resolve_pagemap(vma,
xe_device_get_root_tile(vm->xe));
- /*
- * TODO: Once multigpu support is enabled will need
- * something to dereference tile from dpagemap.
- */
- if (dpagemap)
- tile = xe_device_get_root_tile(vm->xe);
} else if (prefetch_region) {
tile = &vm->xe->tiles[region_to_mem_type[prefetch_region] -
XE_PL_VRAM0];
+ dpagemap = xe_tile_local_pagemap(tile);
}
- op->prefetch_range.tile = tile;
+ op->prefetch_range.dpagemap = dpagemap;
alloc_next_range:
svm_range = xe_svm_range_find_or_insert(vm, addr, vma, &ctx);
@@ -2366,7 +2388,7 @@ alloc_next_range:
goto unwind_prefetch_ops;
}
- if (xe_svm_range_validate(vm, svm_range, tile_mask, !!tile)) {
+ if (xe_svm_range_validate(vm, svm_range, tile_mask, dpagemap)) {
xe_svm_range_debug(svm_range, "PREFETCH - RANGE IS VALID");
goto check_next_range;
}
@@ -2451,8 +2473,17 @@ static struct xe_vma *new_vma(struct xe_vm *vm, struct drm_gpuva_op_map *op,
if (IS_ERR(vma))
return vma;
- if (xe_vma_is_userptr(vma))
+ if (xe_vma_is_userptr(vma)) {
err = xe_vma_userptr_pin_pages(to_userptr_vma(vma));
+ /*
+ * -EBUSY has dedicated meaning that a user fence
+ * attached to the VMA is busy, in practice
+ * xe_vma_userptr_pin_pages can only fail with -EBUSY if
+ * we are low on memory so convert this to -ENOMEM.
+ */
+ if (err == -EBUSY)
+ err = -ENOMEM;
+ }
}
if (err) {
prep_vma_destroy(vm, vma, false);
@@ -2552,7 +2583,7 @@ static int xe_vma_op_commit(struct xe_vm *vm, struct xe_vma_op *op)
op->flags |= XE_VMA_OP_COMMITTED;
break;
default:
- drm_warn(&vm->xe->drm, "NOT POSSIBLE");
+ drm_warn(&vm->xe->drm, "NOT POSSIBLE\n");
}
return err;
@@ -2727,7 +2758,8 @@ static int vm_bind_ioctl_ops_parse(struct xe_vm *vm, struct drm_gpuva_ops *ops,
if (xe_vma_is_cpu_addr_mirror(vma) &&
xe_svm_has_mapping(vm, xe_vma_start(vma),
- xe_vma_end(vma)))
+ xe_vma_end(vma)) &&
+ !(vops->flags & XE_VMA_OPS_FLAG_ALLOW_SVM_UNMAP))
return -EBUSY;
if (!xe_vma_is_cpu_addr_mirror(vma))
@@ -2750,7 +2782,7 @@ static int vm_bind_ioctl_ops_parse(struct xe_vm *vm, struct drm_gpuva_ops *ops,
break;
default:
- drm_warn(&vm->xe->drm, "NOT POSSIBLE");
+ drm_warn(&vm->xe->drm, "NOT POSSIBLE\n");
}
err = xe_vma_op_commit(vm, op);
@@ -2812,7 +2844,7 @@ static void xe_vma_op_unwind(struct xe_vm *vm, struct xe_vma_op *op,
/* Nothing to do */
break;
default:
- drm_warn(&vm->xe->drm, "NOT POSSIBLE");
+ drm_warn(&vm->xe->drm, "NOT POSSIBLE\n");
}
}
@@ -2878,7 +2910,7 @@ static int prefetch_ranges(struct xe_vm *vm, struct xe_vma_op *op)
{
bool devmem_possible = IS_DGFX(vm->xe) && IS_ENABLED(CONFIG_DRM_XE_PAGEMAP);
struct xe_vma *vma = gpuva_to_vma(op->base.prefetch.va);
- struct xe_tile *tile = op->prefetch_range.tile;
+ struct drm_pagemap *dpagemap = op->prefetch_range.dpagemap;
int err = 0;
struct xe_svm_range *svm_range;
@@ -2891,15 +2923,22 @@ static int prefetch_ranges(struct xe_vm *vm, struct xe_vma_op *op)
ctx.read_only = xe_vma_read_only(vma);
ctx.devmem_possible = devmem_possible;
ctx.check_pages_threshold = devmem_possible ? SZ_64K : 0;
- ctx.device_private_page_owner = xe_svm_devm_owner(vm->xe);
+ ctx.device_private_page_owner = xe_svm_private_page_owner(vm, !dpagemap);
/* TODO: Threading the migration */
xa_for_each(&op->prefetch_range.range, i, svm_range) {
- if (!tile)
+ if (!dpagemap)
xe_svm_range_migrate_to_smem(vm, svm_range);
- if (xe_svm_range_needs_migrate_to_vram(svm_range, vma, !!tile)) {
- err = xe_svm_alloc_vram(tile, svm_range, &ctx);
+ if (IS_ENABLED(CONFIG_DRM_XE_DEBUG_VM)) {
+ drm_dbg(&vm->xe->drm,
+ "Prefetch pagemap is %s start 0x%016lx end 0x%016lx\n",
+ dpagemap ? dpagemap->drm->unique : "system",
+ xe_svm_range_start(svm_range), xe_svm_range_end(svm_range));
+ }
+
+ if (xe_svm_range_needs_migrate_to_vram(svm_range, vma, dpagemap)) {
+ err = xe_svm_alloc_vram(svm_range, &ctx, dpagemap);
if (err) {
drm_dbg(&vm->xe->drm, "VRAM allocation failed, retry from userspace, asid=%u, gpusvm=%p, errno=%pe\n",
vm->usm.asid, &vm->svm.gpusvm, ERR_PTR(err));
@@ -2989,7 +3028,7 @@ static int op_lock_and_prep(struct drm_exec *exec, struct xe_vm *vm,
break;
}
default:
- drm_warn(&vm->xe->drm, "NOT POSSIBLE");
+ drm_warn(&vm->xe->drm, "NOT POSSIBLE\n");
}
return err;
@@ -3107,19 +3146,19 @@ static struct dma_fence *ops_execute(struct xe_vm *vm,
struct dma_fence *fence = NULL;
struct dma_fence **fences = NULL;
struct dma_fence_array *cf = NULL;
- int number_tiles = 0, current_fence = 0, n_fence = 0, err;
+ int number_tiles = 0, current_fence = 0, n_fence = 0, err, i;
u8 id;
number_tiles = vm_ops_setup_tile_args(vm, vops);
if (number_tiles == 0)
return ERR_PTR(-ENODATA);
- if (vops->flags & XE_VMA_OPS_FLAG_SKIP_TLB_WAIT) {
- for_each_tile(tile, vm->xe, id)
- ++n_fence;
- } else {
- for_each_tile(tile, vm->xe, id)
- n_fence += (1 + XE_MAX_GT_PER_TILE);
+ for_each_tile(tile, vm->xe, id) {
+ ++n_fence;
+
+ if (!(vops->flags & XE_VMA_OPS_FLAG_SKIP_TLB_WAIT))
+ for_each_tlb_inval(i)
+ ++n_fence;
}
fences = kmalloc_array(n_fence, sizeof(*fences), GFP_KERNEL);
@@ -3149,7 +3188,6 @@ static struct dma_fence *ops_execute(struct xe_vm *vm,
for_each_tile(tile, vm->xe, id) {
struct xe_exec_queue *q = vops->pt_update_ops[tile->id].q;
- int i;
fence = NULL;
if (!vops->pt_update_ops[id].num_ops)
@@ -3214,7 +3252,8 @@ static void op_add_ufence(struct xe_vm *vm, struct xe_vma_op *op,
{
switch (op->base.op) {
case DRM_GPUVA_OP_MAP:
- vma_add_ufence(op->map.vma, ufence);
+ if (!xe_vma_is_cpu_addr_mirror(op->map.vma))
+ vma_add_ufence(op->map.vma, ufence);
break;
case DRM_GPUVA_OP_REMAP:
if (op->remap.prev)
@@ -3228,7 +3267,7 @@ static void op_add_ufence(struct xe_vm *vm, struct xe_vma_op *op,
vma_add_ufence(gpuva_to_vma(op->base.prefetch.va), ufence);
break;
default:
- drm_warn(&vm->xe->drm, "NOT POSSIBLE");
+ drm_warn(&vm->xe->drm, "NOT POSSIBLE\n");
}
}
@@ -3365,6 +3404,7 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR;
u16 pat_index = (*bind_ops)[i].pat_index;
u16 coh_mode;
+ bool comp_en;
if (XE_IOCTL_DBG(xe, is_cpu_addr_mirror &&
(!xe_vm_in_fault_mode(vm) ||
@@ -3381,6 +3421,7 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
pat_index = array_index_nospec(pat_index, xe->pat.n_entries);
(*bind_ops)[i].pat_index = pat_index;
coh_mode = xe_pat_index_get_coh_mode(xe, pat_index);
+ comp_en = xe_pat_index_get_comp_en(xe, pat_index);
if (XE_IOCTL_DBG(xe, !coh_mode)) { /* hw reserved */
err = -EINVAL;
goto free_bind_ops;
@@ -3411,6 +3452,8 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe, struct xe_vm *vm,
op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
XE_IOCTL_DBG(xe, coh_mode == XE_COH_NONE &&
op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
+ XE_IOCTL_DBG(xe, comp_en &&
+ op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
XE_IOCTL_DBG(xe, op == DRM_XE_VM_BIND_OP_MAP_USERPTR &&
!IS_ENABLED(CONFIG_DRM_GPUSVM)) ||
XE_IOCTL_DBG(xe, obj &&
@@ -3489,6 +3532,11 @@ static int xe_vm_bind_ioctl_validate_bo(struct xe_device *xe, struct xe_bo *bo,
u16 pat_index, u32 op, u32 bind_flags)
{
u16 coh_mode;
+ bool comp_en;
+
+ if (XE_IOCTL_DBG(xe, (bo->flags & XE_BO_FLAG_NO_COMPRESSION) &&
+ xe_pat_index_get_comp_en(xe, pat_index)))
+ return -EINVAL;
if (XE_IOCTL_DBG(xe, range > xe_bo_size(bo)) ||
XE_IOCTL_DBG(xe, obj_offset >
@@ -3530,6 +3578,14 @@ static int xe_vm_bind_ioctl_validate_bo(struct xe_device *xe, struct xe_bo *bo,
return -EINVAL;
}
+ /*
+ * Ensures that imported buffer objects (dma-bufs) are not mapped
+ * with a PAT index that enables compression.
+ */
+ comp_en = xe_pat_index_get_comp_en(xe, pat_index);
+ if (XE_IOCTL_DBG(xe, bo->ttm.base.import_attach && comp_en))
+ return -EINVAL;
+
/* If a BO is protected it can only be mapped if the key is still valid */
if ((bind_flags & DRM_XE_VM_BIND_FLAG_CHECK_PXP) && xe_bo_is_protected(bo) &&
op != DRM_XE_VM_BIND_OP_UNMAP && op != DRM_XE_VM_BIND_OP_UNMAP_ALL)
@@ -3918,7 +3974,7 @@ int xe_vm_range_tilemask_tlb_inval(struct xe_vm *vm, u64 start,
err = xe_tlb_inval_range(&tile->primary_gt->tlb_inval,
&fence[fence_id], start, end,
- vm->usm.asid);
+ vm->usm.asid, NULL);
if (err)
goto wait;
++fence_id;
@@ -3931,7 +3987,7 @@ int xe_vm_range_tilemask_tlb_inval(struct xe_vm *vm, u64 start,
err = xe_tlb_inval_range(&tile->media_gt->tlb_inval,
&fence[fence_id], start, end,
- vm->usm.asid);
+ vm->usm.asid, NULL);
if (err)
goto wait;
++fence_id;
@@ -4037,10 +4093,18 @@ int xe_vm_validate_protected(struct xe_vm *vm)
}
struct xe_vm_snapshot {
+ int uapi_flags;
unsigned long num_snaps;
struct {
u64 ofs, bo_ofs;
unsigned long len;
+#define XE_VM_SNAP_FLAG_USERPTR BIT(0)
+#define XE_VM_SNAP_FLAG_READ_ONLY BIT(1)
+#define XE_VM_SNAP_FLAG_IS_NULL BIT(2)
+ unsigned long flags;
+ int uapi_mem_region;
+ int pat_index;
+ int cpu_caching;
struct xe_bo *bo;
void *data;
struct mm_struct *mm;
@@ -4069,6 +4133,13 @@ struct xe_vm_snapshot *xe_vm_snapshot_capture(struct xe_vm *vm)
goto out_unlock;
}
+ if (vm->flags & XE_VM_FLAG_FAULT_MODE)
+ snap->uapi_flags |= DRM_XE_VM_CREATE_FLAG_FAULT_MODE;
+ if (vm->flags & XE_VM_FLAG_LR_MODE)
+ snap->uapi_flags |= DRM_XE_VM_CREATE_FLAG_LR_MODE;
+ if (vm->flags & XE_VM_FLAG_SCRATCH_PAGE)
+ snap->uapi_flags |= DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE;
+
snap->num_snaps = num_snaps;
i = 0;
drm_gpuvm_for_each_va(gpuva, &vm->gpuvm) {
@@ -4081,9 +4152,25 @@ struct xe_vm_snapshot *xe_vm_snapshot_capture(struct xe_vm *vm)
snap->snap[i].ofs = xe_vma_start(vma);
snap->snap[i].len = xe_vma_size(vma);
+ snap->snap[i].flags = xe_vma_read_only(vma) ?
+ XE_VM_SNAP_FLAG_READ_ONLY : 0;
+ snap->snap[i].pat_index = vma->attr.pat_index;
if (bo) {
+ snap->snap[i].cpu_caching = bo->cpu_caching;
snap->snap[i].bo = xe_bo_get(bo);
snap->snap[i].bo_ofs = xe_vma_bo_offset(vma);
+ switch (bo->ttm.resource->mem_type) {
+ case XE_PL_SYSTEM:
+ case XE_PL_TT:
+ snap->snap[i].uapi_mem_region = 0;
+ break;
+ case XE_PL_VRAM0:
+ snap->snap[i].uapi_mem_region = 1;
+ break;
+ case XE_PL_VRAM1:
+ snap->snap[i].uapi_mem_region = 2;
+ break;
+ }
} else if (xe_vma_is_userptr(vma)) {
struct mm_struct *mm =
to_userptr_vma(vma)->userptr.notifier.mm;
@@ -4094,8 +4181,14 @@ struct xe_vm_snapshot *xe_vm_snapshot_capture(struct xe_vm *vm)
snap->snap[i].data = ERR_PTR(-EFAULT);
snap->snap[i].bo_ofs = xe_vma_userptr(vma);
+ snap->snap[i].flags |= XE_VM_SNAP_FLAG_USERPTR;
+ snap->snap[i].uapi_mem_region = 0;
+ } else if (xe_vma_is_null(vma)) {
+ snap->snap[i].flags |= XE_VM_SNAP_FLAG_IS_NULL;
+ snap->snap[i].uapi_mem_region = -1;
} else {
snap->snap[i].data = ERR_PTR(-ENOENT);
+ snap->snap[i].uapi_mem_region = -1;
}
i++;
}
@@ -4114,7 +4207,8 @@ void xe_vm_snapshot_capture_delayed(struct xe_vm_snapshot *snap)
struct xe_bo *bo = snap->snap[i].bo;
int err;
- if (IS_ERR(snap->snap[i].data))
+ if (IS_ERR(snap->snap[i].data) ||
+ snap->snap[i].flags & XE_VM_SNAP_FLAG_IS_NULL)
continue;
snap->snap[i].data = kvmalloc(snap->snap[i].len, GFP_USER);
@@ -4160,15 +4254,32 @@ void xe_vm_snapshot_print(struct xe_vm_snapshot *snap, struct drm_printer *p)
return;
}
+ drm_printf(p, "VM.uapi_flags: 0x%x\n", snap->uapi_flags);
for (i = 0; i < snap->num_snaps; i++) {
drm_printf(p, "[%llx].length: 0x%lx\n", snap->snap[i].ofs, snap->snap[i].len);
+ drm_printf(p, "[%llx].properties: %s|%s|mem_region=0x%lx|pat_index=%d|cpu_caching=%d\n",
+ snap->snap[i].ofs,
+ snap->snap[i].flags & XE_VM_SNAP_FLAG_READ_ONLY ?
+ "read_only" : "read_write",
+ snap->snap[i].flags & XE_VM_SNAP_FLAG_IS_NULL ?
+ "null_sparse" :
+ snap->snap[i].flags & XE_VM_SNAP_FLAG_USERPTR ?
+ "userptr" : "bo",
+ snap->snap[i].uapi_mem_region == -1 ? 0 :
+ BIT(snap->snap[i].uapi_mem_region),
+ snap->snap[i].pat_index,
+ snap->snap[i].cpu_caching);
+
if (IS_ERR(snap->snap[i].data)) {
drm_printf(p, "[%llx].error: %li\n", snap->snap[i].ofs,
PTR_ERR(snap->snap[i].data));
continue;
}
+ if (snap->snap[i].flags & XE_VM_SNAP_FLAG_IS_NULL)
+ continue;
+
drm_printf(p, "[%llx].data: ", snap->snap[i].ofs);
for (j = 0; j < snap->snap[i].len; j += sizeof(u32)) {
@@ -4253,7 +4364,7 @@ static int xe_vm_alloc_vma(struct xe_vm *vm,
struct drm_gpuva_op *__op;
unsigned int vma_flags = 0;
bool remap_op = false;
- struct xe_vma_mem_attr tmp_attr;
+ struct xe_vma_mem_attr tmp_attr = {};
u16 default_pat;
int err;
@@ -4322,6 +4433,8 @@ static int xe_vm_alloc_vma(struct xe_vm *vm,
if (is_madvise)
vops.flags |= XE_VMA_OPS_FLAG_MADVISE;
+ else
+ vops.flags |= XE_VMA_OPS_FLAG_ALLOW_SVM_UNMAP;
err = vm_bind_ioctl_ops_parse(vm, ops, &vops);
if (err)
@@ -4346,7 +4459,7 @@ static int xe_vm_alloc_vma(struct xe_vm *vm,
* VMA, so they can be assigned to newly MAP created vma.
*/
if (is_madvise)
- tmp_attr = vma->attr;
+ xe_vma_mem_attr_copy(&tmp_attr, &vma->attr);
xe_vma_destroy(gpuva_to_vma(op->base.remap.unmap->va), NULL);
} else if (__op->op == DRM_GPUVA_OP_MAP) {
@@ -4356,12 +4469,13 @@ static int xe_vm_alloc_vma(struct xe_vm *vm,
* copy them to new vma.
*/
if (is_madvise)
- vma->attr = tmp_attr;
+ xe_vma_mem_attr_copy(&vma->attr, &tmp_attr);
}
}
xe_vm_unlock(vm);
drm_gpuva_ops_free(&vm->gpuvm, ops);
+ xe_vma_mem_attr_fini(&tmp_attr);
return 0;
unwind_ops:
@@ -4395,6 +4509,46 @@ int xe_vm_alloc_madvise_vma(struct xe_vm *vm, uint64_t start, uint64_t range)
return xe_vm_alloc_vma(vm, &map_req, true);
}
+static bool is_cpu_addr_vma_with_default_attr(struct xe_vma *vma)
+{
+ return vma && xe_vma_is_cpu_addr_mirror(vma) &&
+ xe_vma_has_default_mem_attrs(vma);
+}
+
+/**
+ * xe_vm_find_cpu_addr_mirror_vma_range - Extend a VMA range to include adjacent CPU-mirrored VMAs
+ * @vm: VM to search within
+ * @start: Input/output pointer to the starting address of the range
+ * @end: Input/output pointer to the end address of the range
+ *
+ * Given a range defined by @start and @range, this function checks the VMAs
+ * immediately before and after the range. If those neighboring VMAs are
+ * CPU-address-mirrored and have default memory attributes, the function
+ * updates @start and @range to include them. This extended range can then
+ * be used for merging or other operations that require a unified VMA.
+ *
+ * The function does not perform the merge itself; it only computes the
+ * mergeable boundaries.
+ */
+void xe_vm_find_cpu_addr_mirror_vma_range(struct xe_vm *vm, u64 *start, u64 *end)
+{
+ struct xe_vma *prev, *next;
+
+ lockdep_assert_held(&vm->lock);
+
+ if (*start >= SZ_4K) {
+ prev = xe_vm_find_vma_by_addr(vm, *start - SZ_4K);
+ if (is_cpu_addr_vma_with_default_attr(prev))
+ *start = xe_vma_start(prev);
+ }
+
+ if (*end < vm->size) {
+ next = xe_vm_find_vma_by_addr(vm, *end + 1);
+ if (is_cpu_addr_vma_with_default_attr(next))
+ *end = xe_vma_end(next);
+ }
+}
+
/**
* xe_vm_alloc_cpu_addr_mirror_vma - Allocate CPU addr mirror vma
* @vm: Pointer to the xe_vm structure
@@ -4419,3 +4573,4 @@ int xe_vm_alloc_cpu_addr_mirror_vma(struct xe_vm *vm, uint64_t start, uint64_t r
return xe_vm_alloc_vma(vm, &map_req, false);
}
+