diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 24 |
1 files changed, 18 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c index 2b81344dcd66..8d16ef257bcb 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c @@ -816,7 +816,7 @@ static int sdma_v7_0_reset_queue(struct amdgpu_ring *ring, amdgpu_ring_reset_helper_begin(ring, timedout_fence); - r = amdgpu_mes_reset_legacy_queue(adev, ring, vmid, true); + r = amdgpu_mes_reset_legacy_queue(adev, ring, vmid, true, 0); if (r) return r; @@ -954,7 +954,7 @@ static int sdma_v7_0_ring_test_ring(struct amdgpu_ring *ring) r = amdgpu_ring_alloc(ring, 5); if (r) { - DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring->idx, r); + drm_err(adev_to_drm(adev), "dma failed to lock ring %d (%d).\n", ring->idx, r); amdgpu_device_wb_free(adev, index); return r; } @@ -1018,7 +1018,7 @@ static int sdma_v7_0_ring_test_ib(struct amdgpu_ring *ring, long timeout) r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &ib); if (r) { - DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r); + drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r); goto err0; } @@ -1039,11 +1039,11 @@ static int sdma_v7_0_ring_test_ib(struct amdgpu_ring *ring, long timeout) r = dma_fence_wait_timeout(f, false, timeout); if (r == 0) { - DRM_ERROR("amdgpu: IB test timed out\n"); + drm_err(adev_to_drm(adev), "IB test timed out\n"); r = -ETIMEDOUT; goto err1; } else if (r < 0) { - DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r); + drm_err(adev_to_drm(adev), "fence wait failed (%ld).\n", r); goto err1; } @@ -1253,6 +1253,17 @@ static void sdma_v7_0_ring_emit_reg_write_reg_wait(struct amdgpu_ring *ring, amdgpu_ring_emit_reg_wait(ring, reg1, mask, mask); } +/* all sizes are in bytes */ +#define SDMA7_CSA_SIZE 32 +#define SDMA7_CSA_ALIGNMENT 4 + +static void sdma_v7_0_get_csa_info(struct amdgpu_device *adev, + struct amdgpu_sdma_csa_info *csa_info) +{ + csa_info->size = SDMA7_CSA_SIZE; + csa_info->alignment = SDMA7_CSA_ALIGNMENT; +} + static int sdma_v7_0_early_init(struct amdgpu_ip_block *ip_block) { struct amdgpu_device *adev = ip_block->adev; @@ -1286,6 +1297,7 @@ static int sdma_v7_0_early_init(struct amdgpu_ip_block *ip_block) sdma_v7_0_set_vm_pte_funcs(adev); sdma_v7_0_set_irq_funcs(adev); sdma_v7_0_set_mqd_funcs(adev); + adev->sdma.get_csa_info = &sdma_v7_0_get_csa_info; return 0; } @@ -1492,7 +1504,7 @@ static int sdma_v7_0_ring_preempt_ib(struct amdgpu_ring *ring) ring->trail_seq += 1; r = amdgpu_ring_alloc(ring, 10); if (r) { - DRM_ERROR("ring %d failed to be allocated \n", ring->idx); + DRM_ERROR("ring %d failed to be allocated\n", ring->idx); return r; } sdma_v7_0_ring_emit_fence(ring, ring->trail_fence_gpu_addr, |