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Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a77970.dtsi')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77970.dtsi32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index 1007ee48adc3..1f6676e2795a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -1209,6 +1209,38 @@
};
};
+ wwdt0: watchdog@ffc90000 {
+ compatible = "renesas,r8a77970-wwdt",
+ "renesas,rcar-gen3-wwdt";
+ reg = <0 0xffc90000 0 0x10>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pretimeout", "error";
+ clocks = <&cpg CPG_CORE R8A77970_CLK_R>,
+ <&cpg CPG_CORE R8A77970_CLK_CP>;
+ clock-names = "cnt", "bus";
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ resets = <&cpg 325>;
+ reset-names = "cnt";
+ status = "disabled";
+ };
+
+ wwdt1: watchdog@ffca0000 {
+ compatible = "renesas,r8a77970-wwdt",
+ "renesas,rcar-gen3-wwdt";
+ reg = <0 0xffca0000 0 0x10>;
+ interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pretimeout", "error";
+ clocks = <&cpg CPG_CORE R8A77970_CLK_R>,
+ <&cpg CPG_CORE R8A77970_CLK_CP>;
+ clock-names = "cnt", "bus";
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ resets = <&cpg 324>;
+ reset-names = "cnt";
+ status = "disabled";
+ };
+
prr: chipid@fff00044 {
compatible = "renesas,prr";
reg = <0 0xfff00044 0 4>;