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Diffstat (limited to 'arch/arm64/boot/dts/qcom/sdm630.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sdm630.dtsi146
1 files changed, 129 insertions, 17 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 8b1a45a4e56e..f4b8e8f468f2 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -262,7 +262,7 @@
pwr_cluster_sleep_0: cluster-sleep-0-0 {
compatible = "arm,idle-state";
idle-state-name = "pwr-cluster-dynamic-retention";
- arm,psci-suspend-param = <0x400000F2>;
+ arm,psci-suspend-param = <0x400000f2>;
entry-latency-us = <284>;
exit-latency-us = <384>;
min-residency-us = <9987>;
@@ -272,7 +272,7 @@
pwr_cluster_sleep_1: cluster-sleep-0-1 {
compatible = "arm,idle-state";
idle-state-name = "pwr-cluster-retention";
- arm,psci-suspend-param = <0x400000F3>;
+ arm,psci-suspend-param = <0x400000f3>;
entry-latency-us = <338>;
exit-latency-us = <423>;
min-residency-us = <9987>;
@@ -282,7 +282,7 @@
pwr_cluster_sleep_2: cluster-sleep-0-2 {
compatible = "arm,idle-state";
idle-state-name = "pwr-cluster-retention";
- arm,psci-suspend-param = <0x400000F4>;
+ arm,psci-suspend-param = <0x400000f4>;
entry-latency-us = <515>;
exit-latency-us = <1821>;
min-residency-us = <9987>;
@@ -292,7 +292,7 @@
perf_cluster_sleep_0: cluster-sleep-1-0 {
compatible = "arm,idle-state";
idle-state-name = "perf-cluster-dynamic-retention";
- arm,psci-suspend-param = <0x400000F2>;
+ arm,psci-suspend-param = <0x400000f2>;
entry-latency-us = <272>;
exit-latency-us = <329>;
min-residency-us = <9987>;
@@ -302,7 +302,7 @@
perf_cluster_sleep_1: cluster-sleep-1-1 {
compatible = "arm,idle-state";
idle-state-name = "perf-cluster-retention";
- arm,psci-suspend-param = <0x400000F3>;
+ arm,psci-suspend-param = <0x400000f3>;
entry-latency-us = <332>;
exit-latency-us = <368>;
min-residency-us = <9987>;
@@ -312,7 +312,7 @@
perf_cluster_sleep_2: cluster-sleep-1-2 {
compatible = "arm,idle-state";
idle-state-name = "perf-cluster-retention";
- arm,psci-suspend-param = <0x400000F4>;
+ arm,psci-suspend-param = <0x400000f4>;
entry-latency-us = <545>;
exit-latency-us = <1609>;
min-residency-us = <9987>;
@@ -563,7 +563,7 @@
};
};
- soc@0 {
+ soc: soc@0 {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
@@ -598,8 +598,8 @@
};
gpu_speed_bin: gpu-speed-bin@41a0 {
- reg = <0x41a2 0x1>;
- bits = <5 7>;
+ reg = <0x41a2 0x2>;
+ bits = <5 8>;
};
};
@@ -1058,8 +1058,8 @@
qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>;
- power-domains = <&rpmpd SDM660_VDDCX>,
- <&rpmpd SDM660_VDDMX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>,
+ <&rpmpd RPMPD_VDDMX>;
power-domain-names = "cx", "mx";
memory-region = <&mba_region>, <&mpss_region>, <&mdata_mem>;
@@ -1096,7 +1096,7 @@
"rbcpr",
"core";
- power-domains = <&rpmpd SDM660_VDDMX>;
+ power-domains = <&rpmpd RPMPD_VDDMX>;
iommus = <&kgsl_smmu 0>;
nvmem-cells = <&gpu_speed_bin>;
@@ -1217,6 +1217,11 @@
reg = <0x05100000 0x40000>;
#iommu-cells = <1>;
+ clocks = <&gcc GCC_HLOS1_VOTE_LPASS_ADSP_SMMU_CLK>;
+ clock-names = "bus";
+
+ power-domains = <&gcc HLOS1_VOTE_LPASS_ADSP_GDSC>;
+
#global-interrupts = <2>;
interrupts =
<GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>,
@@ -1396,7 +1401,7 @@
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_state_on>;
pinctrl-1 = <&sdc2_state_off>;
- power-domains = <&rpmpd SDM660_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
status = "disabled";
@@ -1450,7 +1455,7 @@
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_state_on>;
pinctrl-1 = <&sdc1_state_off>;
- power-domains = <&rpmpd SDM660_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
bus-width = <8>;
non-removable;
@@ -1563,6 +1568,7 @@
reg-names = "mdss_phys", "vbif_phys";
power-domains = <&mmcc MDSS_GDSC>;
+ resets = <&mmcc MDSS_BCR>;
clocks = <&mmcc MDSS_AHB_CLK>,
<&mmcc MDSS_AXI_CLK>,
@@ -1612,7 +1618,7 @@
"rotator-mem";
iommus = <&mmss_smmu 0>;
operating-points-v2 = <&mdp_opp_table>;
- power-domains = <&rpmpd SDM660_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
ports {
#address-cells = <1>;
@@ -1664,7 +1670,7 @@
reg-names = "dsi_ctrl";
operating-points-v2 = <&dsi_opp_table>;
- power-domains = <&rpmpd SDM660_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
interrupt-parent = <&mdss>;
interrupts = <4>;
@@ -2263,6 +2269,79 @@
status = "disabled";
};
+ lpi_tlmm: pinctrl@15070000 {
+ compatible = "qcom,sdm660-lpass-lpi-pinctrl";
+ reg = <0x15070000 0x20000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&lpi_tlmm 0 0 32>;
+
+ cdc_pdm_default: cdc-pdm-default-state {
+ clk-pins {
+ pins = "gpio18";
+ function = "pdm_clk";
+ drive-strength = <8>;
+ output-high;
+ };
+
+ sync-pins {
+ pins = "gpio19";
+ function = "pdm_sync";
+ drive-strength = <4>;
+ output-high;
+ };
+
+ tx-pins {
+ pins = "gpio20";
+ function = "pdm_tx";
+ drive-strength = <8>;
+ };
+
+ rx-pins {
+ pins = "gpio21", "gpio23", "gpio25";
+ function = "pdm_rx";
+ drive-strength = <4>;
+ output-high;
+ };
+ };
+
+ cdc_comp_default: cdc-comp-default-state {
+ pins = "gpio22", "gpio24";
+ function = "comp_rx";
+ drive-strength = <8>;
+ };
+
+ cdc_dmic_default: cdc-dmic-default-state {
+ dmic1-clk-pins {
+ pins = "gpio26";
+ function = "dmic1_clk";
+ drive-strength = <8>;
+ output-high;
+ };
+
+ dmic1-data-pins {
+ pins = "gpio27";
+ function = "dmic1_data";
+ drive-strength = <8>;
+ output-high;
+ };
+
+ dmic2-clk-pins {
+ pins = "gpio28";
+ function = "dmic2_clk";
+ drive-strength = <8>;
+ input-enable;
+ };
+
+ dmic2-data-pins {
+ pins = "gpio29";
+ function = "dmic2_data";
+ drive-strength = <8>;
+ input-enable;
+ };
+ };
+ };
+
adsp_pil: remoteproc@15700000 {
compatible = "qcom,sdm660-adsp-pas";
reg = <0x15700000 0x4040>;
@@ -2280,7 +2359,7 @@
clock-names = "xo";
memory-region = <&adsp_region>;
- power-domains = <&rpmpd SDM660_VDDCX>;
+ power-domains = <&rpmpd RPMPD_VDDCX>;
power-domain-names = "cx";
qcom,smem-states = <&adsp_smp2p_out 0>;
@@ -2337,6 +2416,39 @@
};
};
};
+
+ fastrpc {
+ compatible = "qcom,fastrpc";
+ qcom,glink-channels = "fastrpcglink-apps-dsp";
+ label = "adsp";
+ qcom,non-secure-domain;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compute-cb@1 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <1>;
+ iommus = <&lpass_smmu 3>;
+ };
+
+ compute-cb@2 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <2>;
+ iommus = <&lpass_smmu 7>;
+ };
+
+ compute-cb@3 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <3>;
+ iommus = <&lpass_smmu 8>;
+ };
+
+ compute-cb@4 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <4>;
+ iommus = <&lpass_smmu 9>;
+ };
+ };
};
};
generated by cgit v1.2.3 (git 2.25.1) at 2026-08-05 14:40:21 +0000