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-rw-r--r--Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml6
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
index 6339a76499b2..2c4dc04f9984 100644
--- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
+++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
@@ -106,6 +106,12 @@ properties:
be connected to a single source of the periodic signal).
const: ref
- description:
+ Some dwc wrappers (like i.MX95 PCIes) have two reference clock
+ inputs, one from an internal PLL, the other from an off-chip crystal
+ oscillator. If present, 'extref' refers to a reference clock from
+ an external oscillator.
+ const: extref
+ - description:
Clock for the PHY registers interface. Originally this is
a PHY-viewport-based interface, but some platform may have
specifically designed one.