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-rw-r--r--Documentation/devicetree/bindings/clock/qcom,x1e80100-gcc.yaml8
1 files changed, 7 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,x1e80100-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,x1e80100-gcc.yaml
index 1b15b5070954..881a5dd8d06f 100644
--- a/Documentation/devicetree/bindings/clock/qcom,x1e80100-gcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,x1e80100-gcc.yaml
@@ -62,6 +62,9 @@ properties:
- description: USB4_1 PHY max PIPE clock source
- description: USB4_2 PHY PCIE PIPE clock source
- description: USB4_2 PHY max PIPE clock source
+ - description: UFS PHY RX Symbol 0 clock source
+ - description: UFS PHY RX Symbol 1 clock source
+ - description: UFS PHY TX Symbol 0 clock source
power-domains:
description:
@@ -121,7 +124,10 @@ examples:
<&usb4_1_phy_pcie_pipe_clk>,
<&usb4_1_phy_max_pipe_clk>,
<&usb4_2_phy_pcie_pipe_clk>,
- <&usb4_2_phy_max_pipe_clk>;
+ <&usb4_2_phy_max_pipe_clk>,
+ <&ufs_phy_rx_symbol_0>,
+ <&ufs_phy_rx_symbol_1>,
+ <&ufs_phy_tx_symbol_0>;
power-domains = <&rpmhpd RPMHPD_CX>;
#clock-cells = <1>;
#reset-cells = <1>;